KR20010098111A - Apparatus for driving a plasma display panel having a circuit for recovering power for driving a address electrode - Google Patents

Abstract

The present invention describes a driving apparatus of a plasma display panel having an address driving power recovery circuit for recovering reactive power generated during address switching through an address driver stage for performing a write operation of the plasma display panel. A driving apparatus of a plasma display panel having an address driving power recovery circuit according to the present invention is provided with reactive power due to a capacitance component formed between an address electrode and a scanning electrode in an addressing period, that is, in response to an address pulse in an addressing period. In order to recover and store the driving power provided to the address electrodes by the address electrode driving circuit in synchronization with the applied scan pulse, or to provide the stored recovered power to the address electrodes, one terminal is grounded, and between each address electrode and the scan electrode. A capacitor for recovering and charging power charged in the battery; A coil to which the other terminal and one terminal of the capacitor are connected; A first clamping voltage diode for preventing an overshoot connected between the other terminal of the coil and the power supply terminal such that the cathode side is connected to the power supply terminal; An unshoot prevention second clamping diode connected between the other terminal of the coil and the ground terminal such that the anode side is grounded; As many as the number of address electrodes are arranged between the other terminal of the coil and each address electrode so that a capacitor can serve as a path for recovering power from each address electrode to the capacitor or resupplying power recovered to the capacitor to each address electrode. Switching means; Third switches connected between the switching means and the connection node of each address electrode and the power supply terminal (address drive circuit); And fourth switches connected between the switching means and the connection nodes of the respective address electrodes and the ground terminal [address drive circuit]. The total power consumption is reduced by reducing the consumption of reactive power generated by the capacitive components formed therein.

Description

Apparatus for driving a plasma display panel having a circuit for recovering power for driving a address electrode}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving apparatus of a plasma display panel having an address driving power recovery circuit for recovering reactive power generated during address switching through an address driver stage for performing a write operation of the plasma display panel.

A plasma display panel is a type of display device that recovers image data input as an electrical signal by arranging a plurality of discharge tubes in a matrix shape and selectively emitting the same. The driving method of the plasma display panel is largely divided into the DC driving method and the AC driving method depending on whether the polarity of the voltage applied to maintain the discharge changes with time.

1 shows a basic structure of a general AC surface discharge plasma display panel. As illustrated, the AC type surface discharge plasma display panel forms a discharge space 15 in the front glass substrate 11 and the back glass substrate 17. In the AC type surface discharge plasma display panel, a discharge holding electrode 12 for maintaining a discharge is embedded in the dielectric layer 13 to be electrically isolated from the discharge space 15. In this case, the discharge is maintained by the well-known wall charge effect. In such a surface discharge structure, two discharge sustaining electrodes 12 formed side by side on the front substrate 11 and address electrodes 16 provided on the rear substrate 17 so as to intersect therewith are provided. In this structure, an address discharge that selects a pixel occurs between the address electrode 16 and the discharge sustain electrode 12, and then the common electrode (X) electrode 12a and the scan (Y), which are two discharge sustain electrodes 12, are generated. ) A sustain discharge for displaying a video signal occurs between the electrodes 12b.

2 is a schematic exploded perspective view of a commercial AC type three-electrode surface discharge plasma discharge display panel. One address electrode 16 and a pair of scan electrodes 12 perpendicular thereto are disposed in each discharge space 15 formed by the partition wall 18 formed on the rear substrate 17. The partition wall 18 functions to form the discharge space 15 and prevents cross talk from occurring in adjacent pixels by blocking space charges and ultraviolet rays generated during discharge. In order to show the performance of the plasma display panel as a color display device, a fluorescent material 19 is excited by ultraviolet rays generated during discharge and emits red, blue, and green visible rays, respectively. The fluorescent materials 19, which emit green colors, are applied so as to be sequentially arranged in sequence.

As described above, the plasma display panel coated with the fluorescent material should be capable of gray scale display in order to perform as a color image display. Currently, one frame image is divided into a plurality of auxiliary fields and time-division driven. Gray scale display method is used.

3 is a diagram for describing a gray scale display method of a typical AC plasma discharge display panel. As shown, the multi-gradation display method of the AC plasma display panel divides an image of one frame into a plurality of auxiliary fields, and is divided into an address period and a display discharge holding period for each auxiliary field. It is. Here, a 6-bit gray scale implementation method is described. A method of time-dividing the image of each frame into six subfields to display 2 ⁶ = 64 gray scales has been adopted. Each auxiliary field is composed of an address period A1-A6 and a discharge sustain period S1-S6, and the gray level is expressed by using a point in which the relative length between the discharge holders is doubled in brightness by the visual function. That is, since the ratio of the sustain discharge periods S1-S6 of the first auxiliary field SF1 to the fourth auxiliary field SF4 is 1: 2: 4: 8: 16: 32, 0, 1 (1T), and 2, respectively. (2T), 3 (1T + 2T), 4 (4T), 5 (1T + 4T), 6 (2T + 4T), 7 (1T + 2T + 4T), 8 (8T), 9 (1T + 8T) , 10 (2T + 8T), 11 (3T + 8T), 12 (4T + 8T), 13 (1T + 4T + 8T), 14 (2T + 4T + 8T), 15 (1T + 2T + 4T + 8T) , 16 (16T), 17 (1T + 16T), 18 (2T + 16T), .... 62 (2T + 4T + 8T + 16T + 32T), 63 (1T + 2T + 4T + 8T + 16T + 32T 64 gray scales are displayed by configuring the discharge sustain period of the " For example, to display gradation 6 in an arbitrary pixel, only the second subfield 2T and the third subfield 4T are addressed, and in order to display the gradation 15, the first, second, third, and fourth subfields are displayed. All must be addressed.

4 is an electrode connection diagram of an AC type 3-electrode surface discharge plasma discharge display panel connected to implement the gray scale display method as described above. Here, the electrodes connected in common among the discharge sustaining electrodes 12 formed of the horizontal electrode pairs are the common electrodes (X electrodes), and the other electrodes are the scan electrodes (Y electrodes). The common electrodes, that is, the X electrodes 12a are all connected in common, and voltage signals having the same waveform are applied to all of the common electrodes including the discharge sustain pulses. Therefore, the scan signal of the discharge sustain electrode is applied to the scan electrode, that is, the Y electrode 12b, so that addressing occurs between the Y electrode 12b and the address electrode 6, and the Y electrode 12b and the X electrode ( The discharge sustain pulse is applied between 12a) to maintain the display discharge. The waveforms of the driving signals applied to the wires connected in this way are shown in FIG. 5.

FIG. 5 is a general waveform diagram of a drive signal of a commercially available AC plasma display panel, and illustrates a method of realizing an image by an address (DDR) display (ADS) driving method. In FIG. 5, A is a driving signal applied to the address electrodes, X is a driving signal applied to the common electrode (X electrode) 12a, and Y1-Y480 are driving signals applied to the Y electrodes 12b, respectively. The front erase period A11 applies a front erase pulse 22a to the common (X) electrode 12a to generate a strong discharge to erase the wall charges generated by the previous discharge for accurate gray scale display. Smooth operation (step 1). Next, the front write period A12 and the front erase period A13 are applied to the front write pulse 23 on the Y electrode 12b and the front erase pulse on the X electrode 12a to lower the address pulse voltage 21. 22b) is applied to generate the front write discharge and the front erase discharge, respectively, to control the amount of wall charges in the discharge space 15 (steps 2 and 3). Next, the address period A14 is a place selected among the full screen of the plasma display panel by selective discharge by an address pulse (data pulse, data pulse) 21 between the crossed address electrode 16 and the scan electrode 12b. In this step, the electronic signal information is written in the fourth step. Next, the discharge holding period S1 is a discharge by the continuous discharge holding pulses 25, and is a period in which the display discharge is maintained for a given time in order to implement the image information on the actual screen.

In a plasma display panel having such a structure, the load is ideally a capacitive load. Therefore, when a voltage is applied from the outside, a large amount of power is consumed through charge and discharge operations. However, this consumed power is called reactive power because it does not help the light emission. In order to recover this power, a power recovery circuit is provided on the discharge sustaining electrode to recover power.

FIG. 6 is a circuit diagram showing a schematic configuration of a power recovery circuit for a discharge sustaining electrode proposed by Weber in an energy recovery sustain for AC plasma display (US 4866349). As shown in the figure, the power recovery circuit performs the power recovery operation while the four switches Q1, Q2, Q3, and Q4 are appropriately turned ON and OFF, respectively. In the initial condition, the discharge sustain operation is performed, and the capacitor Css recovers and charges the voltage Vs / 2. First, as switch Q1 is turned on, the voltage Vs / 2 at Css resonates with the coil and rises to the potential Vs. When rising to the Vs potential, switch Q2 turns on to charge the panel while maintaining the Vs potential. The potential charged on the panel resonates when switch Q3 is turned on to charge capacitor Css to Vs / 2 potential. Switch Q4 then turns on to maintain the panel at ground potential. In this way, the charge charged to the capacitor Css is charged to the panel, and the charge charged to the panel charges the capacitor Css, thereby reducing power consumption at the potential rise and fall, respectively.

Further, the time allocated to the sustain discharge is longer for writing as the number of scan lines increases, and the time allocated for the sustain discharge becomes shorter as the number of subfields increases. Therefore, the higher the resolution panel, the more reactive power is increased, which lowers the overall brightness. Therefore, as the number of subfields increases for the high resolution display, not only the discharge sustaining pulse but also the frequency of the data pulse increases, the reactive power due to the capacitive load of the panel further increases. To solve this problem, it is necessary to recover not only the discharge sustaining electrode but also reactive power applied to the data electrode.

However, no circuit for recovering power applied to the address electrode has been introduced at present. As described above, since the pulses applied to the address increase in higher resolution, not only the consumption of reactive power through the address electrode increases proportionally, but also 10 sub-gradations for the removal of pseudo contouring. In the case of many divisions above, the consumption of reactive power is increased in proportion to this.

As described above, since the energy recovery operation is not performed at the address electrode driving stage, the consumption of reactive power due to the switching degree of the address increases as the number of subfields increases with higher resolution. Therefore, the current capacity of the address switching driver must also be large, and power consumption is increased.

The present invention has been made to improve the above-described problems, and address driving can recover an unnecessary address driving power between the address electrode and the scanning electrode in order to reduce the power consumption that is increased when displaying a high resolution image. It is an object of the present invention to provide a driving device of a plasma display panel having a power recovery circuit.

1 is a vertical cross-sectional view showing the basic structure of a typical AC surface discharge plasma display panel;

FIG. 2 is a schematic exploded perspective view of the AC plasma display panel of FIG. 1;

3 is an explanatory diagram for explaining a gray scale display method of the AC plasma discharge display panel of FIG. 2;

4 is an electrode connection diagram of the AC plasma discharge display panel of FIG. 2 connected to implement the gray scale display method of FIG.

5 is a waveform diagram of driving signals applied to the electrodes of FIG. 4;

6 is a circuit diagram showing a schematic configuration of a power recovery circuit for a discharge sustaining electrode proposed by Weber;

FIG. 7 is a view showing an address driving power recovery circuit and its arrangement applied to a driving device of a plasma display panel having an address driving power recovery circuit according to the present invention; FIG.

FIG. 8 is a circuit diagram showing a form in which the address driving power recovery circuit of FIG. 7 is actually connected to an address electrode of a plasma display panel;

FIG. 9 is a circuit diagram of a region in which the address electrode driving power recovery circuit of FIG. 8 recovers an actual reactive power in an equivalent capacitance, with an equivalent capacitance; FIG.

10 is a waveform diagram of an electrode driving signal for explaining the operation of each energy recovery circuit in the circuit diagram of FIG. 7.

<Description of the symbols for the main parts of the drawings>

11.Front Glass Substrate

12. Sustain Electrode

12a. Common Electrode 12b. Scanning Electrode

13. Protective Layer 14. Protection Layer

15. Discharge Space 16. Address Electrode

17. Rear Glass Substrate 18. Barrier Rib

19. Phosphor 20. Address common electrode

A11: Total Erase A12: Total Write

A13: Total Erase A14: Addressing

21. Addressing pulses 22b, 22b '. Erase Pulse (Erase Pluse)

23. Write Pulse (Wirte Pluse) 24. Scan Pulse

25. Sustain Pulse

In order to achieve the above object, a driving apparatus of a plasma display panel having an address driving power recovery circuit according to the present invention includes: a front substrate and a rear substrate facing each other at regular intervals to maintain a discharge space, and the front substrate; Discharge sustain electrodes formed of a pair of scan lines and common lines on a stripe parallel to each other, and between address electrodes and the address electrodes formed on the rear substrate on a stripe in a direction crossing the discharge sustain electrodes, respectively; A plasma display panel having partitions formed on a stripe in a direction parallel to the address electrodes to create a discharge space on a rear substrate of the plasma display panel; An address electrode driving circuit for providing an address pulse for driving the address electrodes in an addressing period; And the address electrode driving circuit connected to the address electrode driving circuit and the address electrodes and provided to the address electrodes in synchronization with a scan pulse applied to the scan electrodes in response to the address pulse in the addressing period. And an address electrode driving power recovery circuit for recovering and storing driving power or providing the stored recovery power to the address electrodes.

The address power recovery circuit may include: a capacitor configured to recover and charge power charged between each of the address electrodes and the scan electrodes with one terminal grounded; A coil to which the other terminal and one terminal of the capacitor are connected; A first stable voltage diode connected between the other terminal of the coil and the power supply terminal such that the cathode side is connected to the power supply terminal; A second stable voltage diode connected between the other terminal of the coil and the ground terminal such that an anode side is grounded; The capacitor is connected between the other terminal of the coil and each address electrode so that the capacitor serves as a path for recovering power from each address electrode to the capacitor or resupplying power recovered to the capacitor to each address electrode. Switching means as many as the number of address electrodes; Third switches connected between the switching means and the connection node of the respective address electrodes and the [power supply] address driving circuit; And fourth switches connected between the connecting node of the switching means, the address electrodes, and the ground terminal, wherein each of the switching means comprises: a first switch and a first diode connected in parallel with each other; First switching means; And a second switching means in which a second switch and a second diode are connected in parallel with each other, wherein the first switching means and the second switching means are disposed in series between the coil and the respective address electrodes. It is preferable that the first diode and the second diode are connected to the same electrode.

Hereinafter, a driving apparatus of a plasma display panel having an address driving power recovery circuit according to the present invention will be described in detail with reference to the drawings.

The basic concept of the plasma display panel driving apparatus having the address driving power recovery circuit according to the present invention is characterized by recovering and recycling unnecessary power consumed by being charged between the address electrodes and the scanning electrodes that cross each other.

7 is a circuit diagram showing in detail an address driving power recovery circuit applied to a driving device of a plasma display panel having an address driving power recovery circuit and an arrangement relationship thereof. The address electrode driving power recovery circuit is arranged as shown for the discharge sustain electrode driving power recovery circuit, and the basic configuration is capacitor Ca, coil La, first clamping diode D1, second clamping diode D2, and first Switching means 100 formed of a first switching means 101 composed of a switch T1 and a first diode DT1 and a second switching means 102 composed of a second switch T2 and a second diode DT2. , The third switch T3 and the fourth switch T4.

FIG. 8 is a plan view illustrating in detail a state in which the address driving power recovery circuit of FIG. 7 is actually connected to and operated on an address electrode of a plasma display panel. As shown in the drawing, one switching means 100, a third electrode T3 and a fourth electrode T4 are connected to each address electrode in a one-to-one correspondence. In other words, one switching means 100 is provided for each address electrode so as to recover all reactive power by the capacitance component formed at the point corresponding to each pixel of the plasma display panel, that is, the point where the address electrode and the scan electrode cross each other. The third electrode T3 and the fourth electrode T4 are provided. It should be noted here that, through the switching means 100, the reactive power by the capacitive component C _pixel between each address electrode and the scan electrode is recovered or the recovered power is supplied again, and the address is transmitted through the third switch T3. The voltage Va is provided from the address electrode driver circuit. The detailed operation thereof will be described later with reference to FIG. 10.

9 is a diagram illustrating an equivalent circuit of the capacitance component of the region corresponding to each pixel. Here, the upper electrodes of the capacitors representing each capacitive component correspond to the address electrodes, and the lower electrodes correspond to the scan electrodes. Accordingly, the scan electrodes marked as ground mean a state in which a pulse voltage 24 of 0 V is applied to the scan electrodes Y in the addressing period A14 in FIG. 5.

FIG. 10 is a schematic explanatory diagram for describing an operation of an energy recovery circuit in the circuit diagram of FIG. 8 or 9.

The capacitor Ca is charged with a charge corresponding to Va / 2, and when the first switch T1 for voltage rising is turned on, the capacitor Ca resonates with the externally coiled La and rises to the Va potential.

First, a voltage rising operation is an operation of turning on an address driving pulse applied to an address electrode, which turns on the switch T1 connected to the capacitor Ca, turns off the remaining switches T2, T3, and T4, and recovers and charges the capacitor Ca. This is done by repowering the address driver. That is, when the switch T1 is turned on and the remaining switches T2, T3, and T4 are turned off, the current flows toward the address electrode through the first switch T1 and the second diode DT2 by the voltage Va recovered and charged in the capacitor Ca, and the address electrode. The input voltage of becomes close to Va. Thus, the rising operation is to use the power recovered in the capacitor Ca again to implement the address electrode driving pulse voltage. When the capacitor Ca is discharged by this rising operation and the input voltage of the address electrode is close to the voltage Va provided by the address driving circuit, the switch T1 is turned on and the switch T3 is turned on while the switches T2 and T4 are turned off. The voltage Va of the driving circuit is applied to the address electrodes to maintain the normal address driving pulse voltage.

Next, the sink operation is an operation of turning off the address driving pulse Va applied to the address electrode, and turning on the second switch T2 and turning off the remaining switches T1, T3, and T4, and then applying power to the address electrode. By recovering and charging the capacitor Ca. That is, when the second switch T2 is turned on and the remaining switches T1, T3, and T4 are turned off, current flows toward the capacitor Ca through the second switch and the first diode DT1, and the charging voltage across the capacitor Ca is charged to Va. In this manner, the sink operation is to recover the power applied between the address electrode and the scan electrode to the capacitor Ca. By this sink operation, the capacitor Ca is charged (the potential is close to Va), and when the address pulse voltage approaches the ground voltage GND, the fourth switch T4 is turned on while the second switch T2 is turned on and the switches T1 and T3 are turned off. ON to maintain the ground voltage at the address electrode.

As described above, the driving device of the plasma display panel having the address driving power recovery circuit according to the present invention recovers a large amount of reactive power consumed by the charging and discharging operation by applying an external voltage due to the characteristics of the panel having the capacitive load. To do this, not only a power recovery circuit for the discharge sustain electrode driving power but also a power recovery circuit for the address driving power are recovered to recover the power. In the discharge holding operation, since the Y and X electrodes alternate with each other to apply a pulse, a charge / discharge circuit passing through the coil L is made to recover reactive power. On the contrary, in order to recover reactive power by capacitive components formed between the address electrode and the scan electrode in the addressing period, the power recovery circuit according to the present invention recovers reactive power using an existing IC without developing a new IC. To present.

That is, in response to the scan pulse applied to the scan electrodes in response to the address pulse in the addressing period, the drive power supplied to the address electrodes by the address electrode driving circuit is recovered and stored, or the stored recovery power is provided to the address electrodes. In order to recover the electric charge charged between each address electrode and the scan electrode, one terminal is grounded to the capacitor; A coil to which the other terminal and one terminal of the capacitor are connected; A first clamping voltage diode for preventing an overshoot connected between the other terminal of the coil and the power supply terminal such that the cathode side is connected to the power supply terminal; An unshoot prevention second clamping diode connected between the other terminal of the coil and the ground terminal such that the anode side is grounded; As many as the number of address electrodes are arranged between the other terminal of the coil and each address electrode so that a capacitor can serve as a path for recovering power from each address electrode to the capacitor or resupplying power recovered to the capacitor to each address electrode. Switching means; Third switches connected between the switching means and the connection node of each address electrode and the power supply terminal (address drive circuit); And fourth switches connected between the switching means and the connection nodes of the respective address electrodes and the ground terminal [address driving circuit], by providing an address electrode driving power recovery circuit, between the address electrode and the scan electrode in the addressing period. The total power consumption can be reduced by reducing the consumption of reactive power generated by the capacitive components formed on the substrate.

Claims (5)

Discharge holding electrodes comprising a front substrate and a rear substrate disposed to face each other at regular intervals to maintain a discharge space, a pair of scanning lines and common lines on stripes parallel to each other on the front substrate, and the discharge holding electrodes; Plasma having address electrodes formed on the rear substrate on the stripe in the crossing direction and partition walls formed on the stripe in the direction parallel to the address electrodes to create a discharge space on the rear substrate between the address electrodes. Display panel; An address electrode driving circuit for providing an address pulse for driving the address electrodes in an addressing period; And A drive connected to the address electrode driving circuit and the address electrodes and provided to the address electrodes by the address electrode driving circuit in synchronization with a scan pulse applied to the scan electrodes in response to the address pulse in the addressing period; An address electrode driving power recovery circuit for recovering and storing power or providing the stored recovery power to the address electrodes; And a plasma display panel drive device. The method of claim 1, The address power recovery circuit, A capacitor having one terminal grounded to recover and charge the electric power charged between each address electrode and the scan electrode; A coil to which the other terminal and one terminal of the capacitor are connected; A first clamping voltage diode for preventing an overshoot connected between the other terminal of the coil and the power supply terminal such that the cathode side is connected to the power supply terminal; An unshoot prevention second clamping diode connected between the other terminal of the coil and the ground terminal such that an anode is grounded; The capacitor is connected between the other terminal of the coil and each address electrode so that the capacitor serves as a path for recovering power from each address electrode to the capacitor or resupplying power recovered to the capacitor to each address electrode. Switching means as many as the number of address electrodes; Third switches connected between the switching node and the connection node of each of the address electrodes and the power supply terminal (address driving circuit); And Fourth switches connected between the switching node and the connection node of each of the address electrodes and the ground terminal [address driving circuit]; And a plasma display panel drive device. The method of claim 2, wherein each switching means, First switching means in which the first switch and the first diode are connected in parallel with each other; And A second switching means in which the second switch and the second diode are connected in parallel with each other; Wherein the first switching means and the second switching means are disposed in series between the coil and the address electrodes, and the first diode and the second diode are connected to the same electrode. . The method of claim 3, An anode of the first diode and an anode of the second diode are directly connected, a cathode of the first diode is connected to a coil, and a cathode of the second diode is connected to each of the address electrodes. A drive device of a plasma display panel. The method of claim 3, A cathode of the first diode and a cathode of the second diode are directly connected, an anode of the first diode is connected to a coil, and an anode of the second diode is connected to each address electrode. A drive device of a plasma display panel.