KR20030013613A - Apparatus and mehtod of driving plasma display panel - Google Patents

Abstract

PURPOSE: A scan driving method and apparatus of plasma display panel is provided, which drives a plasma display with half a sustain voltage source for generating a sustain pulse without variation of a sustain discharge characteristic. CONSTITUTION: A capacitor(Cs) for recovering an energy recoveries a voltage charged in a panel capacitor(Cp) at a sustain discharge and re-supplies a charged voltage to the panel capacitor(Cp). An inductor(L) forms a resonance circuit together with the panel capacitor(Cp). The first to fourth switches(S1-S4) control a current flow, and the first to third diodes(D1-D3) forms a current path only in a constant direction. The third diode(D3) prevents a voltage(Vs) generated by the capacitor(Cq) from affecting the capacitor(Cp).

Description

Method and apparatus for driving plasma display panel {APPARATUS AND MEHTOD OF DRIVING PLASMA DISPLAY PANEL}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving apparatus and method for a plasma display, and more particularly to a driving apparatus and method for a plasma display panel to reduce a sustain pulse driving voltage in a plasma display panel driving method.

Plasma Display Panels (hereinafter referred to as "PDPs") display images containing characters or graphics by emitting phosphors by 147 nm ultraviolet rays generated during discharge of He + Xe or Ne + Xe inert mixed gases. . Such a PDP is not only thin and easy to enlarge, but also greatly improved in quality due to recent technology development. In particular, the three-electrode AC surface discharge type PDP has advantages of low voltage driving and long life because wall charges are accumulated on the surface during discharge and protect the electrodes from sputtering caused by the discharge.

Referring to FIG. 1, a discharge cell of a three-electrode AC surface discharge type PDP includes a scan electrode 12Y and a sustain electrode 12Z formed on an upper substrate 10, and an address electrode formed on a lower substrate 18. 20X). The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the scan electrode 12Y and the sustain electrode 12Z side by side. Wall charges generated during plasma discharge are accumulated in the upper dielectric layer 14. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge, and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used. The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode 20X is formed, and the phosphor 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode 20X is formed in the direction crossing the scan electrode 12Y and the sustain electrode 12Z. The partition wall 24 is formed in parallel with the address electrode 20X to prevent ultraviolet rays and visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper and lower plates and the partition wall.

Referring to FIG. 2, in the driving apparatus of the conventional AC surface discharge type PDP, m × n discharge cells 1 have scan electrode lines Y1 to Ym, sustain electrode lines Z1 to Zm, and address electrode lines. PDP 30 arranged in a matrix form so as to be connected to the electrodes X1 to Xn, a scan driver 32 for driving the scan electrode lines Y1 to Ym, and sustain electrode lines Z1 to Zm. The sustain driver 34 for driving the < RTI ID = 0.0 > and < / RTI > odd-numbered address electrode lines X1, X3, ..., Xn-3, Xn-1 and even-numbered address electrode lines X2, X4, ..., Xn-2, First and second address drivers 36A and 36B for dividing and driving Xn) are provided. The scan driver 32 sequentially supplies scan pulses and sustain pulses to the scan electrode lines Y1 to Ym so that the discharge cells 1 are sequentially scanned in line units, and m × n discharge cells are provided. (1) Let the discharge in each last. The sustain driver 34 supplies a sustain pulse to all of the sustain electrode lines Z1 to Zm. The first and second address drivers 36A and 36B supply image data to the address electrode lines X1 through Xn in synchronization with the scan pulse. The first address driver 36A supplies image data to the odd-numbered address electrode lines X1, X3, ..., Xn-3, Xn-1, and the second address driver 36B supplies the even-numbered address electrode lines ( Image data is supplied to X2, X4, ..., Xn-2, Xn).

In the AC surface discharge PDP thus driven, a high voltage of several hundred volts or more is required for the address discharge and the sustain discharge. Accordingly, in order to minimize the driving power required for the address discharge and the sustain discharge, a power recovery device is added to the scan driver 32, the sustain driver 34, and the address drivers 36A and 36B. The power recovery apparatus recovers the voltage charged between the scan electrode line (Y) and the sustain electrode line (Z) and the voltage charged between the address electrode lines (X) and reuses it as a driving voltage at the next discharge.

3 is a view showing a conventional power recovery device installed in front of the scan driver.

Referring to FIG. 3, the conventional power recovery device 38 includes an inductor L connected between the scan driver 32 and an energy recovery capacitor Cs, an energy recovery capacitor Cs, and an inductor L. FIG. First and third switches S1 and S3 connected in parallel between each other are provided. The scan driver 32 is composed of second and fourth switches S2 and S4 connected in parallel between the panel capacitor Cp and the inductor L. The panel capacitor Cp equivalently represents the capacitance formed between the scan electrode line Y and the sustain electrode line Z. FIG. The second switch S2 is connected to the sustain voltage source Vsus, and the fourth switch S4 is connected to the ground voltage source GND. The energy recovery capacitor Cs recovers and charges the voltage charged in the panel capacitor Cp during the sustain discharge, and supplies the charged voltage to the panel capacitor Cp. The energy recovery capacitor Cs has a very large capacitance value to charge a voltage of Vsus / 2 corresponding to half of the sustain voltage Vsus. The inductor L forms a resonance circuit together with the panel capacitor Cp. The first to fourth switches S1 to S4 control the flow of current. The power recovery device 38 formed in the sustain driver 34 is formed symmetrically with the scan driver 32 with respect to the panel capacitor Cp.

FIG. 4 is a timing diagram and waveform diagrams illustrating on / off timings of the switches illustrated in FIG. 3 and output waveforms of panel capacitors.

The operation of the power recovery device 38 will be described with reference to FIGS. 3 and 4. First, it is assumed that the voltage charged between the scan electrode line Y and the sustain electrode line Z, that is, the voltage charged in the panel capacitor Cp, before the T1 period is 0 volts. In addition, it is assumed that the energy recovery capacitor Cs is charged with a voltage of Vsus / 2. In the T1 period, the first switch S1 is turned on to form a current path from the energy recovery capacitor Cs to the first switch S1, the inductor L, and the panel capacitor Cp. do. At this time, the inductor L and the panel capacitor Cp form a series resonant circuit. Since the energy recovery capacitor Cs is charged with a voltage of Vsus / 2, the voltage of the panel capacitor Cp is equal to the voltage of the energy recovery capacitor Cs by the current charge / discharge of the inductor L in the series resonant circuit. It will rise to double Vsus. In the period T2, the second switch S2 is turned on. When the second switch S2 is turned on, the sustain voltage Vsus is supplied to the scan electrode line Y. The sustain voltage Vsus supplied to the scan electrode line Y prevents the voltage of the panel capacitor Cp from falling below the sustain voltage Vsus so that sustain discharge occurs normally. At this time, since the voltage of the panel capacitor Cp rises to Vsus in the T1 period, the driving power supplied from the outside to minimize the discharge is minimized. In the T3 period, the first switch S1 is turned off and maintains the sustain voltage Vsus supplied to the scan electrode line Y. In the T4 period, the second switch S2 is turned off and the third switch S3 is turned on. When the third switch S3 is turned on, a current path is formed from the panel capacitor Cp to the energy recovery capacitor Cs through the inductor L and the third switch S3 to form the panel capacitor Cp. The charged voltage is recovered to the energy recovery capacitor Cs. As the panel capacitor Cp is discharged, the voltage of the panel capacitor Cp is lowered, and at the same time, the voltage of Vsus / 2 is charged to the energy recovery capacitor Cs. After the voltage Vsus / 2 is charged in the energy recovery capacitor Cs, the third switch S3 is turned off and the fourth switch S4 is turned on. In the period T5 when the fourth switch S4 is turned on, a current path is formed from the panel capacitor Cp to the base voltage source GND, so that the voltage of the panel capacitor Cp drops to zero volts. In the T6 period, the state of the T5 period is maintained for a predetermined time. The AC driving pulses supplied to the actual scan electrode line Y and the sustain electrode line Z are obtained by periodically repeating the operation process for the periods T1 to T6.

5 is a view showing a driving circuit for applying a sustain pulse to a scan electrode including another conventional power recovery device.

Referring to FIG. 5, the driving circuit applying the sustain pulse includes a panel capacitor Cp and a scan electrode driving means 40.

The panel capacitor Cp equivalently represents the capacitance formed between the scan electrode line Y and the sustain electrode line Z. FIG.

The scan electrode driving means 40 includes a first switch Q1 connected in series between the 1/2 sustain voltage source Vsus / 2 and the ground voltage source GND, a capacitor Cs for energy recovery, and a first node n1. A third switch derived from the second switch Q2, the inductor L, and the second node n2 connected in series between the panel capacitor Cp and the second node n2 and the base voltage source GND. The switch Q3 is provided.

The energy recovery capacitor Cs recovers and charges the voltage charged in the panel capacitor Cp during the sustain discharge, and supplies the charged voltage to the panel capacitor Cp. The energy recovery capacitor Cs has a capacity value capable of charging the 1/2 holding voltage Vsus / 2. The inductor L forms a resonance circuit together with the panel capacitor Cp. The first to third switches S1 to S3 control the flow of current. The sustain electrode driving means is formed symmetrically with the scan electrode driving means with respect to the panel capacitor Cp.

FIG. 6 is a timing diagram and waveform diagrams illustrating on / off timings of the switches illustrated in FIG. 5 and output waveforms of panel capacitors.

5 and 6, an operation process of the scan electrode driving means 40 will be described. First, it is assumed that the voltage charged between the scan electrode line Y and the sustain electrode line Z, that is, the voltage charged in the panel capacitor Cp, before the P1 period is 0V. In the P1 period, the first switch Q1 and the third switch Q3 are turned on, and the second switch Q2 is turned off. In this case, the voltage from the 1/2 holding voltage source Vsus / 2 is charged to the energy recovery capacitor Cs, and the current path from the panel capacitor Cp to the base voltage source GND is passed through the third switch Q3. Is formed to maintain the voltage of the panel capacitor Cp at 0V.

In the next P2 period, the first switch Q1 and the third switch Q3 are turned off, and the second switch Q2 is turned on. This forms a current path leading to the second switch Q2, the inductor L and the panel capacitor Cp. In this case, since the inductor L and the panel capacitor Cp form a series resonant circuit, the 1/2 holding voltage Vsus / 2 charged in the energy recovery capacitor Cs is supplied to the panel capacitor Cp. When resonant wave is supplied.

The sustain pulse is applied to the scan electrode and the sustain electrode by repeating the above P1 and P2 periods.

However, the driving circuit shown in FIG. 3 has a disadvantage of using a high holding voltage source Vs, and the driving circuit shown in FIG. 4 can be driven with a lower holding voltage source Vs / 2 than the driving circuit shown in FIG. 3. However, since the sustain discharge is generated by the resonant waveform, the resonance frequency changes according to the panel load, and it is difficult to maintain a stable waveform.

Accordingly, an object of the present invention is to provide a driving apparatus and method for a plasma display panel capable of driving by lowering the sustain voltage source for generating sustain pulses in half without changing the characteristics of the sustain discharge.

1 is a perspective view showing a discharge cell structure of a conventional three-electrode AC surface discharge plasma display panel.

FIG. 2 is a plan view showing an arrangement of electrode lines and discharge cells of the PDP shown in FIG. 1; FIG.

3 is a view showing a conventional power recovery device installed in front of the scan driver.

4 is a timing diagram and waveform diagrams illustrating on / off timings of the switches illustrated in FIG. 3 and output waveforms of panel capacitors.

5 is a view showing a driving circuit for applying a sustain pulse to a scan electrode including another conventional power recovery device.

FIG. 6 is a timing diagram and waveform diagrams illustrating on / off timing of the switches shown in FIG. 5 and output waveforms of the panel capacitor. FIG.

7 is a view showing in detail the driving device for generating a sustain pulse of the plasma display panel according to an embodiment of the present invention.

FIG. 8 is a timing diagram and waveform diagrams showing on / off timing of the switches shown in FIG. 7 and output waveforms of the panel capacitor. FIG.

FIG. 9 is a waveform diagram showing a driving pulse of FIG. 8 and a voltage charging state at a P node in FIG. 7; FIG.

<Description of Symbols for Main Parts of Drawings>

10: upper substrate 11: discharge cell

12Y, 62 scan electrode 12Z, 64 sustain electrode

14 upper dielectric layer 16 protective film

18: lower substrate 20X: address electrode

22: lower dielectric layer 24: partition wall

26 phosphor 30 PDP

40,50: scanning electrode driving means

In order to achieve the above object, a driving apparatus of a plasma display panel according to the present invention includes a display panel in which pixel cells formed at intersections of first and second sustain electrodes and an address electrode for generating a discharge are arranged in a matrix form; Sustain electrode driving means for supplying at least one of the first and second sustain electrodes with a resonance sustain pulse for generating the sustain discharge; The sustain electrode cutting means includes a power recovery device for recovering and charging and discharging a voltage charged in a capacitive load formed between the sustain electrodes, and a sustain voltage connected to the power recovery device and supplied from the outside to the power recovery device. And a first capacitor connected to the power recovery device and added to a voltage charged in the power recovery device to supply a sustain voltage to the capacitive load.

In this case, the magnitude of the sustain voltage input to the switch element is half of the sustain voltage supplied to the capacitive load.

In the present invention, the power recovery device includes a second capacitor which stores energy during charging and discharging of the panel, and a series capacitor which is driven by a voltage charged in the second capacitor and is formed between the sustain electrodes. An inductor for supplying a resonance waveform to the sustain electrodes, a first switch connected to the second capacitor to switch signal paths of the capacitor and the inductor, and common to the second capacitor and the first switch. A second switch connected between the switch and the signal path of the capacitor and the inductor, a third switch connected in parallel between the inductor and the panel capacitor to switch the signal path of the first capacitor, the inductor, the panel capacitor, and A fourth switch connected to a base voltage source for switching a signal path of the panel capacitor; It features.

In this case, the first switch may be a switch having a low breakdown voltage condition due to the magnitude of the sustain voltage input to the switch element.

A method of driving a plasma display panel according to the present invention is a method of driving a plasma display panel including a power recovery device for recovering a voltage charged in a capacitive load formed between first and second sustain electrode lines and charging the first capacitor. The method of claim 1, further comprising: installing a second capacitor in the power recovery device to form a resonant circuit with an inductor in the power recovery device; supplying a voltage to the first capacitor and the second capacitor from an external voltage source; And charging the capacitive load using the resonant waveform generated from the recovery device and the resonant circuit.

Other objects and advantages of the present invention in addition to the above object will be apparent from the description of the preferred embodiment of the present invention with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 7 to 9.

7 is a diagram illustrating in detail a driving device for generating a sustain pulse of a plasma display panel according to an exemplary embodiment of the present invention.

Referring to FIG. 7, the driving apparatus according to the present invention includes a panel capacitor Cp and a scan electrode driving means 50.

The panel capacitor Cp equivalently represents the capacitance formed between the scan electrode line Y and the sustain electrode line Z. FIG.

The scan electrode driving means 50 includes a first switch element Q1 and an energy recovery capacitor Cs connected in series between the 1/2 sustain voltage source Vsus / 2 and the ground voltage source GND, and a first node ( between the first and third switches S1 and S3 connected in parallel to n1), the inductor L connected between the second node and the panel capacitor Cp, and between the inductor L and the panel capacitor Cp. 2nd and 4th switches S2 and S4 connected in parallel, and the capacitor Cq connected in parallel with 1st switch S1 are provided.

In addition, the first and second diodes (D1, D2) connected in series with the first and third switches (S1, S3), and the third connected in series with the capacitor (Cq) and connected in parallel to the first switch (S1) A diode D3 is provided. The fourth node n4 and the second switch S2 between the third diode D3 and the capacitor Cq are connected.

The energy recovery capacitor Cs recovers and charges the voltage charged in the panel capacitor Cp during the sustain discharge, and supplies the charged voltage to the panel capacitor Cp. The energy recovery capacitor Cs has a capacity value capable of charging the 1/2 holding voltage Vsus / 2. The inductor L forms a resonance circuit together with the panel capacitor Cp. The first to fourth switches S1 to S4 control the flow of current. The first, second, and third diodes D1, D2, and D3 serve to form a current path only in a predetermined direction. In particular, the third diode D3 serves to block the Vs voltage generated by the capacitor Cq from affecting the energy recovery capacitor Cp.

The capacitor Cq charges the voltage by the 1/2 sustain voltage source Vs / 2, and this voltage Vs / 2 is added to the voltage Vs / 2 charged to the energy recovery capacitor Cs to the panel capacitor. The sustain voltage Vs is supplied to (Cp).

The sustain electrode driving means (not shown) for supplying the sustain pulse Vs to the sustain electrode Z is formed symmetrically with the scan electrode driving means 50 around the panel capacitor Cp.

FIG. 8 is a timing diagram and waveform diagrams illustrating on / off timings of the switches illustrated in FIG. 7 and output waveforms of a panel capacitor.

The operation of the scan electrode driving means 50 will be described with reference to FIGS. 7 and 8.

First, it is assumed that the voltage charged between the scan electrode line Y and the sustain electrode line Z, that is, the voltage charged to the panel capacitor Cp before the period (a), is 0 volts. In addition, the voltage of Vsus / 2 is charged to the energy recovery capacitor Cs and the capacitor Cq by the first switch element Q1, respectively. In the period (a), the first switch element Q1 and the fourth switch S4 are turned off, and the first switch S1 is turned on. In this case, the first switch S1 is turned on to form a current path from the energy recovery capacitor Cs to the first switch S1, the inductor L, and the panel capacitor Cp. . At this time, the inductor L, the panel capacitor Cp, and the capacitor Cq form a series resonant circuit. Since the energy recovery capacitor Cs and the capacitor Cq are charged with a voltage of Vs / 2, the voltage of the panel capacitor Cp is changed by the current charging / discharging of the inductor L in the series resonant circuit. The voltage Cs rises to Vs which is the sum of the voltage of the capacitor Cq. At this time, since the voltage of the panel capacitor Cp rises to Vs in the period (a), the driving power supplied from the outside to minimize the discharge is minimized to Vs / 2.

In the period (b), the second switch S2 is turned on. When the second switch S2 is turned on, the sustain voltage Vs is supplied to the scan electrode Y. The sustain voltage Vs supplied to the scan electrode Y prevents the voltage of the panel capacitor Cp from falling below the sustain voltage Vs so that the sustain discharge occurs normally.

In the period (c), the first and second switches S1 and S2 are turned off and the third switch S3 is turned on. In this case, a current path is formed from the panel capacitor Cp to the energy recovery capacitor Cs through the inductor L and the third switch S3, so that the voltage charged in the panel capacitor Cp is converted into the energy recovery capacitor ( Cs).

After the voltage Vsus / 2 is charged in the energy recovery capacitor Cs, the third switch S3 is turned off and the fourth switch S4 is turned on. In the period (d) during which the fourth switch S4 is turned on, a current path is formed from the panel capacitor Cp to the base voltage source GND, so that the voltage of the panel capacitor Cp drops to zero volts. As the fourth switch S4 is turned on and the first switch element Q1 is turned on, the capacitor Cq is charged with the voltage from the 1/2 sustain voltage source Vs / 2. Thus, in the period (d), the energy recovery capacitor Cp and the capacitor Cq are respectively charged with the voltage Vs / 2. The AC driving pulses supplied to the actual scan electrode line Y and the sustain electrode line Z are obtained by periodically repeating the operation process during the periods (a) to (d).

FIG. 9 is a waveform diagram illustrating a driving pulse of FIG. 8 and a voltage charging state at a P node in FIG. 7.

Referring to FIGS. 7 and 9, first, a voltage Vs / 2 is charged to the energy recovery capacitor Cs and the capacitor Cq during the period (d) of FIG. 8. Subsequently, in operation (a), the panel capacitor Cp generates a resonance waveform that rises to Vs through Vs / 2. This process is as described in FIG. At this time, the P node np maintains Vs / 2, which is the charging value of the energy recovery capacitor Cs, by the turn-on of the first switch S1, and at the fifth node n5, the first diode ( It is blocked by D1) to maintain the Vs / 2 voltage. Therefore, the Vs / 2 voltage of the P node np and the Vs / 2 voltage already charged at the fourth node n4 of the positive terminal of the capacitor Cp are added to obtain a desired Vs voltage. do.

After the period (a), when the second switch S2 is turned on in the period (b), the voltage Vs obtained in the period (a) is supplied to the panel capacitor Cp through the fifth node n5. At this time, while the sustain pulse having the sustain voltage Vs in the period (b) is maintained by the turn-on of the second switch S2, the voltage Vs / 2 should be continuously supplied to the P node np ( The first switch S1 in the period a) must be maintained until a time when sustain discharge can occur sufficiently. In general, the turn-off time of the first switch S1 is controlled to be the same as the turn-off time of the second switch S2.

As described above, according to the driving device of the plasma display panel according to the present invention, by adding a charging capacitor to the energy recovery device for generating the sustaining pulse, the supply voltage can be reduced by half, thereby greatly reducing the driving power consumption. . In addition, the breakdown voltage condition of the switch element can be lowered, thereby reducing the cost of the switch.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (13)

A display panel in which pixel cells formed at intersections of the first and second sustain electrodes and the address electrode for generating a discharge are arranged in a matrix; Sustain electrode driving means for supplying at least one of the first and second sustain electrodes with a resonance sustain pulse for generating the sustain discharge; The sustain electrode cutting means includes a power recovery device for recovering and charging and discharging the voltage charged in the capacitive load formed between the sustain electrodes; A switch element connected to the power recovery device and controlling a holding voltage supplied from the outside to the power recovery device; And a first capacitor connected to the power recovery device and added to a voltage charged in the power recovery device to supply a sustain voltage to the capacitive load. The method of claim 1, And a magnitude of the sustain voltage input to the switch element is half of the sustain voltage supplied to the capacitive load. The method of claim 2, The power recovery device includes a second capacitor to store energy during charging and discharging of the panel; An inductor configured to supply a resonance waveform to the sustain electrodes by configuring a series resonance circuit together with a panel capacitor formed between the sustain electrodes and driven by the voltage charged in the second capacitor; A first switch connected to the second capacitor to switch signal paths of the capacitor and the inductor; A second switch commonly connected to the second capacitor and the first switch to switch signal paths of the capacitor and the inductor; A third switch connected in parallel between the inductor and the panel capacitor to switch the signal path of the first capacitor; And a fourth switch connected to the inductor, the panel capacitor, and the ground voltage source to switch the signal path of the panel capacitor. The method of claim 3, wherein And first and second diodes connected in series with the first and second switches to form the signal path in a predetermined direction. The method of claim 4, wherein The first diode and the first switch are turned on at the time of discharging the second capacitor, And the second diode and the second switch are turned on when the second capacitor is charged. The method of claim 3, wherein And the first capacitor is connected in parallel to the first switch. The method of claim 3, wherein And a third diode connected between the first capacitor and the first switch to prevent a voltage charged in the first capacitor from being applied to the second capacitor. The method of claim 7, wherein And the first capacitor, the third diode, and the third switch are connected to each other. The method of claim 4, wherein And the first switch, the first diode, and the first capacitor are connected to each other. The method of claim 3, wherein And the first switch is a switch having a low breakdown voltage condition due to a magnitude of a sustain voltage input to the switch element. A driving method of a plasma display panel having a power recovery device for recovering a voltage charged in a capacitive load formed between first and second sustain electrode lines and charging the first capacitor. Installing a second capacitor in the power recovery device to form an inductor and a resonance circuit in the power recovery device; Supplying a voltage to the first capacitor and the second capacitor from an external voltage source, And charging the capacitive load by using the resonant waveform generated from the power recovery device and the resonant circuit. The method of claim 11, And wherein the external voltage source is half of the voltage charged in the capacitive load. The method of claim 11, And the second capacitor further comprises maintaining a voltage charged in the capacitive load for a predetermined time.