JP2001125534A - Method and device for driving surface discharge type pdp - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance the stability of addressing by preventing unwanted discharge in an address period. SOLUTION: In addressing by individual potential control with respect to second main electrodes Ys and address electrodes As, each potential of first main electrodes Xs is made to be changed so that a potential difference with that of address electrodes increases only as to a selected row in synchronization with row selection in which each potential of second main electrodes Ys of the selected row is made to be changed so that a potential difference with that of the address electrodes temporarily increases.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method and a device for driving a surface discharge type PDP. PDPs have come to be widely used in applications such as television images and computer monitors with the practical use of color screens. The usage environment is diversified with the spread, and there is a demand for a driving method that realizes a stable display that is not affected by a change in temperature or a change in power supply voltage.

[0002]

2. Description of the Related Art As a color display device, an AC type PDP of a surface discharge type has been commercialized. In the surface discharge type here, first and second main electrodes for generating a display discharge for securing luminance are arranged in parallel, and a third electrode (data electrode) is arranged so as to intersect with the main electrode pair. Address electrodes). The arrangement of the main electrodes includes a form in which a pair of first and second main electrodes are arranged for each row of the matrix display, and a form in which the first and second main electrodes are alternately arranged at equal intervals. . In the latter case, the main electrodes except for both ends of the array are related to display of two adjacent rows. Regardless of the arrangement, the main electrode pairs are covered with a dielectric.

In the display by the surface discharge type PDP, one of the main electrode pairs in each row (for example, the second main electrode) is used as a scan electrode for selecting a row, and an address discharge between the scan electrode and the address electrode is performed. And address discharge between the main electrodes triggered by the trigger, thereby performing addressing for controlling the charge amount (wall charge amount) of the dielectric according to the display content. After the addressing, a sustain voltage Vs having an alternating polarity is applied to the main electrode pair. The sustain voltage Vs satisfies the expression (1).

Vf _XY -Vw _XY <Vs <Vf _XY (1) Vf _XY : Discharge start voltage between main electrodes Vw _XY : Wall voltage between main electrodes Presence of a predetermined amount of wall charge by application of sustain voltage Vs The cell voltage (the sum of the driving voltage applied to the electrode and the wall voltage) exceeds the firing voltage Vf _XY only in the cell where the discharge occurs, and a surface discharge occurs along the substrate surface. When the application cycle is shortened, light emission visually continues.

FIG. 11 is a waveform diagram showing a change in cell voltage during a conventional address period. In an address period for performing addressing, a second electrode used as a scan electrode is used.
For the main electrode Y, individual potential control is performed. That is, the second main electrode Y corresponding to the j-th row as shown in FIG.
_A scan pulse (row selection pulse) Py is applied to _j when the j-th row is selected as a selected row.

On the other hand, for the first main electrode X not used as a scan electrode, regardless of a selected row and a non-selected row,
It is biased to a constant potential Vxa from the start to the end of the addressing. The potential Vxa is equal to the scan pulse P
the potential difference between the second main electrode Y when applying the y (voltage between the main electrodes XY) is set to be slightly lower than the discharge starting voltage Vf _XY. Thus, when an address discharge is generated between the electrodes AY between the second main electrode Y and the address electrode A, the address discharge is also generated between the main electrodes XY as a trigger. If there is no trigger, no address discharge occurs between the main electrodes XY.

[0007]

In the PDP, the internal charging characteristics depend on the operating temperature, and the charging state differs between cells depending on the display pattern. In addition, surface discharge type P
In the DP, a positive charge is likely to be accumulated in the vicinity of the address electrode A due to the setting of the drive voltage during the period in which the display voltage is generated by applying the sustain voltage between the main electrodes XY.

In the conventional driving method, there is a problem that an addressing error easily occurs due to excessive or insufficient charging in the electrode AX between the first main electrode X and the address electrode A. The details are as follows. Address electrode A
Within charge amount proper range of the vicinity of, as indicated by a thin solid line in FIG. 11 does not exceed the cell voltage in the inter-electrode AX is a discharge starting voltage Vf _AX of the inter-electrode AX, unnecessary discharge does not occur. However, when the amount of charge in the vicinity of the address electrode A becomes excessive, as shown by the thick solid line,
Although the row corresponding to the main electrode X is a non-selected row, the application of a pulse to the address electrode A causes the cell voltage of the inter-electrode _AX to exceed the firing voltage Vf _AX and cause unnecessary discharge at the inter-electrode AX. Occurs. Due to this discharge, the wall charges between the main electrodes XY decrease, and the scan pulse Py
Is applied, the cell voltage between the main electrodes _XY is much lower than the discharge starting voltage VfXY. Therefore, even if an address discharge occurs between the electrodes AY, it does not shift to an address discharge between the main electrodes XY, so that the wall charges are not properly controlled.

SUMMARY OF THE INVENTION It is an object of the present invention to prevent unnecessary discharge during an address period and improve addressing stability.

[0010]

In the present invention, the potentials of the main electrodes (herein, referred to as first main electrodes) which are not used as scan electrodes during addressing are individually controlled during the address period. Therefore, individual potential control is performed on both of the pair of main electrodes for generating the surface discharge. The first main electrode of the non-selected row before the selected row is maintained at a potential at which the potential difference from the address electrode becomes a sufficiently small value (a value at which unnecessary discharge does not occur). The potential of the first main electrode in the selected row is changed such that the cell voltage between the main electrodes is a value at which an address discharge can occur, that is, the cell voltage has a value slightly lower than the discharge start voltage. . At the stage after the selected row becomes the non-selected row, the potential may or may not be returned to the value before the selected row. By changing the potential of the first main electrode, unnecessary discharge before row selection can be prevented without making address discharge during row selection difficult, and reliability of addressing can be secured.

The circuit configuration for changing the potential is as follows.
A mode in which the bias power supply connected to the main electrode is switched is preferable. A pulse may be applied to the first main electrode in synchronization with the application of the row selection pulse to the second main electrode. Also, P
In the DP, the first main electrode and the second main electrode of each row are in a capacitively coupled state. Therefore, if the first main electrode is floated during the address period, the potential of the second main electrode changes due to the application of the row selection pulse. Thus, the potential of the first main electrode also changes automatically. However, in that case, a bias power supply is connected to the first main electrode in order to define the upper and lower limits of the potential change range as necessary.

A method according to a first aspect of the present invention includes a plurality of second main electrodes constituting an electrode pair for surface discharge for each row together with a plurality of first main electrodes, and a plurality of address electrodes intersecting the electrode pair. Is a method of driving a surface discharge type PDP that performs addressing for controlling the electric charge of each cell in the screen according to the display content by individual potential control for the second main electrode of the selected row during the addressing. The potential of the first main electrode is changed so that the potential difference with the address electrode is increased only for the selected row in synchronization with the row selection in which the potential difference with the address electrode is temporarily increased so that the potential difference with the address electrode is increased. is there.

According to a second aspect of the present invention, the change width of the potential of the first main electrode of the selected row is set to be equal to or less than the change width of the potential of the second main electrode of the selected row. A driving method according to a third aspect of the present invention is to apply a pulse having the same polarity as the row selection pulse to the first main electrode of the selected row in synchronization with the application of the row selection pulse to the second main electrode.

According to a fourth aspect of the present invention, in the driving method, after the potential of the first main electrode of the selected row is changed from the first potential to the second potential in synchronization with the row selection, the potential remains unchanged until the end of the period. The first main electrode is maintained at the second potential.

According to a fifth aspect of the present invention, the plurality of first main electrodes and the plurality of second main electrodes are arranged so as to form an electrode pair for surface discharge for each row, and the plurality of first main electrodes and the plurality of second main electrodes are arranged in each column. What is claimed is: 1. A driving device for applying a voltage for display to a surface discharge type PDP having a screen on which a plurality of address electrodes are arranged so as to intersect with an electrode pair, wherein potentials of said plurality of first main electrodes are individually adjusted. A potential switching circuit for switching, and an address period for controlling the electric charge of each cell in the screen according to the display content so that the potential difference between the second main electrode of the selected row and the address electrode is temporarily increased. A controller that controls the potential switching circuit such that the potential difference between the first main electrode and the address electrode is increased only for the selected row in synchronization with the row selection to be changed.

According to a sixth aspect of the present invention, there is provided a driving device comprising a plurality of first driving devices.
A first switching element for controlling connection between a current path common to the main electrode and a power supply line at a first potential, and a second switching element for controlling connection between the current path and a power supply line at a second potential And 1 for each of the plurality of first main electrodes.
A plurality of diodes that are connected one by one to prevent the current from flowing from each first main electrode to the other first main electrode, and that immediately before the start of the addressing that controls the charge of each cell in the screen according to the display content, A plurality of first electrodes are charged by charging the interelectrode capacitance of the electrode pair.
A controller that temporarily closes the first switching element and that closes the second switching element from the start to the end of the addressing in order to collectively bias the main electrodes to the first potential. Have.

According to a seventh aspect of the present invention, in the driving device, a scanning circuit for individually applying a row selection pulse to the plurality of second main electrodes and a sustain pulse having a peak value lower than a discharge starting voltage between the main electrodes are provided. A first switching circuit for simultaneously applying the sustain pulse to the plurality of first main electrodes; and a second switching circuit for simultaneously applying the sustain pulse to the plurality of second main electrodes. Controlling the scanning circuit to perform the row selection during the address period, and alternately switches the sustain pulse between the plurality of first main electrodes and the plurality of second main electrodes during a display period following the address period. The first switching circuit and the second switching circuit are controlled so as to apply the voltage.

According to an eighth aspect of the present invention, there is provided a display device including the driving device according to the seventh aspect and a surface discharge type PDP driven by the driving device.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS [Overview of Display Device] [Overall Configuration] FIG. 1 is a configuration diagram of a display device according to the present invention.

The display device 100 comprises a surface discharge type PDP 1 having a screen of m columns and n rows, and a drive unit 60 for selectively lighting cells arranged vertically and horizontally, and is a wall-mounted television receiver. It is used as a monitor of a computer system.

In the PDP 1, main electrodes X and Y for generating a display discharge (also called lighting sustain discharge) are arranged in parallel, and the main electrodes X and Y and the address electrodes A cross each other in each cell. The main electrodes X and Y extend in the row direction (horizontal direction) of the screen, and among these, the main electrode Y is used as a scan electrode for row selection at the time of addressing. The address electrode A extends in the column direction (vertical direction) and is used as a data electrode for selecting a column.

The drive unit 60 has a control circuit 61 responsible for drive control, a power supply circuit 63, an X driver 64, a Y driver 67, and an address driver 70. The control circuit 61 includes a frame memory 611 for temporarily storing display data, and a waveform ROM 612 for storing drive voltage control data. The drive unit 60 receives signals from external devices such as a TV tuner and a computer.
Field data Df, which is multivalued image data indicating the luminance levels of the three colors G and B, is input together with various synchronization signals.

The field data Df is temporarily stored in the frame memory 611, converted into subfield data Dsf for gradation display, and stored in the address driver 70.
Transferred to The subfield data Dsf is display data of q bits per cell representing q subfields (it can be said that 1 bit of display data per cell is collected for q screens), and the subfield has a resolution of m × n. Is a binary image. Subfield data Dsf
Indicates the necessity of lighting of the cell in the corresponding one subfield, more specifically, the necessity of address discharge.

The X driver 64 collectively combines the potentials of the n main electrodes X with the X scan driver 64 which is a potential switching circuit unique to the present invention for individually controlling the potentials of the n main electrodes X. And an X common driver 66 for control. The Y driver 67 includes a Y scan driver 68 and a Y common driver 69. The Y scan driver 68 is a potential switching means for selecting a row in addressing. The address driver 70 controls the potentials of a total of m address electrodes (data electrodes) A based on the subfield data Dsf. These drivers are supplied with a predetermined power from a power supply circuit 63 via a wiring conductor (not shown).

[Panel Structure] FIG. 2 is a perspective view showing the internal structure of the PDP. In the PDP 1, the front-side substrate structure 10
On the inner surface of the glass substrate 11 as a base material, main electrodes X and Y are arranged in pairs for each row. A row is a horizontal cell column in the screen ES. The main electrodes X and Y each include a transparent conductive film 41 and a metal film (bus conductor) 42,
It is covered with a dielectric layer 17. On the surface of the dielectric layer 17, a protective film 18 made of magnesia (MgO) is provided. The address electrodes A are arranged on an inner surface of a glass substrate 21 which is a base material of the rear-side substrate structure 20, and are covered with a dielectric layer 24. On the dielectric layer 24, one partition 29 having a linear band shape in a plan view is provided between each address electrode A. These partition walls 29 divide the discharge space 30 into sub-pixels in the row direction, and define the gap size of the discharge space 30. And
R and R for color display are coated so as to cover the inner surface on the back side including the upper side of the address electrode A and the side surface of the partition wall 29.
Phosphor layers 28R, 28G, and 28B of three colors G and B are provided. One pixel (pixel) of the display is composed of three sub-pixels arranged in the row direction. The structure within each sub-pixel is a cell (display element). The discharge space 30 is filled with a discharge gas in which xenon is mixed with neon as a main component, and the phosphor layers 28R, 28G, and 28B are locally excited by ultraviolet rays emitted by xenon during discharge to emit light. Since the arrangement pattern of the partition walls 29 is a stripe pattern, a portion corresponding to each column in the discharge space 30 is continuous in the column direction across all rows.

[Field Configuration] In the display of a television image, in order to reproduce gradation by binary lighting control, each field of an input image in a time series is divided into a predetermined number (for example, 8) of subfields. To divide. That is, each field f forming a frame is replaced with a set of a plurality of subfields (when a non-interlaced image such as a computer output is reproduced, each frame is divided into a predetermined number). Then, the relative ratio of luminance in these subfields is approximately 1:
The number of display discharges in each subfield is set by weighting so as to be 2: 4: 8: 16: 32: 64: 128. R in combination of lighting / non-lighting in subfield units
Since 256 levels of luminance can be set for each of the colors GB, the number of colors that can be displayed is 256 ³ .

[Driving Sequence] FIG. 3 is a voltage waveform diagram showing an outline of the driving sequence. The sub-field period Tsf allocated to each sub-field is for preparing the preparation period TR for equalizing the charge distribution on the screen, the address period TA for forming the charge distribution according to the display content, and the luminance according to the gradation level. , A sustain period TS in which the lighting state is maintained. The lengths of the preparation period TR and the address period TA are constant regardless of the luminance weight, but the length of the sustain period TS increases as the luminance weight increases. With respect to the drive waveform, the amplitude, polarity, and timing can be variously changed, and the waveform in FIG. 3 is an example. Here, an outline of a driving sequence repeated for each subfield will be described assuming that addressing in a writing format is performed.

(Preparation for Addressing) In the preparation period TR, an initialization pulse Prx is simultaneously applied to all the main electrodes X _{1 to} X _n . At the same time, all the address electrodes A _{1 to} A
applying a pulse Pra for preventing discharge between the main electrodes X ₁ to X _n to _m. The application of the pulse Prx causes a surface discharge between the main electrodes over the entire screen. And the pulse Pr
At the fall of x, self-erasing discharge occurs due to excessive wall charges, and the wall charges are almost completely eliminated. However, more wall charges may remain than usual due to environmental conditions and fluctuations in the power supply voltage. (Addressing) In the address period TA, wall charges necessary for maintaining lighting are formed only in cells to be lit. Hereinafter, the cell to be lit is referred to as a “lit cell” for convenience, and the other cells are referred to as “non-lit cells”. A scan pulse (row selection pulse) Py is applied to one main electrode Y corresponding to the selected row every row selection period (scan time for one row). At the same time, the address pulse Pa is applied only to the address electrode A corresponding to the lighting cell. That is, the subfield data D for m columns of the selected row
two values control the potential of the address electrodes A ₁ to A _m based on sf. In the lighting cell, a discharge occurs between the main electrode Y and the address electrode A, and an increase in the discharge probability due to the space charge generated thereby triggers a surface discharge between the main electrodes.
These series of discharges are address discharges. A desired wall charge is formed by the address discharge.

In the case of the erase address format, the entire surface is uniformly charged in the preparation period TR, an address discharge is generated only in the non-lighting cells, unnecessary wall charges are erased, and the wall charges are applied to the lighted cells. Try to leave.

[0030] In (sustaining) sustain period TS, the main electrodes X, the same polarity of the potential of all the address electrodes A ₁ to A _m and the sustain pulse Ps in order to prevent unnecessary discharge between the Y Bias. However, the bias voltage is usually lower than the sustain voltage (Vs) due to restrictions such as the withstand voltage of the circuit. Therefore, a positive charge tends to be attracted to the address electrode A.

With the address electrode A biased, a sustain pulse Ps is applied alternately to the main electrodes Y _{1 to} Y _n and the main electrodes X _{1 to} X _n . Since the peak value Vs of the sustain pulse Ps is lower than the discharge starting voltage between the main electrodes, the surface discharge does not occur unless the wall voltage is superimposed. Therefore, the address period TA
Only in the lighting cell in which the wall charges are formed in the sustain pulse Ps
Every time is applied, surface discharge occurs. [Potential Control Specific to the Present Invention] [Drive Waveform] FIG. 4 is a waveform diagram showing a first example of a drive voltage in an address period, and FIG. 5 is a waveform diagram showing a first example of a change in a cell voltage in an address period. .

With respect to the main electrodes Y _{1 to} Y _n , the main electrode Y in the selected row is temporarily biased to the potential Vya2 by applying a scan pulse Py while being biased to the potential Vya1 at a time.

On the other hand, with respect to the main electrodes X _{1 to} X _n , the pulse Px having the same polarity as the scan pulse Py is applied while the potential Vxa 1 having the same polarity as the address pulse Pa is collectively biased. The main electrode X is temporarily biased to the potential Vxa2. The amplitude of the pulse Px (change width of the bias potential) is equal to or smaller than the amplitude of the scan pulse Py. That is, | Vx
The bias potential is set so that a1−Vxa2 | ≦ | Vya2−Vya1 |. As for the potential Vxa2, the potential difference between the main electrode Y (the cell voltage V of the main electrodes between XY) is set to be slightly lower than the discharge starting voltage Vf _XY when applying the scan pulse Py.

The potential Vxa1 at which the potential difference between the main electrode X of the non-selected row and the address electrode A is smaller than the potential Vxa2.
By biasing (Vxa1> Vxa2 in the illustrated polarity), even if the wall voltage Vw _AX (A is positive and X is negative) between the electrodes AX is relatively high before the selected row, The cell voltage of the electrode AX (V _AX =
Vx + Vw _AX + Va) is the discharge starting voltage Vf of AX between the electrodes.
Not exceed _{AX [(Vw AX + Vaa + Vxa1)} <V
f _AX ], and no unnecessary discharge occurs in the electrode AX. Therefore, the wall voltage Vw _XY between the main electrodes XY does not change until the target row becomes the selected row, and a regular address discharge occurs when the selected row becomes the selected row.

FIG. 6 is a waveform chart showing a second example of the drive voltage during the address period, and FIG. 7 is a waveform chart showing a second example of the change in the cell voltage during the address period. In this example, after switching the bias of the main electrode X for the selected row from the potential Vxa1 to the potential Vxa2, the bias of the main electrode X is held at the potential Vxa2 until the end of the address period TA. Even when this waveform is employed, unnecessary discharge in the inter-electrode AX can be prevented as in the above-described example, and a regular address discharge can be generated.

[Circuit Configuration] FIG. 8 is a circuit diagram showing a first example of the configuration of the X driver. The subscripts (1,
2,... N) indicate the arrangement order of the corresponding rows. However, in the following description, when it is not necessary to distinguish the arrangement order, the suffix may be omitted.

The X driver 64 includes a total of 2n transistors Tr5, Tr6, n provided in pairs for each main electrode X.
Register 651 for individually turning on and off the transistors Tr5 and n transistors Tr6 at a predetermined timing, a switching circuit 661 for applying a sustain pulse to the main electrode X, and charging of the capacitance between the main electrodes. A power recovery circuit 662 for reducing power consumed for discharging,
Diode circuit 663 for preventing short circuit between main electrodes X
Consists of A total of 2n transistors Tr5 and Tr6, a shift register 651, and a diode circuit 663 are integrally integrated to constitute the X scan driver 65 described above. The switching circuit 661 connects the main electrode X to the sustain potential V
and a transistor Tr2 connecting the main electrode X to the ground line. The power recovery circuit 662 includes a recovery capacitor C1,
Transistors Tr3 and Tr4, diodes D3 and D4,
And inductors L1 and L2.

In the address period, each main electrode X receives the potential Vx by turning on the corresponding transistor Tr5.
The transistor Tr6 is connected to the power supply line of the potential Vxa2 when the transistor Tr6 is turned on. By setting the control timing of the transistor Tr5, FIG.
6 and the waveform of FIG. 6 can be realized.

In the sustain period, the transistor Tr1
The transistor Tr3 of the power recovery circuit 662 is turned on prior to the application of the sustain pulse by turning on the power supply. As a result, a charging current flows from the capacitor C1 to the capacitance between the main electrodes via the diode D3 and the inductor L1.
Prior to the fall (ground) of the sustain pulse due to the turning on of the transistor Tr2, the transistor Tr4 is turned on. As a result, charge moves from the capacitance between the main electrodes to the capacitor C1 via the inductor L2 and the diode D4, and power is recovered. Inductors L1 and L2
Forms a resonance circuit together with the capacitance between the main electrodes to speed up charging and discharging. Note that the Y driver 67 also includes a power recovery circuit, and recovers power similarly to the X driver 64.

FIG. 9 is a circuit diagram showing a second example of the configuration of the X driver. The X scan driver 65b in the X driver 64b of the present example is obtained by omitting the transistor Tr5 in the X scan driver 65 in FIG. In the X driver 64b, a transistor Tr7 and a diode D7 for connecting the main electrode X to a power supply line of the potential Vxa1 collectively are provided in a form external to the X scan driver 65b.

With the configuration of this example, the waveform of FIG. 6 can be realized. Since the configuration of the X scan driver 65b can be simplified by omitting the transistor Tr5, the cost for integration can be reduced.

FIG. 10 is a circuit diagram showing another example of the X scan driver. The X scan driver 65c includes a total of 2n diodes D5 provided in pairs for each main electrode X.
D6, a current path BUS1 common to the n main electrodes X and a potential V
A transistor Tr7 for controlling the connection between the power supply line of xa1 and the transistor Tr8 for controlling a connection between the power supply line BUS1 and the power supply line of the potential Vxa2, diodes D7 and D8 for regulating the current direction, and control from the control circuit 61 Gate drivers DR7 and DR8 for controlling the transistors Tr7 and Tr8 with the signals S7 and S8 are provided.

At the start of the address period, the transistor T
turned on r7, biasing all the main electrodes X to the potential Vxa1 to charge the capacitance C _XY between the main electrodes. After that, the transistor Tr7 is turned off and the transistor Tr8 is turned on. Here, since Vxa1> Vxa2, the potential Vx
No current flows from the power supply line a2 to the main electrode X. For example, considering a case where the scan pulse is applied to the second main electrodes Y ₂ row, between the main electrodes XY are capacitively coupled, the current to the main electrode X ₂ transistor Tr7 is off in addition since there is no path for pouring, the potential of the main electrode X ₂ is dragged to the potential change of the main electrode Y _2. Main electrode X ₂
When the potential reaches its potential Vxa2 reduced, more so current flows from the power supply line of the potential Vxa2 does not fall potential, the potential of the main electrode X ₂ is held in Vxa2. Thereafter, when the potential of the main electrode Y ₂ is returned to Vya1 a base potential, the potential of the main electrode X ₂ is dragged by the potential change of the main electrode Y ₂ rises. At this time, the main electrode X ₂
When the potential of the attempts to rise above Vxa1, the current is returned via the diode D5 ₂ to the power supply line,
Potential of the main electrode X ₂ is held in Vxa1. As described above, a pulse-like potential change occurs in the main electrode X in the same direction as the paired main electrode Y, and the amplitude of the pulse is Vxa1 and Vxa1.
The value is within the range of the difference from a2.

[0044] Incidentally, the capacitance, not only between the main electrodes each other forming a pair, the main electrodes X of the adjacent row, so also present between the Y, the scan pulse to the main electrode Y ₂ in the above example binding waveform related to the somewhat appears to like main electrodes X _1. However, slight capacitive coupling does not affect driving.

According to the circuit configuration of FIG. 10, the waveform of FIG. 4 can be generated without using an integrated circuit having transistors of the number of rows, so that the circuit cost can be reduced. However, a total of 2n diodes D5, D6
The X driver may be configured by circuit components integrating the above.

[0046]

According to the first to eighth aspects of the present invention,
Unnecessary discharge during the address period can be prevented, and the addressing stability can be improved.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a display device according to the present invention.

FIG. 2 is a perspective view showing an internal structure of the PDP.

FIG. 3 is a voltage waveform diagram showing an outline of a driving sequence.

FIG. 4 is a waveform chart showing a first example of a driving voltage in an address period.

FIG. 5 is a waveform chart showing a first example of a change in a cell voltage during an address period.

FIG. 6 is a waveform chart showing a second example of a drive voltage during an address period.

FIG. 7 is a waveform chart showing a second example of a change in cell voltage during an address period.

FIG. 8 is a circuit diagram showing a first example of a configuration of an X driver.

FIG. 9 is a circuit diagram showing a second example of the configuration of the X driver.

FIG. 10 is a circuit diagram showing another example of the X scan driver.

FIG. 11 is a waveform chart showing a change in cell voltage during an address period in the related art.

[Explanation of symbols]

X main electrode (first main electrode) Y main electrode (second main electrode) A address electrode 1 PDP TA address period (period for performing addressing) Px pulse (pulse applied to first main electrode of selected row) Vxa1 potential ( Vxa2 potential (second potential) 60 drive unit (drive device) 65, 65b, 65c X scan driver (potential switching circuit) 61 control circuit (controller) BUS1 conduction path TR7 transistor (first switching element) TR8 transistor (Second switching element) D6 Diode C _XY Capacitance (capacity between electrodes) Py Scan pulse (row selection pulse) 68 Y scan driver (scanning circuit) Ps sustain pulse 66 X common driver (first switching circuit) 69 Y Common driver (second switching circuit) TS suspension In the period (display period) 100 display device

Continued on the front page (51) Int.Cl. ⁷ Identification code FI Theme coat II (reference) H04N 5/66 101 G09G 3/28 HEF term (reference) 5C058 AA11 BA01 BB25 5C080 AA05 BB05 CC03 DD09 EE29 EE30 FF12 GG02 GG08 GG12 HH02 HH04 JJ02 JJ03 JJ04 JJ06 5C094 AA02 AA55 BA31 CA19 EA03 EA04 EA07 GA10 HA08

Claims (8)

[Claims] An electric potential control for a plurality of second main electrodes constituting an electrode pair for surface discharge for each row together with a plurality of first main electrodes, and a plurality of address electrodes intersecting with the electrode pair, What is claimed is: 1. A method of driving a surface discharge type PDP which performs addressing for controlling the charge of each cell in a screen in accordance with display contents, wherein a potential of a second main electrode in a selected row is set to an address electrode during the addressing. A surface discharge type PDP in which the potential of the first main electrode is changed so that the potential difference between the first main electrode and the address electrode is increased only in the selected row in synchronization with the row selection in which the potential difference is temporarily increased. Drive method. 2. The method of driving a surface discharge type PDP according to claim 1, wherein the variation width of the potential of the first main electrode of the selected row is equal to or less than the variation width of the potential of the second main electrode of the selected row. 3. The surface discharge type PD according to claim 1, wherein a pulse having the same polarity as the row selection pulse is applied to the first main electrode of the selected row in synchronization with the application of the row selection pulse to the second main electrode.
P driving method. 4. After the potential of the first main electrode of the selected row is changed from the first potential to the second potential in synchronization with the row selection, the first main electrode is kept as it is until the end of the period. 2. The method of driving a surface discharge type PDP according to claim 1, wherein the PDP is maintained at a potential. 5. A plurality of first main electrodes and a plurality of second main electrodes are arranged so as to form an electrode pair for surface discharge for each row, and intersect with said electrode pair in each column. A surface discharge type PDP having a screen on which a plurality of address electrodes are arranged,
A drive device for applying a voltage for display, comprising: a potential switching circuit for individually switching potentials of the plurality of first main electrodes; and an address for controlling a charge of each cell in a screen according to display contents. During the period, the potential of the first main electrode with respect to only the selected row is changed to the potential of the address electrode in synchronization with the row selection in which the potential of the second main electrode of the selected row is changed so that the potential difference with the address electrode temporarily increases. A controller for controlling the potential switching circuit so that a potential difference increases. 6. A plurality of first main electrodes and a plurality of second main electrodes are arranged so as to form an electrode pair for surface discharge for each row, and intersect the electrode pair in each column. A surface discharge type PDP having a screen on which a plurality of address electrodes are arranged,
A drive device for applying a voltage for display, comprising: a first switching element for controlling connection between a power supply line common to the plurality of first main electrodes and a power supply line at a first potential; A second switching element for controlling connection between the first main electrode and a second power supply line; and a second switching element for controlling connection between the plurality of first main electrodes.
A plurality of diodes for preventing conduction from each first main electrode to another first main electrode; and a plurality of diodes between the electrode pairs immediately before the start of addressing for controlling the charge of each cell in the screen according to the display content. The first switching element is temporarily closed to charge a capacitor and simultaneously bias the plurality of first main electrodes to the first potential, and the second switching is performed from the start to the end of the addressing. A drive device comprising: a controller that closes an element. 7. A scanning circuit for individually applying a row selection pulse to said plurality of second main electrodes, and a sustaining pulse having a peak value lower than a discharge starting voltage between the main electrodes is applied to said plurality of first main electrodes. First for applying to all at once
A switching circuit, and a second switching circuit for collectively applying the sustain pulse to the plurality of second main electrodes, wherein the controller controls the scanning circuit to perform the row selection during the address period. Controlling the plurality of first main electrodes and the plurality of second main electrodes during a display period following the address period.
7. The driving device according to claim 5, wherein the first switching circuit and the second switching circuit are controlled so as to alternately apply the sustain pulse to a main electrode. 8. A display device comprising: the driving device according to claim 7; and a surface discharge type PDP driven by the driving device.