KR100704454B1 - Plasma display panel driving methods using selective erasing technique - Google Patents

Abstract

A method of driving a plasma display panel of a selective erase driving method is disclosed. The driving method of the present invention comprises a plurality of subfields each including an address section and a sustain section, wherein the sustain section includes a plurality of sustain pulses sequentially applied to the first and second electrodes, and the plurality of sustain pulses. The sustain pulse of the last sustain pulse of the middle of the last sustain pulse provides a selective erasing plasma display panel driving method characterized in that the width of the sustain pulse is larger than the fall width. According to the present invention, it is possible to provide a plasma display panel without lowering the discharge efficiency by suppressing the self-erasing phenomenon in the sustain section generated in the plasma display panel driven by the selective erasing method.

Selective erase drive, PDP, sustain pulse, falling edge, edge width

Description

Selective erasing method of driving plasma display panel {PLASMA DISPLAY PANEL DRIVING METHODS USING SELECTIVE ERASING TECHNIQUE}

1 is an exploded perspective view schematically showing the structure of a conventional AC three-electrode surface discharge PDP.

2 is a frame configuration diagram of an AC type surface discharge PDP.

3 is a waveform diagram showing a drive waveform of a conventional selective erasure driving method for driving a conventional AC type surface discharge PDP.

4 is a waveform diagram conceptually illustrating a selective erasure driving waveform of a PDP according to the present invention.

FIG. 5 is an enlarged view of the sustain pulse n-1 _sus immediately before the last sustain pulse in FIG. 4.

FIG. 6 is a diagram showing an example of a sustain driving circuit for differentiating the falling width of the last sustain pulse in the present invention.

 7A and 7B are waveform diagrams illustrating a method of varying the width of the sustain pulse falling section through timing control of the falling section.

<Brief description of the symbols in the drawings>

10: front panel 11, 21: glass substrate

12 dielectric layer 13 transparent electrode

14 bus electrode 15 protective layer

20: back plate 23: bulkhead

25: phosphor layer

The present invention relates to a method of driving a plasma display panel, and more particularly, to a plasma display panel driving method of a selective erasure driving method.

1 is an exploded perspective view schematically showing the structure of a conventional PDP. The PDP of the illustrated structure is particularly referred to as a three-electrode surface discharge type PDP.

Referring to FIG. 1, a conventional PDP includes a front plate 10 displaying information and a back plate 20 positioned parallel to the front plate 10.

The front plate 10 includes a pair of display electrodes arranged in parallel on the glass substrate 11, that is, a scan electrode Y and a sustain electrode Z. The back plate 20 is a glass substrate ( 21 includes address electrodes X arranged in a direction perpendicular to the display electrodes Y and Z. A plurality of the display electrode pairs and the address electrodes are arranged in rows and columns on the front plate 10 and the back plate 20.

The display electrode is generally composed of a conductive film 13 made of a transparent electrode such as indium tin oxide (ITO), and an edge of the transparent conductive film to compensate for the high resistance of the transparent conductive film 13. A bus electrode 14 formed of a conductive metal such as chromium or silver is arranged along the line. A dielectric layer 12 of low melting glass having a predetermined thickness is coated on the display electrodes Y and Z, and a protective layer 15 such as magnesium oxide is deposited on the surface thereof.

A dielectric layer (not shown) having a predetermined thickness is coated on the address electrode X, and partition walls 23 having a predetermined height are arranged in a direction parallel to the address electrode A on the dielectric layer. Discharge spaces are defined and subdivided for each subpixel by these partitions 23. The partition 23 is provided with phosphor layers 25 of red, green, and blue for color display. The discharge space for the plasma discharge is filled in the discharge space between the front plate 10 and the back plate 20, and one pixel in the phosphor layer 25 is composed of three subpixels arranged side by side in the row direction. do. The structure within a subpixel is usually called a cell.

FIG. 2 is a diagram conceptually showing a configuration of unit frames constituting a PDP image. Referring to FIG. 2, the PDP has eight subfields of different brightness for one TV field (= 16.7 ms) representing an image for 256-gradation representation, and each subfield is re-initialized period, address period (or write-in). Period) and discharge sustain period. Here, each subfield has a length of discharge sustain period corresponding to 2 ⁰ , 2 ¹ , 2 ² , 2 ³ , 2 ⁴ , 2 ⁵ , 2 ⁶ , 2 ⁷ , and 256 is a combination of these subfields. (= 2 ⁸ ) Gradation can be expressed. In the ADS driving method, the initialization period, the address period, and the discharge sustain period proceed simultaneously for all the scan lines on the panel.

The above-described conventional PDP is driven by selective writing (SW) and selective erasing (SE) depending on whether discharge cells selected by discharge in the address period are emitted.

The selective write driving method turns off the full screen in the reset section, selects on-cells to be turned on in the address section, and displays an image by maintaining the discharge of the on-cells selected by the address discharge during the sustain section. do. In this selective write method, a scan pulse for selecting a scan line and causing an address discharge is set to have a relatively wide pulse width. Because of this, the selective writing method has a long address section, making it difficult to secure a sustain section, and thus it is difficult to cope with high resolution, low luminance, and subfields to reduce image quality degradation factors such as pseudo contour noise that may appear in a video. There is also a problem that is difficult to add.

In order to solve this problem, a selective erase method has been proposed. 3 is a view illustrating a driving waveform according to a conventional method of driving a plasma display panel of a selective erasure method.

Referring to FIG. 3, the first subfield SF1 included in one frame of the conventional plasma display panel generates a reset discharge in all the discharge cells of the plasma display panel to turn on the discharge cells. It is divided into an address period APD for selectively turning off the discharge cells turned on in the reset period RPD and a sustain period SPD causing sustain discharge in discharge cells not selected in the address period APD.

The reset section RPD is divided into a ramp pulse supply section RPD1 for supplying a lamp pulse to the scan electrode Y and the sustain electrode Z, and a stabilization pulse signal supply section RPD2 through which a stabilization pulse is supplied. The lamp pulse of positive polarity (+) is supplied to the scan electrode (Y) in the lamp pulse supply section (RPD1), the lamp pulse of negative polarity (-) is supplied to the sustain electrode (Z), and to the address electrode (X). Base potential is supplied. Here, the peak value of the positive ramp pulse is set to the same voltage as the sustain voltage Vs. In addition, the absolute value of the peak value of the negative lamp pulse is set to the voltage of the absolute value higher than the sustain voltage Vs. As described above, when the lamp pulse of the positive electrode is supplied to the scan electrode Y and the lamp lamp of the negative polarity is supplied to the sustain electrode Z during the lamp pulse supply period RPD1, the scan electrode Y and the sustain electrode Z are supplied. The reset discharge is generated in all the discharge cells by the voltage difference therebetween. This discharge forms negative wall charges on the scan electrode Y to which the positive lamp pulses are supplied, and positive wall charges are formed to the sustain electrode Z to which the negative lamp pulses are supplied.

The first stabilization pulse Rz is supplied to the sustain electrode Z in the stabilization pulse supply section RPD2, and then the second stabilization pulse Ry is supplied to the scan electrode Y. At this time, the voltage values of the first stabilization pulse Ry and the second stabilization pulse Rz are set equal to the sustain voltage Vs. Therefore, the stabilization discharge is generated between the scan electrode Y and the sustain electrode Z by the difference in the sustain voltage Vs between the scan electrode Y and the sustain electrode Z, so that uniform wall charges are formed in all the discharge cells. do.

In the address period APD, scan pulses sequentially lowered to the negative polarity (−) scan voltage are supplied to the scan lines Y, and data pulses synchronized with the scan pulse are supplied to the address electrodes X. Accordingly, in the discharge cells supplied with the data pulses, address discharge, that is, erase discharge, is generated, and wall charges in the discharge cells are erased. At this time, the wall charges formed in the reset period are sufficiently maintained in the discharge cells in which the erase discharge is not generated.

The sustain pulse SPD is alternately supplied to the scan electrodes Y and the sustain electrodes Z in the sustain period SPD. In the off-cells selected in the address period, even when the first sustain pulse is applied to the sustain electrode Z, no discharge occurs because the wall charges on the sustain electrode Z and the scan electrode Y are erased by the erase discharge. On the other hand, on-cells not selected in the address period are discharged when the first sustain pulse is applied to the sustain electrode, and the inversion of the discharge and the wall charge polarity is repeated for each sustain pulse during the sustain period.

However, in the selective erasing scheme, self-erasing discharge occurs due to a sudden change in the space charge and the external applied voltage in the on-cells in which the discharge is generated by the last sustain pulse. Accordingly, when the reset operation is not performed in the subsequent subfield. In the sustain period, when the sustain voltage is applied, the discharge luminance is lowered or the discharge is turned off, thereby lowering the panel efficiency.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method of driving a plasma display panel of a selective erasing method suitable for suppressing self erasing discharge occurring in a sustain period in a selective erasing plasma display panel driving.

In order to achieve the above technical problem, the present invention comprises a plurality of subfields each including an address section and a sustain section, wherein the sustain section includes a plurality of sustain pulses sequentially applied to the first and second electrodes. In addition, the sustain pulse of the last sustain pulse of the plurality of sustain pulses of the plurality of sustain pulses than the falling width of the remaining sustain pulse provides a selective erasing method of the plasma display panel driving method.

In the present invention, the falling section of the last sustain pulse is preferably larger by 200 ~ 400 ns than the rest of the sustain pulse, it is preferable that the last sustain pulse is continuously reduced in the falling section.

In the present invention, at least some of the plurality of sustain pulses may include a section in which the falling section decreases slowly and a section in which the drop decreases rapidly.

In the present invention, the sustain driver of the plasma display panel includes an energy recovery path from the panel, and the difference between the falling width of the last sustain pulse and the remaining sustain pulse can be obtained by on / off timing control of the energy recovery path. have. In contrast, the sustain driver of the plasma display panel includes two energy recovery paths having different energy recovery periods, and a difference between the falling widths of the last sustain pulse and the remaining sustain pulses may be obtained by switching the two paths.

In the present invention, the width of the last sustain pulse is preferably larger than the width of the remaining sustain pulses.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. Like reference numerals in the following drawings refer to like or similar components.

4 is a waveform diagram conceptually illustrating a selective erasure driving waveform of a PDP according to the present invention.

Referring to FIG. 4, the driving waveform is similar to the driving waveform described above with reference to FIG. 2, and at least one subfield in the one TV field includes a reset period (RPD), an address period (APD), and a sustain period (SPD). It is configured to include.

Of course, the present invention not only includes a case in which each subfield is composed of a reset period (RPD), an address period (APD), and a sustain period (SPD), but also includes a reset period (RPD) shown in FIG. 4 to improve the contrast ratio. This is particularly useful if it exists only in the first subfield of the TV field.

In the illustrated driving waveforms, the waveforms applied in the reset period RPD and the address period APD are the same as those described with reference to FIG. 2, and thus description thereof is omitted.

After the first sustain pulse 1 _sus is applied to the scan electrode Y in the sustain period SPD, a plurality of sustain pulses are alternately applied to the sustain electrode Y and the scan electrode Z. As shown, the plurality of sustain pulses may be composed of a sustain pulse stabilization section (A) and a rear end sustain pulse section (B) to prevent mis-discharge at the front end of the sustain section. The driving method is applicable.

As described above, after the pair of sustain pulses are sequentially applied to the scan electrode and the sustain electrode, the last sustain pulse n _sus is applied to the scan electrode Y. The last sustain pulse n _sus is used when there is no separate reset section in a subsequent subfield or when only a simple reset pulse is provided unlike the reset section, thereby performing a reset function as well as the last sustain pulse. (n _sus ) forms a state of wall charge suitable for addressing subsequent subfields.

5 is an enlarged view of the sustain pulse n-1 _sus immediately before the last sustain pulse.

Referring to FIG. 5, the last sustain pulse n-1 _sus has a falling section width that is greater than Δt than the falling section width of another sustain pulse in the corresponding subfield. In the drawings, the pulse dropping intervals of the other sustain pulses in the subfield are shown by a dotted line for comparison with the present invention.

As described above, in the present invention, the last sustain pulse n-1 _sus has a falling section having a gentle inclination compared to other sustain pulses, thereby reducing wall charges due to self-erasing in the sustain section. Suppress

In the present invention, it is preferable that the difference Δt of the width of the falling section between the last sustain pulse and the remaining sustain pulse is about 200 ns larger than the other sustain pulses in the subfield. In addition, considering the time available in a given subfield, the difference Δt of the section width may be limited to 400 ns or less.

As such, various methods may be used to adjust the width of the falling section of the specific sustain pulse.

FIG. 6 is a diagram showing an example of a sustain driving circuit for differentiating the falling width of the last sustain pulse in the present invention.

A method of changing the width of the falling section of the last sustain pulse with reference to FIGS. 5 and 6 is as follows.

First, in the initial state, immediately before the switch SW1 is turned on, the switch SW5 is turned on so that the voltage Vp at both ends of the panel is maintained at 0V. At this time, the power recovery capacitor Cc is precharged with a voltage Vs / 2 equal to 1/2 of the externally applied voltage Vs so that an inrush current does not occur at the start of sustain discharge.

In this state, when the voltage Vp of both panels of the panel is maintained at 0 V, when the time t0 is reached, the switch SW1 is turned on and the switches SW2, SW3, SW4, and SW5 are turned off. . At this time, the power recovery capacitor (Cc), the switch (SW1), a diode (D1), the inductor (L1), and because of the path of the plasma display panel capacitor (Cp) is formed in the LC resonant circuit inductor (L ₁₎ Current I _L flows and the output voltage Vp of the panel increases.

Then, the switch SW4 is turned on at the time t1 and the switches SW1, SW2, SW3, and SW5 are turned off. At this time, the externally applied voltage Vs flows directly to the panel capacitor Cp through the switch SW4 to maintain the output voltage Vp of the panel.

Next, when the switch SW2 is turned on at the time t2 and the switches S1, S3, S4, and S5 are turned off, the plasma display panel capacitor Cp, the inductor L2, the diode D2, the switch SW2, And the LC resonant circuit is formed by the path of the power recovery capacitor Cc, and the output voltage Vp of the panel decreases along the dotted line so that the panel output voltage Vp of the inductor L2 becomes zero at time t3. .

At the time t3, when the switch SW5 is turned on and the switches SW1, SW2, SW3, and SW4 are turned off, the panel output voltage Vp maintains 0V.

As described above, in order to adjust the width of the falling pulse section in the present invention, as shown in FIG. 6, the sustain driving circuit has an additional inductance L3. This inductance has a larger inductance than the inductance L2 in order to increase the width of the falling section. The added inductance L3 allows to form a gentler falling period, ie the falling period of the last sustain pulse of the present invention.

Hereinafter, the switching operation of the sustain driving circuit related thereto will be described. First, the switching operation from t0 to t1 to t2 is the same as described above.

When the switch SW3 is turned on at t2 and the switches SW1, SW2, SW4, and SW5 are turned off, the plasma display panel capacitor Cp, the inductor L3, the diode D3, the switch SW3, and the power cycle The LC resonant circuit is formed by the path of the accommodating capacitor Cc, and the output voltage Vp of the panel is the panel capacitor Cp, the inductor L2, the diode D2, the switch SW2 and the power circuit. Compared with the LC resonant circuit formed by the accommodating capacitor Cc, it is gradually decreased, and the panel output voltage Vp of the inductor L2 becomes zero at the time t3 '. Subsequently, when the switch SW5 is turned on at the time t3 'and the switches SW1, SW2, SW3, and SW4 are turned off, the panel output voltage Vp is maintained at 0V.

By supplying the sustain pulses using the different paths as described above, the widths of the falling sections between the last sustain pulse and the remaining sustain pulses can be differentiated.

In the case where a separate circuit is used to differentiate the sustain falling section width, that is, the energy recovery cycle itself is controlled as an example, the present invention uses a different method, for example, timing the pulse section within the energy recovery cycle. It may be achieved by controlling.

7A and 7B are waveform diagrams illustrating a method of varying the width of the sustain pulse falling section through timing control of the falling section.

First, in FIG. 7A, a sustain pulse waveform having a rising section of 300 ns and a falling section of 600 ns is illustrated. The falling section of the pulse is composed of a section (Er_dn1) in which the voltage gradually decreases and a section (Er_dn2) in which the voltage falls rapidly.

7b shows a sustain pulse waveform with a rising section of 300 ns and a falling section of 800 ns. The falling section of the pulse can be seen that the pulse is slowly falling over the entire section.

Waveforms having two kinds of falling widths as shown can be obtained respectively by timing control in the energy recovery period.

This will be described with reference to FIGS. 5 and 6 as follows. In the following description, it is considered that the switch S2 and the inductor L2 of FIG. 6 do not exist on the circuit.

The switching operations of SW1, SW3, SW4, and SW5 for forming the sustain pulse rising section and the sustain section in the section t0 → t2 are as described above.

When the switch SW3 is turned on at the time t2 and the switches SW1, SW4, and SW5 are turned off, the plasma display panel capacitor Cp, the inductor L3, the diode D3, the switch SW3, and the power recovery capacitor The LC resonant circuit is formed by the path of Cc, and the output voltage Vp of the panel is the panel capacitor Cp, the inductor L2, the diode D2, the switch SW2, and the power recovery capacitor. Compared with the LC resonant circuit formed by (Cc), it gradually decreases along the solid line of FIG. Subsequently, when the switch SW5 is turned on at the time t3 and the switches SW1, SW3, SW4 are turned off, the panel output voltage drops rapidly along the dashed-dotted line to become 0, and remains in this state. By this driving, a waveform having a falling section as shown in Fig. 7A is obtained.

On the contrary, if the turn-on state of the switch SW3 is continuously maintained from time t3 to t3 'and the switch SW5 is turned on at time t3 and the switches SW1, SW3, and SW4 are turned off, the falling section shown in FIG. A waveform with a gentle slope throughout can be obtained.

As described above with reference to FIGS. 5 and 6, by switching the switch S5 at any point in the energy recovery period, pulse waveforms having different falling section widths may be generated.

Preferred embodiments of the present invention described above are merely illustrative of the present invention, and the present invention may be variously modified and may take various forms from such examples. Therefore, the present invention should not be construed as limited to the specific forms mentioned in the detailed description, but as including all modifications, equivalents, and substitutes falling within the spirit and scope of the invention as defined by the appended claims. Should be.

According to the present invention, it is possible to provide a plasma display panel without lowering the discharge efficiency by suppressing the self-erasing phenomenon in the sustain section generated in the plasma display panel driven by the selective erasing method. The driving method of the present invention can be implemented in various ways. In some cases, the present invention can be easily applied to a conventional plasma display panel because a desired sustain waveform can be formed without a configuration added to a conventional driving circuit.

Claims (7)

Each of the plurality of subfields includes an address section and a sustain section, wherein the sustain section includes a plurality of sustain pulses sequentially applied to the first and second electrodes, and immediately before the last sustain pulse among the plurality of sustain pulses. The sustain pulse of the plasma display panel driving method of the selective erasing method, characterized in that the falling section width is larger than the falling width of the remaining sustain pulse. The method of claim 1, The difference between the widths of the remaining sustain pulses and the falling section of the last sustain pulse is 200 or more and 400 ns or less. The method of claim 1, And the last sustain pulse is continuously reduced in the falling section. The method of claim 1, At least some of the plurality of sustain pulses includes a period in which the falling section is gently reduced and the abruptly decreasing section. The method of claim 1, A sustain driver of the plasma display panel includes an energy recovery path from the panel; And the difference between the falling width of the last sustain pulse and the remaining sustain pulse is obtained by on / off timing control of the energy recovery path. The method of claim 1, The sustain driver of the plasma display panel includes two energy recovery paths having different energy recovery periods. And the difference between the falling widths of the last sustain pulse and the remaining sustain pulses is obtained by switching the two paths. The method of claim 1, And the width of the last sustain pulse is greater than the width of the remaining sustain pulses.

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