KR20010058585A - Film adhesive for semiconductor package - Google Patents
Film adhesive for semiconductor package Download PDFInfo
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- KR20010058585A KR20010058585A KR1019990065935A KR19990065935A KR20010058585A KR 20010058585 A KR20010058585 A KR 20010058585A KR 1019990065935 A KR1019990065935 A KR 1019990065935A KR 19990065935 A KR19990065935 A KR 19990065935A KR 20010058585 A KR20010058585 A KR 20010058585A
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- film adhesive
- semiconductor chip
- wafer
- semiconductor
- sawing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Dicing (AREA)
Abstract
Description
본 발명은 반도체패키지용 필름 접착제에 관한 것으로, 더욱 상세하게 설명하면 필름 접착제를 개재하여 웨이퍼를 마운트프레임에 탑재하고, 소잉한 상태에서 낱개의 반도체칩으로 픽업시 그 필름 접착제의 찌꺼기 등에 의한 반도체칩 및 회로기판 등의 오염을 방지할 수 있는 반도체패키지용 필름 접착제에 관한 것이다.The present invention relates to a film adhesive for a semiconductor package, and more specifically, to a semiconductor chip mounted on a mount frame via a film adhesive, and picked up by a single semiconductor chip in a sawing state, the semiconductor chip may be formed by the residue of the film adhesive or the like. And it relates to a film adhesive for semiconductor packages that can prevent contamination of circuit boards and the like.
통상적으로 다수의 반도체칩이 형성된 웨이퍼는 태키테이프 등이 접착되어 있는 마운트프레임에 탑재된 후, 다이아몬드 블레이드 등에 의해 낱개의 반도체칩으로 소잉된다. 상기 소잉 작업이 완료된 후에는 양품의 반도체칩만을 소정의 픽업수단으로 픽업하여 리드프레임이나 인쇄회로기판 등에 탑재한다. 이때 상기 리드프레임이나 인쇄회로기판에는 미리 소정의 접착제가 도포된 상태이다.Typically, a wafer on which a plurality of semiconductor chips are formed is mounted on a mount frame to which tacky tapes and the like are bonded, and then sawed into individual semiconductor chips by a diamond blade or the like. After the sawing operation is completed, only good semiconductor chips are picked up by a predetermined pickup means and mounted on a lead frame or a printed circuit board. At this time, a predetermined adhesive is applied to the lead frame or the printed circuit board in advance.
한편, 최근에는 상기와 같이 리드프레임이나 인쇄회로기판 등에 접착제를 미리 도포하지 않고, 처음부터 웨이퍼의 후면에 필름 접착제 등을 개재한 후, 낱개의 반도체칩으로 소잉한 후, 그 반도체칩을 직접 리드프레임이나 인쇄회로기판에 접착하는 기술이 개발되었다.On the other hand, in recent years, the adhesive is not previously applied to a lead frame or a printed circuit board as described above, and after the film adhesive is interposed on the back of the wafer from the beginning, the saw is cut into individual semiconductor chips, and then the semiconductor chip is directly read. A technique for bonding to a frame or a printed circuit board has been developed.
이를 도1내지 도4를 참조하여 좀더 상세히 설명한다.This will be described in more detail with reference to FIGS. 1 to 4.
먼저 도1에 도시된 바와 같이 링 형태로 구비된 마운트프레임(12)을 구비하고, 상기 마운트프레임(12)의 하면이나 상면에는 접착성이 있는 태키테이프(14) 등을 접착시킨다. 그런 후, 접착성이 상기 태키테이프(14)에 비해 상대적으로 강한 필름 접착제(2')를 개재하여 웨이퍼(6)를 상기 태키테이프(14)상에 접착시킨다.First, as shown in FIG. 1, a mount frame 12 provided in a ring shape is provided, and a tacky tape 14 having an adhesive property is attached to a lower surface or an upper surface of the mount frame 12. Then, the wafer 6 is adhered onto the tacky tape 14 via the film adhesive 2 ', which is relatively strong as compared to the tacky tape 14.
다음으로 도2에 도시된 바와 같이 다이아몬드 블레이드(18) 등을 이용하여 상기 웨이퍼(6)에 형성된 각 반도체칩(8)을 소잉한다. 이때, 상기 소잉은 반도체칩(8)끼리의 경계라인(10)을 따라서 수행한다.Next, as shown in FIG. 2, each of the semiconductor chips 8 formed on the wafer 6 is sawed using a diamond blade 18 or the like. At this time, the sawing is performed along the boundary line 10 between the semiconductor chips 8.
또한, 이때 상기 블레이드(18)는 웨이퍼(6) 및 필름 접착제(2')를 관통하여 태키테이프(14) 일부 영역까지 소잉한다.In addition, the blade 18 passes through the wafer 6 and the film adhesive 2 'to saw a portion of the tacky tape 14.
즉, 도3에 도시된 바와 같이 소잉홈(16)은 웨이퍼(6) 및 필름 접착제(2')를 관통하고 태키테이프(14)의 대략 1/3~2/3의 깊이까지 형성되도록 한다.That is, as shown in FIG. 3, the sawing groove 16 penetrates the wafer 6 and the film adhesive 2 ′ and is formed to a depth of approximately 1/3 to 2/3 of the tacky tape 14.
다음으로 도4에 도시된 바와 같이 흡착수단(20) 등을 이용하여 상기 웨이퍼(6)로부터 낱개의 반도체칩(8)을 픽업한다. 상기와 같이 픽업된 반도체칩(8)은 도시하지 않았지만 리드프레임이나 인쇄회로기판 등에 직접 접착되어 탑재된다.Next, as shown in FIG. 4, the individual semiconductor chips 8 are picked up from the wafer 6 using the adsorption means 20 or the like. Although not shown, the semiconductor chip 8 picked up as described above is directly attached to a lead frame, a printed circuit board, or the like.
따라서, 이러한 방법은 종래의 접착제 도포 단계가 생략됨으로써 최근 많이 이용되고 있는 추세지만 다음과 같은 몇가지 문제를 가지고 있다.Therefore, this method has been used in recent years by omitting the conventional adhesive coating step, but has some problems as follows.
즉, 상기 필름 접착제는 그 표면에 접착성분이 개재되어 있음으로써, 소잉시 필름 접착제의 일부가 상기 태키테이프의 소잉홈에 강하게 접착된다. 따라서, 흡착수단으로 픽업시 상기 소잉홈에 강하게 접착되어 있던 필름 접착제의 일부 찌꺼기가 마치 가는 실처럼 되어 상기 반도체칩의 경로를 따라 움직이게 된다. 이러한 현상은 반도체패키지 제조 공정중 심각한 불량을 야기시킬 수 있다.That is, the film adhesive has an adhesive component interposed therebetween so that a portion of the film adhesive is strongly adhered to the sawing groove of the tacky tape when sawing. Therefore, some of the film adhesive, which is strongly adhered to the sawing groove when picked up by the suction unit, becomes like a thin thread and moves along the path of the semiconductor chip. This phenomenon can cause serious defects in the semiconductor package manufacturing process.
그 예로, 상기 필름 접착제의 찌꺼기가 반도체칩의 상면에 형성된 미세한 입출력패드 상면을 오염시킨 경우에는 와이어 본딩 불량이 발생한다. 즉, 반도체칩의 입출력패드와 리드프레임 또는 인쇄회로기판은 도전성와이어로 접속(전기적으로 도통)되어야 하는데 이 접속이 양호하게 이루워지지 않게 된다. 따라서, 차후 반도체칩과 마더보드와의 신호 교환이 제대로 수행되지 않아 결국 반도체패키지의 불량으로 처리된다.For example, when the residue of the film adhesive contaminates the fine input / output pad upper surface formed on the upper surface of the semiconductor chip, wire bonding defects occur. That is, the input / output pad of the semiconductor chip and the lead frame or the printed circuit board must be connected (electrically conductive) with conductive wires, but this connection is not made well. Therefore, in the future, the signal exchange between the semiconductor chip and the motherboard is not performed properly, resulting in a defect in the semiconductor package.
또한, 상기 반도체칩은 리드프레임이나 인쇄회로기판의 상면으로도 일정 거리 이동됨으로써 그 리드프레임이나 인쇄회로기판 등도 오염시킬 수 있다. 따라서, 역시 와이어 본딩 불량을 유발하거나 몰딩 불량, 도전성볼 융착 불량 등 전 반도체패키지 제조 공정중 각종 불량 요인으로 작용하는 치명적인 문제점이 있다.In addition, the semiconductor chip is also moved to the upper surface of the lead frame or the printed circuit board by a certain distance may contaminate the lead frame or the printed circuit board. Therefore, there is also a fatal problem that causes various defects in the semiconductor package manufacturing process, such as wire bonding failure or molding failure, conductive ball fusion failure.
따라서 본 발명은 상기와 같은 종래의 문제점을 해결하기 위해 안출한 것으로, 필름 접착제를 개재하여 웨이퍼를 마운트프레임에 탑재하고, 소잉한 상태에서 낱개의 반도체칩으로 픽업시 그 필름 접착제의 찌꺼기 등에 의한 반도체칩 및 회로기판 등의 오염을 방지할 수 있는 반도체패키지용 필름 접착제를 제공하는데 있다.Therefore, the present invention has been made to solve the above-mentioned conventional problems, the semiconductor is mounted by mounting the wafer on the mount frame via the film adhesive, and picked up by a single semiconductor chip in a sawing state. The present invention provides a film adhesive for semiconductor packages that can prevent contamination of chips and circuit boards.
도1은 필름 접착제를 개재하여 웨이퍼를 마운트프레임에 탑재하는 상태를 도시한 사시도이다.1 is a perspective view showing a state in which a wafer is mounted on a mount frame via a film adhesive.
도2는 블레이드를 이용하여 마운트프레임에 탑재된 웨이퍼를 소잉하는 상태를 도시한 사시도이다.2 is a perspective view showing a state of sawing a wafer mounted on a mount frame using a blade;
도3은 마운트프레임상에서 웨이퍼가 소잉된 상태를 도시한 단면도이다.Fig. 3 is a sectional view showing a state in which the wafer is sawed on the mount frame.
도4는 마운트프레임에서 소잉된 낱개된 반도체칩을 픽업하는 때에 필름 접착제에 의한 불량 상태를 도시한 상태도이다.Fig. 4 is a state diagram showing a defective state caused by the film adhesive when picking up the individual semiconductor chips sawed from the mount frame.
도5는 본 발명에 의한 반도체패키지용 필름 접착제를 도시한 평면도이다.5 is a plan view showing a film adhesive for semiconductor packages according to the present invention.
도6은 본 발명에 의한 필름 접착제를 이용하여 웨이퍼를 마운트프레임에 탑재하는 상태를 도시한 사시도이다.6 is a perspective view showing a state in which a wafer is mounted on a mount frame using the film adhesive according to the present invention.
도7은 본 발명에 의한 필름 접착제가 개재된 상태에서 웨이퍼를 소잉하는 상태를 도시한 상태도이다.7 is a state diagram showing a state of sawing a wafer in a state where a film adhesive according to the present invention is interposed.
도8은 본 발명에 의한 필름 접착제가 이용된 웨이퍼에서 낱개의 반도체칩을 픽업하는 상태를 도시한 상태도이다.Fig. 8 is a state diagram showing a state in which individual semiconductor chips are picked up from a wafer using a film adhesive according to the present invention.
- 도면중 주요 부호에 대한 설명 --Description of the main symbols in the drawings-
2; 본 발명에 의한 필름 접착제2; Film adhesive according to the present invention
4; 관통공 6; 웨이퍼4; Through hole 6; wafer
8; 반도체칩 10; 경계라인8; Semiconductor chip 10; Boundary line
12; 마운트프레임 14; 태키테이프12; Mountframe 14; Tacky Tape
16; 소잉홈 18; 블레이드16; Sawing groove 18; blade
20; 흡착수단20; Adsorption means
상기한 목적을 달성하기 위해 본 발명은, 다수의 반도체칩이 형성되어 있는웨이퍼를 태키테이프가 부착된 마운트프레임에 임시로 접착시키는 필름 접착제 있어서, 상기 필름 접착제는 상기 웨이퍼에 형성된 각 반도체칩의 경계라인을 따라서 다수의 불연속적인 관통공이 형성되어 있는 것을 특징으로 한다.In order to achieve the above object, the present invention provides a film adhesive for temporarily adhering a wafer on which a plurality of semiconductor chips are formed to a mount frame having a tagy tape, wherein the film adhesive is a boundary of each semiconductor chip formed on the wafer. A plurality of discrete through-holes are formed along the line.
여기서, 상기 관통공은 각 반도체칩의 경계라인중 서로 교차하는 영역을 제외한 각변을 따라서 일정길이로 형성됨이 바람직하다.Here, the through hole is preferably formed to have a predetermined length along each side except for the region intersecting each other in the boundary line of each semiconductor chip.
또한, 상기 관통공은 차후 반도체칩의 소잉시 형성되는 소잉홈의 폭보다 크게 형성됨이 바람직하다.In addition, the through hole is preferably formed larger than the width of the sawing groove formed during sawing of the semiconductor chip.
상기와 같이 하여 본 발명에 의한 반도체패키지용 필름 접착제에 의하면, 웨이퍼의 소잉중에 블레이드와 접촉되는 필름 접착제의 소정 영역에 미리 관통공을 형성함으로써 소잉 공정중 상기 블레이드가 상기 필름 접착제와 접촉되는 영역이 최소화되고, 따라서 낱개의 반도체칩을 픽업시 종래와 같은 오염 현상을 최소화할 수 있게 된다.As described above, according to the film adhesive for semiconductor package according to the present invention, the through-hole is formed in a predetermined area of the film adhesive that is in contact with the blade during sawing of the wafer so that the area where the blade is in contact with the film adhesive during the sawing process Minimization, thus, it is possible to minimize the conventional pollution phenomenon when picking up each semiconductor chip.
이하 본 발명이 속한 기술분야에서 통상의 지식을 가진 자가 본 발명을 용이하게 실시할 수 있을 정도로 본 발명의 바람직한 실시예를 첨부된 도면을 참조하여 상세하게 설명하면 다음과 같다.Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings such that those skilled in the art can easily implement the present invention.
도5는 본 발명에 의한 반도체패키지용 필름 접착제(2)를 도시한 평면도이다.5 is a plan view showing a film adhesive 2 for semiconductor packages according to the present invention.
도시된 바와 같이 필름 접착제(2)에는 대략 바둑판 형상으로 다수의 관통공(4)이 형성되어 있다. 즉, 각각의 관통공(4)은 4개가 한조를 이루며, 이는 마치 격자 형상을 이룸으로써 전체적으로 볼 때는 대략 바둑판 형상으로 되어 있다. 그러나 상기 4개의 관통공(4) 전체가 1개로 연결되는 것은 아니고 불연속으로형성되어 있다. 또한, 상기 4개의 관통공(4)이 이루는 대략 사각 영역은 웨이퍼(6)에 형성된 각 반도체칩(8)의 영역과 대응된다.As shown, the film adhesive 2 is formed with a plurality of through holes 4 in a substantially checkerboard shape. That is, each of the through-holes 4 constitutes a set of four, which is almost a checkerboard shape when viewed as a lattice. However, not all of the four through holes 4 are connected to one, but are formed discontinuously. In addition, the substantially rectangular area formed by the four through holes 4 corresponds to the area of each semiconductor chip 8 formed in the wafer 6.
즉, 도6에 도시된 바와 같이 웨이퍼(6)에 형성된 각 반도체칩(8)의 경계라인(10)과 대응되도록 4개의 관통공(4)이 형성되어 있으며, 상기 반도체칩(8)의 경계라인(10)들이 교차하는 부분에는 관통공(4)이 형성되어 있지 않다.That is, as shown in FIG. 6, four through holes 4 are formed to correspond to the boundary line 10 of each semiconductor chip 8 formed on the wafer 6, and the boundary of the semiconductor chip 8 is formed. The through hole 4 is not formed at the portion where the lines 10 intersect.
여기서, 상기 1개의 반도체칩(8) 영역과 대응되는 관통공(4)은 4개로 된 예에 대하여 설명하지만 상기 관통공(4)의 개수는 이에 한정되는 것이 아니다.Here, an example of four through holes 4 corresponding to one semiconductor chip 8 region will be described. However, the number of through holes 4 is not limited thereto.
도7은 본 발명에 의한 필름 접착제(2)가 개재된 상태에서 웨이퍼(6)를 소잉하는 상태를 도시한 상태도이다.Fig. 7 is a state diagram showing a state of sawing the wafer 6 in a state where the film adhesive 2 according to the present invention is interposed.
도시된 바와 같이 블레이드(18)에 의해 소잉될 필름 접착제(2)에는 미리 관통공(4)이 형성되어 있음으로써, 상기 블레이드(18)와 필름 접착제(2) 사이의 접촉은 최소화된다. 비록, 반도체칩(8) 간의 경계라인(10)중에서 서로 교차하는 부분에는 관통공(4)이 형성되어 있지 않치만, 그외의 모든 경계라인(10)에는 그 변과 대응하는 부분에 관통공(4)이 형성되어 있음으로써 블레이드(18)와의 접촉이 최소화된다.As shown, the through hole 4 is formed in the film adhesive 2 to be sawed by the blade 18 in advance, so that the contact between the blade 18 and the film adhesive 2 is minimized. Although the through holes 4 are not formed in the boundary lines 10 between the semiconductor chips 8 and intersect with each other, all other boundary lines 10 have through holes in the portions corresponding to the sides thereof. The formation of 4) minimizes contact with the blade 18.
여기서, 상기 관통공(4)의 폭은 상기 블레이드(18)에 의해 형성되는 소잉홈(16) 즉, 웨이퍼(6)와 태키테이프(14)에 형성되는 소잉홈(16)의 폭보다는 크게 형성함이 바람직하다. 이는 곧 상기 블레이드(18)의 폭보다 상기 필름 접착제(2)에 형성되는 관통공(4)이 크게 형성됨과 같다.Here, the width of the through hole 4 is formed to be larger than the sawing groove 16 formed by the blade 18, that is, the sawing groove 16 formed on the wafer 6 and the tape tape 14. It is preferable to. This is equivalent to the fact that the through hole 4 formed in the film adhesive 2 is formed larger than the width of the blade 18.
도8은 본 발명에 의한 필름 접착제(2)가 이용된 웨이퍼(6)에서 낱개의 반도체칩(8)을 픽업하는 상태를 도시한 상태도이다.Fig. 8 is a state diagram showing a state in which the individual semiconductor chips 8 are picked up from the wafer 6 using the film adhesive 2 according to the present invention.
도시된 바와 같이, 웨이퍼(6)에서 낱개의 반도체칩(8)을 흡착수단(20)으로 픽업시에 종래와 같이 필름 접착제(2)의 찌꺼기가 상기 반도체칩(8)의 이동 경로를 따라서 이동하지 않게 된다. 따라서, 종래와 같이 반도체칩(8)의 상면을 오염시키지 않게 되고, 또한 리드프레임이나 회로기판의 오염 현상도 억제하게 된다.As shown, when picking up each semiconductor chip 8 from the wafer 6 to the adsorption means 20, the residue of the film adhesive 2 moves along the movement path of the semiconductor chip 8 as in the prior art. You will not. Therefore, the upper surface of the semiconductor chip 8 is not contaminated as in the prior art, and the contamination phenomenon of the lead frame or the circuit board is also suppressed.
또한, 상기 태키테이프(14)상에서 상기 필름 접착제(2)가 접착된 반도체칩(8)이 용이하게 분리되기도 한다.In addition, the semiconductor chip 8 to which the film adhesive 2 is adhered may be easily separated on the tacky tape 14.
이상에서와 같이 본 발명은 비록 상기의 실시예에 한하여 설명하였지만 여기에만 한정되지 않으며, 본 발명의 범주 및 사상을 벗어나지 않는 범위내에서 여러가지로 변형된 실시예도 가능할 것이다.As described above, although the present invention has been described with reference to the above embodiments, the present invention is not limited thereto, and various modified embodiments may be possible without departing from the scope and spirit of the present invention.
따라서 본 발명에 의한 반도체패키지용 필름 접착제에 의하면, 웨이퍼의 소잉중에 블레이드와 접촉되는 필름 접착제의 소정 영역에 미리 관통공을 형성함으로써 소잉 공정중 상기 블레이드가 상기 필름 접착제와 접촉되는 영역이 최소화되고, 따라서 낱개의 반도체칩을 픽업시 종래와 같은 오염 현상을 최소화할 수 있는 효과가 있다.Therefore, according to the film adhesive for semiconductor package according to the present invention, by forming a through hole in a predetermined region of the film adhesive in contact with the blade during sawing of the wafer, the area where the blade is in contact with the film adhesive during the sawing process is minimized, Therefore, when picking up individual semiconductor chips, there is an effect of minimizing the pollution phenomenon as in the prior art.
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-1999-0065935A KR100420433B1 (en) | 1999-12-30 | 1999-12-30 | Film adhesive for semiconductor package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-1999-0065935A KR100420433B1 (en) | 1999-12-30 | 1999-12-30 | Film adhesive for semiconductor package |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20010058585A true KR20010058585A (en) | 2001-07-06 |
| KR100420433B1 KR100420433B1 (en) | 2004-03-03 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR10-1999-0065935A KR100420433B1 (en) | 1999-12-30 | 1999-12-30 | Film adhesive for semiconductor package |
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| KR (1) | KR100420433B1 (en) |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06275715A (en) * | 1993-03-19 | 1994-09-30 | Toshiba Corp | Semiconductor wafer and manufacture of semiconductor device |
| JPH08124881A (en) * | 1994-10-28 | 1996-05-17 | Nec Corp | Dicing tape and method for assembling semiconductor device using it |
| US5733794A (en) * | 1995-02-06 | 1998-03-31 | Motorola, Inc. | Process for forming a semiconductor device with ESD protection |
| KR19980034139A (en) * | 1996-11-05 | 1998-08-05 | 김광호 | Wafer, die-bonding tape and manufacturing method thereof |
| JP3604108B2 (en) * | 1997-02-17 | 2004-12-22 | 株式会社シチズン電子 | Manufacturing method of chip type optical semiconductor |
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| KR100420433B1 (en) | 2004-03-03 |
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