KR20000054903A - Align key for semiconductor exposure device - Google Patents
Align key for semiconductor exposure device Download PDFInfo
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- KR20000054903A KR20000054903A KR1019990003253A KR19990003253A KR20000054903A KR 20000054903 A KR20000054903 A KR 20000054903A KR 1019990003253 A KR1019990003253 A KR 1019990003253A KR 19990003253 A KR19990003253 A KR 19990003253A KR 20000054903 A KR20000054903 A KR 20000054903A
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- alignment
- alignment key
- axis
- pattern
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
- G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
- G03F9/7073—Alignment marks and their environment
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- General Physics & Mathematics (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
본 발명은 반도체 노광장비용 얼라인키에 관한 것으로, 특히 마스크에 위치하는 얼라인 키의 면적을 감소시켜 칩의 집적화에 기여할 수 있으며, 아울러 얼라인 정확도를 향상시킬 수 있는 반도체 노광장비용 얼라인키에 관한 것이다.The present invention relates to an alignment key for semiconductor exposure equipment, and more particularly, to an integration key for semiconductor exposure equipment that can contribute to chip integration by reducing the area of the alignment key located in the mask and improve alignment accuracy. It is about.
일반적으로 반도체 웨이퍼 제조공정 중 포토(PHITO)공정에서는 여러개의 마스크(MASK)를 이용하여 웨이퍼에 회로모양을 이식하기 위한 노광작업을 실시하게 되는데, 상기 노광공정은 마스크에 형성된 패턴을 웨이퍼 표면의 패턴과 일치시킨 후 자외선 빛을 부분적으로 투과시켜 해당 부위의 감광막을 선택적으로 노광하는 공정을 말한다.In general, in the photolithography (PHITO) process of the semiconductor wafer manufacturing process, an exposure operation for implanting a circuit shape on the wafer is performed using a plurality of masks. And a process of selectively exposing the photoresist film of the corresponding area by partially transmitting ultraviolet light after matching with.
이와 같은 노광공정을 진행하기 위한 노광장비는 조명계의 하측에 소정 거리를 두고 패턴 마스크를 장착하기 위한 마스크 스테이지와, 이 마스크 스테이지의 하측에 웨이퍼를 안착시킬 수 있도록 설치되는 웨이퍼 스테이지와, 상기 마스크 스테이지와 웨이퍼 스테이지 사이에 설치되어 패턴 마스크의 패턴을 웨이퍼에 이식하기 위한 축소렌즈를 포함하여 구성되며, 상기 조명계로부터 조사된 빛을 패턴 마스크 및 축소렌즈를 통과하여 웨이퍼에 조사함으로써 패턴 마스크에 형성된 패턴을 웨이퍼에 이식하게 된다.An exposure apparatus for performing such an exposure process includes a mask stage for mounting a pattern mask at a predetermined distance below the illumination system, a wafer stage provided to seat the wafer below the mask stage, and the mask stage. And a reduction lens installed between the wafer stage and the pattern mask to implant the pattern of the pattern mask onto the wafer. It will be implanted on the wafer.
한편, 상기와 같은 노광장비는 마스크(Mask)에 형성된 패턴(Pattern)을 웨이퍼에 정확히 노광하기 위해서 웨이퍼가 웨이퍼 스테이지에 로딩(Loading)되면 마스크의 스크라이브 레인상에 형성된 얼라인키를 이용하여 웨이퍼와의 정렬 과정을 거치게 된다.On the other hand, such an exposure apparatus uses an alignment key formed on the scribe lane of the mask when the wafer is loaded on the wafer stage in order to accurately expose the pattern formed on the mask to the wafer. It will go through the alignment process.
상기와 같이 얼라인을 진행하기 위한 종래의 얼라인키는 도 1에 도시한 바와 같이, 슬릿 형태로 이루어져 샷(S)의 엑스축 및 와이축에 위치하며, 비 스코프를 계측하여 엑스축 얼라인키(1)의 센터를 잡고 씨 스코프를 계측하여 와이축 얼라인키(2) 역시 센터를 잡아 웨이퍼의 글로벌 얼라인먼트(Global Alignment)를 실시한다.As shown in FIG. 1, the conventional align key for aligning as described above is formed in a slit form and is positioned on the X-axis and the Y-axis of the shot S, and the non-scope is measured to measure the alignment of the X-axis align key 1. By holding the center and measuring the Seascope, the Y axis alignment key 2 also grasps the center and performs global alignment of the wafer.
즉, 각 얼라인키(1)(2)의 기준마크(1a)(2a)를 기준으로 각 슬릿패턴(1b)(2b)들의 시그널을 측정하여 얼라인키(1)(2)의 센터를 계측한다.That is, the center of the alignment keys 1 and 2 is measured by measuring the signals of the respective slit patterns 1b and 2b based on the reference marks 1a and 2a of the alignment keys 1 and 2 as a reference. .
이때, 검출되는 신호는 마스크의 신호를 상대 기준으로 두고 웨이퍼를 움직여서 최적조건을 찾아낸다.At this time, the detected signal finds the optimum condition by moving the wafer with the signal of the mask as a relative reference.
그후, 얼라인이 완료되면 노광을 실시하게 된다.After the alignment is completed, the exposure is performed.
그러나, 상기와 같은 종래 기술은 샷(S)의 엑스축 및 와이축에 각각 비 스코프 및 씨 스코프를 패턴닝함으로써 얼라인키(1)(2)가 마스크에 차지하는 면적이 증가하게 되어 칩의 집적화를 저해하는 요인으로 작용하게 된다.However, the conventional technique as described above, by patterning the non-scope and sea scope on the X-axis and the Y-axis of the shot S, respectively, increases the area occupied by the alignment keys 1 and 2 in the mask, thereby inhibiting chip integration. Act as a factor.
또한, 상기 비 스코프 및 씨 스코프 중 어느 하나의 얼라인키(1)(2)에 오류가 발생하게 되면 얼라인 불량을 유발하게 되는 문제점이 있었다.In addition, when an error occurs in any of the alignment keys 1 and 2 of the non-scope and the sea scope, there is a problem that causes an alignment defect.
본 발명은 이러한 문제점을 해결하기 위한 것으로, 마스크에 위치하는 얼라인 키의 면적을 감소시켜 칩의 집적화에 기여할 수 있으며, 아울러 얼라인 정확도를 향상시킬 수 있는 반도체 노광장비용 얼라인 키를 제공하는데 그 목적이 있다.The present invention is to solve this problem, to provide an alignment key for semiconductor exposure equipment that can contribute to the integration of the chip by reducing the area of the alignment key located in the mask, and can also improve the alignment accuracy. The purpose is.
도 1은 종래 기술에 의한 얼라인키를 이용하여 얼라인을 실시하는 상태를 보인 도면.1 is a view showing a state of performing the alignment using the alignment key according to the prior art.
도 2는 본 발명에 의한 얼라인키를 보인 평면도.Figure 2 is a plan view showing an alignment key according to the present invention.
도 3 및 도 4는 각각 본 발명의 얼라인키를 이용하여 얼라인 실시동작을 보인 도면.3 and 4 are diagrams showing the alignment operation using the alignment key of the present invention, respectively.
**도면의 주요부분에 대한 부호의 설명**** Description of the symbols for the main parts of the drawings **
10 ; 기준마크11 ; 외부패턴10; Reference mark 11; External pattern
12 ; 내부패턴12; Internal pattern
상기 목적을 달성하기 위한 본 발명은 장방형의 기준마크 내부에 상기 기준마크와 동일한 장방형의 외부패턴을 배치하고, 상기 외부패턴의 내부에 역시 장방형의 내부패턴을 배치하여 샷의 엑스축 및 와이축에 대한 얼라인을 동시에 진행하도록 한 것을 특징으로 한다.The present invention for achieving the above object is to place the outer pattern of the same rectangle as the reference mark inside the rectangular reference mark, and also the inner pattern of the rectangular inside the outer pattern is arranged for the X-axis and Y-axis of the shot It is characterized in that the phosphorus proceeds simultaneously.
이하, 본 발명에 의한 반도체 노광장비용 얼라인키를 첨부도면에 도시한 실시예에 따라 설명하면 다음과 같다.Hereinafter, the alignment key for semiconductor exposure equipment according to the present invention will be described according to the embodiment shown in the accompanying drawings.
본 발명의 얼라인키는 도 2에 도시한 바와 같이, 3중 박스 형태로 이루어진다.The alignment key of the present invention has a triple box form, as shown in FIG.
즉, 최외곽에 장방형의 기준마크(10)를 배치하고, 이 기준마크(10)의 내부에는 상기 기준마크(10)와 동일한 장방형의 외부패턴(11)을 배치하며, 상기 외부패턴(11)의 내부에 역시 장방형의 내부패턴(12)을 배치하여 이루어진다.That is, a rectangular reference mark 10 is disposed at the outermost side, and inside the reference mark 10, an external pattern 11 having the same rectangular shape as the reference mark 10 is disposed, and the external pattern 11 is disposed. It is made by arranging a rectangular inner pattern 12 also inside.
이와 같은 얼라인키는 도 3에 도시한 바와 같이, 비 스코프의 윈도우를 열어 엑스축에 관한 얼라인 계측을 하고, 씨 스코프의 윈도우를 열어 측정함으로써 웨이퍼의 글로벌 얼라인먼트를 실시함으로써, 샷(S)의 일측에만 배치하여도 기존에서처럼 엑스축 및 와이축에 대한 측정을 동시에 진행하게 된다.As shown in Fig. 3, such an alignment key opens a non-scope window to align alignment with respect to the X-axis, and opens and measures the seascope window to perform global alignment of the wafer. Even if placed only in the X axis, the X axis and the Y axis will be measured simultaneously.
한편 도 4에 도시한 바와 같이, 본 발명의 얼라인키를 종래와 같이 각 샷(S)의 엑스축 및 와이축 모두에 배치한다면 보다 정확한 얼라인 계측이 가능해지므로 칩의 집적화에 기여하게 된다.On the other hand, as shown in FIG. 4, if the alignment key of the present invention is disposed on both the X-axis and the Y-axis of each shot S as in the related art, more accurate alignment measurement is possible, thereby contributing to chip integration.
이상에서 설명한 바와 같이, 본 발명에 의한 얼라인키는 3중 박스 구조로 형성하여 비 스코프와 씨 스코프를 동시에 측정 가능하도록 함으로써 칩의 집적화에 기여할 수 있게 된다.As described above, the align key according to the present invention is formed in a triple box structure so that the non-scope and the seascope can be simultaneously measured, thereby contributing to the integration of the chip.
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KR1019990003253A KR100280556B1 (en) | 1999-02-01 | 1999-02-01 | Align key for semiconductor exposure device |
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KR1019990003253A KR100280556B1 (en) | 1999-02-01 | 1999-02-01 | Align key for semiconductor exposure device |
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KR100280556B1 KR100280556B1 (en) | 2001-01-15 |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100457223B1 (en) * | 2001-12-29 | 2004-11-16 | 동부전자 주식회사 | Method for forming overlay measurement pattern capable of using with a alignment mark |
KR100472411B1 (en) * | 2002-08-09 | 2005-03-10 | 삼성전자주식회사 | method for manufacturing semiconductor device and semiconductor device with the overlay mark |
KR100863545B1 (en) * | 2007-03-22 | 2008-10-15 | 주식회사 만도 | Correcting method for offset of master cylinder pressure sensor |
-
1999
- 1999-02-01 KR KR1019990003253A patent/KR100280556B1/en not_active IP Right Cessation
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100457223B1 (en) * | 2001-12-29 | 2004-11-16 | 동부전자 주식회사 | Method for forming overlay measurement pattern capable of using with a alignment mark |
KR100472411B1 (en) * | 2002-08-09 | 2005-03-10 | 삼성전자주식회사 | method for manufacturing semiconductor device and semiconductor device with the overlay mark |
KR100863545B1 (en) * | 2007-03-22 | 2008-10-15 | 주식회사 만도 | Correcting method for offset of master cylinder pressure sensor |
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KR100280556B1 (en) | 2001-01-15 |
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