KR20000026435A - Method for manufacturing apparatus for controlling thin film type optical path - Google Patents

Abstract

PURPOSE: A method for manufacturing apparatus for controlling thin film type optical path is provided to improve an optical efficiency by forming a level mirror through changing the vacuum evaporation condition of a hard mask and a mirror. CONSTITUTION: A method for manufacturing apparatus for controlling thin film type optical path includes the steps of an actuator(210) and a supporting element(175) having a first upper electrode(200), a second upper electrode(201), a first strain layer(190), a second strain layer, and a lower electrode(180) on an upper part of an active matrix(100) having a transistor(120) within and a first metal layer(135). A second sacrificial layer(300) is formed thereon and a hard mask(320) is formed on an upper part of the second sacrificial layer under the vacuum evaporation condition of a 10kW electric power, 1.7mTorr motion press, 70sccm current of argon gas. The second sacrificial layer(300) is etched by the hard mask and a mirror is formed on an upper part of the hard mask.

Description

Manufacturing method of thin film type optical path control device

The present invention relates to a method for manufacturing a thin film type optical path control device using AMA (Actuated Mirror Array), and more particularly to a method for manufacturing a thin film type optical path control device that can improve the optical efficiency of incident light by forming a horizontal mirror. .

Optical path control devices or spatial light modulators for projecting optical energy onto a screen may be applied to various fields such as optical communication, image processing, and information display devices. Typically, image processing apparatuses using such an optical modulator are classified into a direct view type image display device and a projection type image display device according to a method of displaying optical energy on a screen.

An example of a direct view type image display device is a CRT (Cathode Ray Tube), which is a so-called CRT device, which has excellent image quality but increases in weight and volume as the size of the screen increases, leading to an increase in manufacturing cost. There is. Projection type image displays include liquid crystal displays (LCDs), deformable mirror devices (DMDs), and AMAs. Such projection image display devices can be further divided into two groups according to their optical characteristics. That is, devices such as LCDs can be classified as transmit light modulators, while DMD and AMA can be classified as reflected light modulators.

Transmission optical modulators, such as LCDs, have a very simple optical structure, which makes them thinner, lighter in weight, and smaller in volume. However, due to the polarity of the light, the light efficiency is low, there is a problem inherent in the liquid crystal material, for example, there is a disadvantage that the response speed is slow and the inside is easy to overheat. In addition, the maximum light efficiency of existing transmission light modulators is limited in the range of 1-2% and requires dark room conditions to provide acceptable display quality. Therefore, optical modulators such as DMD and AMA have been developed to solve the above problems.

Although DMD shows a relatively good light efficiency of about 5%, the hinge structure employed in the DMD not only causes serious fatigue problems, but also requires a very complicated and expensive driving circuit. In the AMA, each of the mirrors installed therein reflects light incident from the light source at a predetermined angle, and the reflected light is projected on the screen through an aperture such as a slit or a pinhole. It is a device that can adjust the speed of light to form an image. Therefore, its structure and operation principle are simple, and high light efficiency (more than 10% light efficiency) can be obtained compared to LCD or DMD. In addition, the contrast of the image projected on the screen is improved to obtain a brighter and clearer image.

These AMA devices are largely divided into bulk type and thin film type. The bulk optical path control device is disclosed in US Pat. No. 5,085,497 to Gregory Um et al. The bulk optical path control device cuts a thin layer of multilayer ceramic, mounts a ceramic wafer having a metal electrode therein in an active matrix including a transistor, and then processes it using a sawing method and mirrors the upper portion thereof. By installing. However, the bulk optical path control device requires very high precision in design and manufacturing, and has a disadvantage in that the response of the strained layer is slow.

Accordingly, a thin film type optical path control apparatus that can be manufactured using a semiconductor manufacturing process has been developed. The thin film type optical path control device is disclosed in Korean Patent Application No. 98-41672 (name of the invention: a method of manufacturing a thin film type optical path control device) filed by the applicant of the Korean Patent Office on October 2, 1998.

FIG. 1 is a perspective view of the thin film type optical path control device, and FIG. 2 is a cross-sectional view of the device of FIG. 1 taken along line A ₁ A ₂ .

1 and 2, the thin film type optical path adjusting device includes an active matrix 16, a support element 18, an actuator 31, and a mirror 41.

Referring to FIG. 2, the active matrix 16 includes a substrate 1 having M × N (M, N is a natural number) MOS transistors 5, a drain 2 and a source of the MOS transistors 5. First metal layer 8 formed on top of substrate 1 extending from (3), first protective layer 9 formed on top of first metal layer 135, second metal layer 10, second protective layer 12 and the etch stop layer 13 are included.

Referring to FIG. 1, the support element 18 comprises a support line 20, a support layer 19, a first anchor 21 and second anchors 22a, 22b. The support line 20 and the support layer 19 are horizontally formed on the etch stop layer 13 via the first air gap 15. The common electrode line 32 is formed on the support line 20. The support layer 19 is integrally formed in the rectangular ring shape along the direction orthogonal to the support line 20 on the same plane. A first anchor 21 is integrally formed with the two arms and attached to the etch stop layer 13 at a lower portion between two arms horizontally extending in a direction orthogonal to the support line 20 of the support layer 19. Two second anchors 22a and 22b are integrally formed with the two arms and attached to the etch stop layer 13 at the lower outer side of the two arms. The support layer 19 is supported by the first anchor 21 in the center portion and supported by both anchors 22a and 22b. The first anchor 21 is formed on the portion of the anti-etching layer 13 at which the drain pad of the first metal layer 8 is positioned. A via hole 38 is formed from the central portion of the first anchor 21 to the drain pad of the first metal layer 8.

The actuator 31 includes a lower electrode 24, a first strained layer 26, a second strained layer 27, a first upper electrode 29, and a second upper electrode 30. The lower electrode 24 has a mirror-shaped 'c' shape spaced apart from the support line 20 by a predetermined distance, and protrudes stepped toward the first anchor 21 on one side of the lower electrode 24. Are formed corresponding to each other. The protrusions of the lower electrode 24 extend to the periphery of the via hole 38 formed in the first anchor 21, respectively. The via contact 39 is formed from the drain pad of the first metal layer 8 to the protrusions of the lower electrode 24 through the via hole 38 to electrically connect the drain pad and the lower electrode 24. The two arms of the lower electrode 24 each have the shape of a rectangular plate, and the first and second deformable layers 26 and 27 respectively have the shape of the rectangular plate having a smaller area than the two arms of the lower electrode 24. And is formed on top of the two arms of the lower electrode 24. In addition, the first and second upper electrodes 29 and 30 have a shape of a rectangular plate having a smaller area than the first and second deformable layers 26 and 27, respectively, and the first and second deformable layers 26 and 27. It is formed at the top of the.

The first insulating layer 34 is formed from one side of the first upper electrode 29 to a part of the supporting layer 19, and the first insulating layer 34 and the supporting layer 19 from one side of the first upper electrode 29. The first upper electrode connecting member 36 is formed to the common electrode line 32 through a portion of the. In addition, a second insulating layer 35 is formed from one side of the second upper electrode 30 to a part of the supporting layer 19, and the second insulating layer 35 and the supporting layer (from one side of the second upper electrode 30) The second upper electrode connecting member 37 is formed up to the common electrode line 32 through a part of 19.

The mirror 41 is supported on a portion of the mirror-shaped 'c'-shaped lower electrode 24 where the first and upper electrodes 29 and 30 are not formed, that is, formed side by side with respect to the support line 20. Post 40 is formed. The mirror 41 and the hard mask 45 are centrally supported by the post 40, and both sides thereof are formed horizontally on the actuator 31 via the second air gap 43. The mirror 41 serves to reflect light incident from a light source (not shown) at a predetermined angle.

Hereinafter, the manufacturing method of the above-mentioned thin film type optical path control apparatus will be described.

3A to 3C are diagrams for describing a method of manufacturing the apparatus shown in FIG. 2.

Referring to FIG. 3A, a device isolation layer 6 is formed on a substrate 1, which is an n-type doped silicon wafer, by using a silicon partial oxidation method (LOCOS) to distinguish an active region from a field region. Subsequently, a gate 4 made of a conductive material such as polysilicon is formed on the active region, and then p ⁺ source 3 and drain 2 are formed by an ion implantation process, thereby forming M on the substrate 1. N (M and N are natural numbers) P-MOS transistors 5 are formed.

After the insulating film 7 made of oxide is formed on the P-MOS transistor 5 formed thereon, openings are formed to expose the upper portions of one side of the source 3 and the drain 2 by photolithography. . Subsequently, a first metal layer 8 made of titanium, titanium nitride, tungsten, nitride, or the like is deposited on the resultant product on which the openings are formed, and then the first metal layer 8 is patterned. The patterned first metal layer 8 includes a drain pad extending from the drain 2 of the P-MOS transistor 5 to the bottom of the first anchor 21.

A first protective layer 9 is formed on the first metal layer 8 and on the substrate 1 to prevent the substrate 1 having the P-MOS transistor 5 therein from being damaged due to a subsequent process. The first protective layer 9 is formed of a silicate glass (PSG) having a thickness of 8000 kPa by the chemical vapor deposition (CVD) method.

The second metal layer 10 is formed on the first protective layer 9. The second metal layer 10 is formed by sputtering titanium to form a titanium layer having a thickness of 300 kPa, and then forming a titanium nitride layer having a thickness of 1200 kW on the titanium layer by physical vapor deposition (PVD). Is completed. The second metal layer 10 enters the incident light not only to the mirror 41 but also to a portion other than the portion covered by the mirror 41, so that photocurrent flows through the active matrix 16 to prevent the device from malfunctioning. Subsequently, a portion of the second metal layer 10 formed after the drain pad of the first metal layer 8 under which the via hole 38 is to be formed is etched to etch a hole in the second metal layer 10 (not shown). ).

The second protective layer 12 is stacked on the second metal layer 10. The second protective layer 12 is formed of the silicate glass (PSG) to have a thickness of about 2000 kPa using a chemical vapor deposition method. The second protective layer 12 prevents the substrate 1 and the resulting products formed on the substrate 1 from being damaged during subsequent processing.

On top of the second passivation layer 12 an etch stop layer 13 is deposited which prevents the second passivation layer 12 and the products on the substrate 1 from being etched during the subsequent etching process. The etch stop layer 13 is made of low temperature oxide (LTO) such as silicon oxide (SiO ₂ ) or phosphorus pentoxide (P ₂ O ₅ ). The etch stop layer 12 is formed to have a thickness of 0.2 to 0.8 mu m at 350 to 450 DEG C using a low pressure chemical vapor deposition (LPCVD) method. Accordingly, the active matrix 16 including the substrate 1, the first metal layer 8, the first protective layer 9, the second metal layer 10, the second protective layer 12, and the etch stop layer 13. Is completed.

The first sacrificial layer 14 is stacked on the etch stop layer 13. The first sacrificial layer 14 is formed of polysilicon to have a thickness of 2.0 to 3.0 μm by low pressure chemical vapor deposition (LPCVD) at a temperature of 500 ° C. or less. Subsequently, the surface of the first sacrificial layer 14 is polished by chemical mechanical polishing (CMP) to planarize the surface of the first sacrificial layer 14 to have a thickness of 1.1 μm. Subsequently, after applying and patterning a first photoresist (not shown) on top of the first sacrificial layer 14, the second photoresist is used as a mask, and a second photoresist is disposed below the first sacrificial layer 14. The first anchor 21 and the second anchors supporting the supporting layer 19 to be formed later by etching the portions in which the holes of the metal layer 12 and the portions adjacent to both sides are etched to expose a portion of the etch stop layer 13. Create a position at which 22a, 22b will be formed and remove the first photoresist. Accordingly, the etch stop layer 13 is exposed in the shape of three squares spaced apart by a predetermined distance.

The first layer 17 is stacked on the upper portion of the etch stop layer 13 and the first sacrificial layer 14 exposed in a square as described above. The first layer 17 is formed to have a thickness of 0.1 to 1.0 mu m by low pressure chemical vapor deposition (LPCVD). The lower electrode layer 23 is stacked on top of the first layer 17. The lower electrode layer 23 is formed of a metal such as platinum (Pt), tantalum (Ta), or platinum-tantalum (Pt-Ta) to have a thickness of 0.1 to 1.0 µm using a sputtering method or a chemical vapor deposition method.

The second layer 25 made of a piezoelectric material is stacked on the lower electrode layer 23. The second layer 25 is formed by spin coating PZT prepared by the sol-gel method to have a thickness of 0.4 μm. Subsequently, the piezoelectric material constituting the second layer 25 is subjected to heat treatment by a rapid heat treatment (RTA) method to cause phase shift.

The upper electrode layer 28 is stacked on top of the second layer 25. The upper electrode layer 28 is formed of a metal such as platinum, tantalum, silver, or platinum-tantalum having a thickness of 0.1 to 1.0 mu m using a sputtering method or a chemical vapor deposition method.

Referring to FIG. 3B, after applying and patterning a second photoresist (not shown) on the upper electrode layer 28, each of the upper electrode layers 28 is formed as a rectangular plate using the second photoresist as a mask. And pattern the first and second upper electrodes 29 and 30 side by side spaced apart from each other by a predetermined distance, and then remove the second photoresist. A second signal (bias signal) is applied to the first and second upper electrodes 29 and 30 through a common electrode line 32 formed later from the outside, respectively.

Subsequently, the second layer 25 is patterned in the same manner as the patterning of the upper electrode layer 28 to form a rectangular flat plate, and each of the first and second strained layers formed side by side with a predetermined distance from each other ( 26, 27). In this case, as shown in FIG. 1, the first and second deformable layers 26 and 27 are patterned to have a shape of a rectangular plate slightly wider than the first and second upper electrodes 29 and 30, respectively.

Subsequently, the lower electrode layer 23 has a mirror-shaped 'c' shape with respect to the support line 20 formed later by patterning the lower electrode layer 23 and the lower electrode 24 having protrusions formed stepped toward the first anchor 21. ). In this case, the two arms of the lower electrode 22 have the shape of a rectangular plate having a larger area than the first and second deforming layers 26 and 27, respectively. In addition, when the lower electrode layer 23 is patterned, the common electrode line 32 is formed simultaneously with the lower electrode 24 in a direction perpendicular to the lower electrode 24 on one side of the first layer 17. The common electrode line 32 is formed to be spaced apart from the lower electrode 24 by a predetermined distance on the support line 20 formed later. Thus, the actuator 31 including the first and second upper electrodes 29 and 30, the first and second strained layers 26 and 27, and the lower electrode 24 is completed.

The first layer 17 is then patterned to form a support element 18 comprising a support layer 19, a support line 20, a first anchor 21 and second anchors 22a, 22b. At this time, both sides of the portion of the first layer 17 which contacts the etch stop layer 13 exposed in the three quadrangles are second anchors 22a and 22b, and the center portion of the first anchor 21 is do. The first anchor 21 and the second anchors 22a and 2b each have a rectangular box shape, and below the first anchor 21, holes of the second metal layer 10 and holes of the first metal layer 8 are formed. A drain pad is formed. Accordingly, the first anchor 21 is formed below the lower electrode 24, and the second anchors 22a and 22b are formed below the outer electrode 24, respectively.

Subsequently, a fourth photoresist (not shown) is applied and patterned on top of the support element 18 and the actuator 31 to form the first and second tops from the common electrode line 32 formed on the support line 19. A part of the electrodes 29 and 30 are exposed respectively. At this time, even the protrusions of the lower electrode 24 are exposed together from the first anchor 21.

Subsequently, by depositing and patterning amorphous silicon or silicon oxide or phosphorus pentoxide, which is a low temperature oxide, on the exposed portion, a portion of the first upper electrode 29 is formed through the first strained layer 26 and the lower electrode 24. The first insulating layer 34 is formed up to a part of the support layer 19, and at the same time a part of the support layer 19 through the second strained layer 27 and the lower electrode 24 from a part of the second upper electrode 30. Until the second insulating layer 35 is formed. The first and second insulating layers 34 and 35 are formed to have a thickness of 0.2 to 0.4 탆, respectively, by low pressure chemical vapor deposition (LPCVD).

The first anchor 21, the etch stop layer 13, and the second anchor 21 are formed from a central portion of the first anchor 21, which is a portion where the hole of the second metal layer 10 and the drain pad of the first metal layer 8 are formed below. After the protective layer 12 and the first protective layer 9 are etched to form the via hole 38 to the drain pad, the via contact from the drain pad to the protrusions of the lower electrode 24 through the via hole 38. Form 39. At the same time, the first upper electrode connecting member 36 and the second upper electrode 30 from the first upper electrode 29 to the common electrode line 32 through a part of the first insulating layer 34 and the supporting layer 19. The second upper electrode connecting member 37 is formed to the common electrode line 32 through a portion of the second insulating layer 35 and the support layer 19.

The via contact 39 and the first and second upper electrode connecting members 36 and 37 are deposited by depositing platinum or platinum-tantalum to have a thickness of 0.1 to 0.2 μm by sputtering or chemical vapor deposition. Patterned metal is formed. The first and second upper electrode connecting members 36 and 37 connect the first and second upper electrodes 29 and 30 to the common electrode line 32, respectively, and the lower electrode 24 connects the via contact 39. It is connected to the drain pad through.

Referring to FIG. 3C, the second sacrificial layer 42 is spin-coated with an acuflo having excellent deposition flatness as a fluid having high viscosity on top of the actuator 31 and the support element 18. Form. Subsequently, a hard mask 45 made of a fifth photoresist 44 and aluminum (Al) is applied on the second sacrificial layer 42 to form the mirror 41 and the post 40. After the hard mask 45 and the fifth photoresist 44 are patterned by a conventional photolithography method, the second sacrificial layer 42 is formed along the pattern of the hard mask 45 and the fifth photoresist 44. By patterning a portion of the lower portion of the mirror-shaped 'C' lower electrode 24 that is not adjacent to the support line 20 (ie, the first and second upper electrodes 29 and 30 are formed thereon). Exposed part). In this case, the hard mask 45 is formed of aluminum on the fifth photoresist 44 under a pressure of about 2.3 mTorr, about 5 kW of power, and a flow rate of argon (Ar) gas, which is a deposition medium, about 110 sccm. Formed by vapor deposition on.

Next, aluminum is deposited on a portion of the exposed lower electrode 24 and on top of the hard mask 45 to a thickness of 0.1 to 1.0 mu m using a sputtering method or a chemical vapor deposition method, and the deposited metal is patterned. As a result, a mirror 41 having a rectangular flat plate shape and a post 40 supporting the mirror 41 are simultaneously formed. After the second sacrificial layer 42 is removed by plasma ashing, the first sacrificial layer 14 is removed by using xenon fluoride (XeF ₂ ) or bromine fluoride (BrF ₂ ) and cleaned. And drying treatment to complete the AMA device as shown in FIG.

However, in the above-described manufacturing method of the thin film type optical path control apparatus, the optical efficiency is lowered because the mirror is not formed horizontally due to stress generated in the aluminum layer deposited during the formation of the hard mask and the mirror made of aluminum. There is a problem. That is, aluminum is deposited under pressure of about 2.3 mTorr, about 5 kW of power, and an argon gas flow rate of about 110 sccm, and the aluminum layer is deposited by patterning the deposited aluminum layer to form a hard mask and a mirror. Due to the deformation stress such as residual stress generated during the patterning process, when the second sacrificial layer and the fifth photoresist made of acuflow are removed, a step of 2000 μs or more occurs at the edge portion and the remaining portion of the mirror, The horizontal degree is greatly reduced. Accordingly, it is difficult to maintain a constant reflection angle of the light incident from the light source, and as a result, the light efficiency is greatly lowered, resulting in a problem that the image quality of the image projected on the screen is degraded.

Accordingly, the present invention has been made to solve the above problems, an object of the present invention is to form a horizontal mirror through the change of deposition conditions of the hard mask and the mirror, to improve the light efficiency of the thin film type optical path control apparatus It is to provide a manufacturing method.

1 is a perspective view of a thin film type optical path adjusting device described in the applicant's prior application.

FIG. 2 is a cross-sectional view of the apparatus shown in FIG. _{1 taken along} lines A ₁ -A ₂ .

3A to 3C are manufacturing process diagrams of the apparatus shown in FIG. 2.

Figure 4 is a perspective view of a thin film type optical path control apparatus according to the present invention.

FIG. 5 is a cross-sectional view of the apparatus shown in FIG. _{4 taken along} line B ₁ -B ₂ .

6A to 6E are manufacturing process diagrams of the apparatus shown in FIGS. 4 and 5.

<Explanation of symbols for main parts of the drawings>

100: active matrix 101: substrate

120: transistor 135: first metal layer

140: first protective layer 145: second metal layer

150: second protective layer 155: etch stop layer

160: first sacrificial layer 170: support layer

171: first anchor 172a, 172b: second anchor

174: support line 175: support element

180: lower electrode 190, 191: first and second strained layers

200, 201: first and second upper electrodes 210: actuators

220, 221: first and second insulating layers

230 and 231: first and second upper electrode connecting members

250: Post 260: Mirror

270: Beer Hall 280: Beer Contact

300: second sacrificial layer 330: fourth photoresist

320: hard mask

In order to achieve the above object of the present invention, the present invention provides an active matrix comprising a first metal layer having a MOS transistor embedded therein and having a drain pad extending from the drain of the transistor, forming an actuator, and supporting it. A method of manufacturing a thin film optical path control device comprising forming an element and forming a mirror is provided. The actuator and the support element form and pattern a first sacrificial layer on top of the active matrix, and then form a first layer, a lower electrode layer, a second layer and an upper electrode layer thereon, and then pattern the layers. Is formed. The actuator includes first and second upper electrodes, first and second deformable layers and a lower electrode, wherein the support element includes a support line, a support layer integrally formed with the support line, and the support line of the support layer. First anchors and second anchors respectively contacting the active matrix below the adjacent portion. The forming of the mirror may include forming a second sacrificial layer on the support means and the actuator, forming a photoresist and a hard mask on the second sacrificial layer, and then patterning the hard mask. After etching a portion of the second sacrificial layer using a patterned hard mask, the same material as that of the hard mask is performed.

According to the present invention, a hard mask provided to improve the patterning accuracy of the second sacrificial layer is formed under deposition conditions where the stress becomes zero. Therefore, since the mirror is formed by depositing the same metal as the metal constituting the hard mask on top of the hard mask where no stress is generated, the strain stress generated in the mirror is close to zero, and thus the edge and the rest of the mirror The level of the mirror surface can be greatly improved because the step can be reduced to 500 mW or less. Accordingly, the light efficiency of the light incident on the mirror from the light source can be increased to improve the image quality of the image projected on the screen.

Hereinafter, a thin film type optical path adjusting apparatus and a manufacturing method thereof according to a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

Figure 4 shows a perspective view of a thin film type optical path control apparatus according to the present invention, Figure 5 shows a cross-sectional view of the device of Figure 4 cut along the line B ₁ -B ₂ .

Referring to FIG. 4, the thin film type optical path adjusting device according to the present invention includes an active matrix 100, a support element 175 formed on the active matrix 100, and an actuator 210 formed on the support element 175. And a mirror 260 formed on the actuator 210.

4 to 5, the active matrix 100 includes a substrate 101 in which M × N (M and N are natural numbers) P-MOS transistors 120 and the P-MOS transistors 120. A first metal layer 135 formed on the substrate 101, a first passivation layer 140 formed on the first metal layer 135, and a first passivation layer extending from the drain 105 and the source 110. The second metal layer 145 formed on the upper portion of the 140, the second protective layer 150 formed on the second metal layer 145, and the etch stop layer 155 formed on the second protective layer 150 are disposed. Include. The first metal layer 135 includes a drain pad extending from the drain 105 of the P-MOS transistor 120 to transmit a first signal (image signal), and the second metal layer 145 includes a titanium layer and nitride. It consists of a titanium layer.

Referring to FIG. 4, the support element 175 includes a support line 174, a support layer 170, a first anchor 171, and second anchors 172a, 172b. The support line 174 and the support layer 170 are horizontally formed on the etch stop layer 155 through the first air gap 165. The common electrode line 240 is formed on the support line 174, and the support line 174 serves to support the common electrode line 240.

The support layer 170 has a rectangular ring shape, preferably a rectangular ring shape, and is integrally formed with the support line 174 in a direction orthogonal to the support line 174 on the same plane. The first anchor 171 is integrally formed with the two arms in the lower portion between the two arms horizontally extending in the direction orthogonal to the support line 174 of the rectangular ring-shaped support layer 170 to form an etch stop layer ( 155, and two second anchors 172a and 172b are formed integrally with the two arms at an outer lower portion of the two arms and attached to the etch stop layer 155. The first anchor 171 and the second anchors 172a and 172b each have the shape of a rectangular box. The support layer 170 is supported by the first anchor 171 in the center portion and supported by both anchors 172a and 172b.

The first anchor 171 is formed on a portion in which the drain pad of the first metal layer 135 is formed below the etch stop layer 155. In the central portion of the first anchor 171, the first metal layer may be formed through the etch stop layer 155, the second passivation layer 150, the holes (not shown) of the second metal layer 145, and the first passivation layer 140. The via hole 270 is formed to the drain pad of 135.

The actuator 210 is formed on the support layer 170 in the shape of a mirror 'C' with respect to the support line 174. The actuator 210 includes a lower electrode 180, a first strained layer 190, a second strained layer 191, a first upper electrode 200, and a second upper electrode 201. The lower electrode 180 has a mirror-shaped 'c' shape spaced apart from the support line 174 by a predetermined distance, and protruding portions are stepped toward the first anchor 171 on one side of the lower electrode 180. Are formed corresponding to each other. The protrusions of the lower electrode 180 extend to the circumference of the via hole 270 formed in the first anchor 171, respectively.

The via contact 280 is formed from the drain pad of the first metal layer 135 to the protrusion of the lower electrode 180 through the via hole 280 to electrically connect the drain pad and the lower electrode 180.

The two arms of the mirror-shaped 'c' shaped lower electrode 180 each have the shape of a rectangular flat plate, and the first and second deformable layers 190 and 191 respectively have two arms of the lower electrode 180. It has the shape of a rectangular plate of narrower area and is formed on top of two arms of the lower electrode 180. In addition, the first and second upper electrodes 200 and 201 have a shape of a rectangular flat plate having a smaller area than the first and second deformable layers 190 and 191, respectively, and the first and second deformable layers 190 and 191. It is formed at the top of the.

The first insulating layer 220 is formed from one side of the first upper electrode 200 to a part of the support layer 170 through the first strained layer 190 and the lower electrode 180, and the first upper electrode 200. The first upper electrode connecting member 230 is formed from one side of the first through the first insulating layer 220 and the support layer 170 to the common electrode line 240. The first upper electrode connection member 230 connects the first upper electrode 200 and the common electrode line 240 to each other, and the first insulating layer 220 may include the first upper electrode 200 and the lower electrode 180. It is connected to each other to prevent electrical shorts. In addition, a second insulating layer 221 is formed from one side of the second upper electrode 201 to a part of the support layer 170 through the second deforming layer 191 and the lower electrode 180. The second upper electrode connection member 231 is formed from one side of the second upper electrode 201 to the common electrode line 240 through a portion of the second insulating layer 221 and the support layer 170. The second insulating layer 221 and the second upper electrode connecting member 231 are formed to be parallel to the first insulating layer 220 and the first upper electrode connecting member 230, respectively. The second upper electrode connecting member 231 connects the second upper electrode 201 and the common electrode line 240 to each other, and the second insulating layer 221 is formed by the second upper electrode 201 and the lower electrode 180. They are connected to each other to prevent electrical shorts.

A portion of the lower electrode 280 where the first and second upper electrodes 200 and 201 are not formed, that is, a portion formed parallel to the support line 174, is disposed below the mirror 260 and the lower portion of the mirror 260. The post 250 supporting the hard mask 320 is formed. The mirror 260 and the hard mask 320 are centrally supported by the post 250, and both sides thereof are horizontally formed on the actuator 210 via the second air gap 310. The mirror 260 reflects light incident from a light source (not shown) at a predetermined angle so that the image is projected onto the screen.

Hereinafter, a method of manufacturing a thin film type optical path control device according to the present invention will be described in detail with reference to the drawings.

6A to 6E are diagrams for describing a method of manufacturing the apparatus shown in FIGS. 4 and 5. In Figs. 6A to 6E, the same reference numerals are used for the same members as Figs. 4 and 5.

Referring to FIG. 6A, a device isolation layer 125 is formed on the substrate 101, which is an n-type doped silicon wafer, by using a silicon partial oxidation method (LOCOS). Subsequently, after forming the gate 115 made of a conductive material such as polysilicon in the active region, p ⁺ source 110 and drain 105 are formed by an ion implantation process, thereby forming M × N on the substrate 101. (M and N are natural numbers) P-MOS transistors 120 are formed.

After the insulating film 130 made of oxide is formed on the P-MOS transistor 120 formed thereon, the top of the source 110 and the drain 105 of the transistor 120 by photolithography, respectively. Form openings that expose. Subsequently, after depositing the first metal layer 135 made of titanium, titanium nitride, tungsten, nitride, or the like on the resultant, the first metal layer 135 is patterned by photolithography. The first metal layer 135 patterned as described above includes a drain pad extending from the drain 205 of the transistor 120 to the bottom of the first anchor 171 supporting the support layer 170.

A first protective layer 140 made of in-silicate glass (PSG) is stacked on the substrate 101 on which the first metal layer 135 and the transistor 120 are formed. The first passivation layer 140 is formed to have a thickness of about 8000 Å using chemical vapor deposition (CVD). The first protective layer 140 prevents damage to the substrate 101 in which the P-MOS transistor 120 is embedded during a subsequent process.

A second metal layer 145 including a titanium layer and a titanium nitride layer is formed on the first protective layer 140. The titanium layer is formed to have a thickness of about 300 kW by the sputtering method, and the titanium nitride layer is formed to have a thickness of about 1200 kW by the physical vapor deposition method (PVD) on the titanium layer. Since the light incident from the light source (not shown) is incident on the second metal layer 145 not only to the mirror 260 but also to a portion other than the portion covered by the mirror 260, a light leakage current ( photo leakage current flows to prevent the device from malfunctioning. Subsequently, a portion of the second metal layer 145 in which the via hole 270 is to be formed in a subsequent process, that is, a portion in which the drain pad of the first metal layer 135 is formed is etched into the second metal layer 145. Form a hole (not shown).

A second protective layer 150 made of in-silicate glass (PSG) is stacked on the second metal layer 145. The second protective layer 150 is formed to have a thickness of about 2000 kPa by a chemical vapor deposition method. The second protective layer 150 prevents the substrate 101 and the resulting products formed on the substrate 101 from being damaged during subsequent processing.

An etch stop layer 155 is stacked on the second passivation layer 150. The etch stop layer 155 prevents the resultant on the second passivation layer 150 and the substrate 101 from being etched and damaged during the subsequent etching process. The etch stop layer 155 is formed using low temperature oxide (LTO) such as silicon oxide (SiO ₂ ) or phosphorus pentoxide (P ₂ O ₅ ). The etch stop layer 155 is formed to have a thickness of about 0.2 to 0.8 μm at a temperature of about 350 to 450 ° C. by low pressure chemical vapor deposition (LPCVD). Accordingly, the substrate 101 having the transistor 120 embedded therein, the first metal layer 135, the first protective layer 140, the second metal layer 145, the second protective layer 150, and the etch stop layer 155 may be formed. The active matrix 100 is completed.

The first sacrificial layer 160 is stacked on the etch stop layer 155. The first sacrificial layer 160 serves to facilitate stacking of the thin films constituting the actuator 210. The first sacrificial layer 160 is formed to have a thickness of about 2.0 to 3.0 μm by using low pressure chemical vapor deposition (LPCVD) at a temperature of about 500 ° C. or less. Subsequently, the surface of the first sacrificial layer 160 is polished using a chemical mechanical polishing (CMP) method to planarize the surface of the first sacrificial layer 160 to have a thickness of about 1.1 μm.

6B is a plan view illustrating a state in which the first sacrificial layer 160 is patterned. 6A and 6B, after applying and patterning a first photoresist (not shown) on the first sacrificial layer 160, the first sacrificial layer 160 is formed using the first photoresist as a mask. The first anchor 171 supporting the support layer 170 formed later by etching a portion where the hole of the second metal layer 145 is formed below and portions adjacent to both sides to expose a portion of the etch stop layer 155. And the second anchors 172a and 172b are formed and the first photoresist is removed. Accordingly, the etch stop layer 155 is exposed in the shape of three squares spaced apart by a predetermined distance.

Referring to FIG. 6C, the first layer 169 is stacked on the exposed etch stop layer 155 and the first sacrificial layer 160. The first layer 169 is formed of a hard material such as nitride or metal to have a thickness of about 0.1 to 1.0 μm by low pressure chemical vapor deposition (LPCVD). The first layer 169 is later patterned with a support element 275 that includes a support layer 170, a support line 174, and anchors 171, 172a, 172b.

The lower electrode layer 179 is stacked on top of the first layer 169. The lower electrode layer 179 is formed of a metal having electrical conductivity such as platinum, tantalum or platinum-tantalum to have a thickness of about 0.1 to 1.0 μm using a sputtering method or a chemical vapor deposition method. The lower electrode layer 179 is subsequently applied with a first signal (image signal) from the outside, and patterned as a mirror-shaped 'c' shaped lower electrode 180 having stepped protrusions formed on one side thereof.

The second layer 189 is formed on the lower electrode layer 179 by using a piezoelectric material such as PZT or PLZT. Preferably, the second layer 189 is formed by spin coating PZT prepared by the sol-gel method to have a thickness of about 0.4 μm. Subsequently, the piezoelectric material constituting the second layer 189 is subjected to heat treatment by a rapid heat treatment (RTA) method to perform phase change. The second layer 189 is later formed with the first strained layer 190 and the second upper electrode 201 and the lower portion, which are deformed by a first electric field generated between the first upper electrode 200 and the lower electrode 180. It is patterned into a second strained layer 191 causing strain by a second electric field generated between the electrodes 180.

The upper electrode layer 199 is stacked on top of the second layer 189. The upper electrode layer 199 is formed to have a thickness of about 0.1 to 1.0 μm using a sputtering method or a chemical vapor deposition method on an electrically conductive metal such as platinum, tantalum, silver, or platinum-tantalum. The upper electrode layer 199 is later patterned with a first upper electrode 200 and a second upper electrode 201, each of which is applied with a second signal (bias signal) and spaced apart by a predetermined distance.

Referring to FIG. 6D, after applying and patterning a second photoresist (not shown) on the upper electrode layer 199, each of the upper electrode layers 199 may be formed using a second photoresist as a mask. The first upper electrode 200 and the second upper electrode 201 having a shape, preferably, a rectangular flat plate, and spaced apart from each other by a predetermined distance, are patterned, and then the second photoresist is removed. The second signal is applied to the first and second upper electrodes 200 and 201 through the common electrode line 240 formed later from the outside, respectively.

Subsequently, the second deformable layer 190 is formed by patterning the second layer 189 in the same manner as the method of patterning the upper electrode layer 199, each having a rectangular flat plate shape, and separated from each other by a predetermined distance. And a second strained layer 191. In this case, as shown in FIG. 4, the first and second deformable layers 190 and 191 are patterned to have a rectangular flat plate having a slightly larger area than the first and second upper electrodes 300 and 301, respectively.

Subsequently, the lower electrode layer 179 has a mirror-shaped 'c' shape with respect to the support line 174 formed later, and has lower electrodes 180 having protrusions formed stepped toward the first anchor 171. To form. In this case, the two arms of the lower electrode 180 are formed to have the shape of a rectangular plate having a larger area than the first and second deformable layers 190 and 191, respectively. In addition, when the lower electrode layer 179 is patterned, the common electrode line 240 is simultaneously formed with the lower electrode 180 in a direction perpendicular to the lower electrode 180 on one side of the first layer 169. The common electrode line 240 is formed to be spaced apart from the lower electrode 180 by a predetermined distance on the support line 174 formed later. Accordingly, the actuator 210 including the first and second upper electrodes 200 and 201, the first and second strained layers 190 and 191, and the lower electrode 180 is completed.

Subsequently, the first layer 169 is patterned to form a support element 175 comprising a support layer 170, a support line 174, a first anchor 171 and second anchors 172a, 172b. . At this time, of the portions of the first layer 169 contacting the etch stop layer 155 exposed in the shape of the three quadrangles, both sides thereof are second anchors 172a and 172b, and the center portion of the first anchor 169 171). The first anchor 171 and the second anchors 172a and 172b each have a rectangular box shape, and a hole of the second metal layer 145 and a hole of the first metal layer 135 are disposed below the first anchor 171. The drain pad is located. The first and second deformable layers 190 and 191 are formed parallel to each other on two arms horizontally extending in a direction orthogonal to the support line 174 of the support layer 170, respectively. Accordingly, the first anchor 171 is formed between the mirror-shaped 'c' shaped lower electrodes 180, and the second anchors 172a and 172b are formed at the outer bottom of the lower electrode 180, respectively. do.

Subsequently, a third photoresist (not shown) is applied and patterned on top of support element 175 and actuator 210 to form first and second tops from common electrode line 240 formed on support line 274. Portions of the electrodes 200 and 201 are exposed. At this time, even the protrusions of the lower electrode 180 are exposed together from the first anchor 171.

Subsequently, by depositing and patterning a low temperature oxide, such as amorphous silicon or silicon oxide to phosphorus pentoxide, on the exposed portion, through a portion of the first upper electrode 200 through the first strained layer 190 and the lower electrode 180. The first insulating layer 220 is formed up to a part of the support layer 170, and at the same time, a part of the support layer 170 is formed from the part of the second upper electrode 201 through the second strained layer 191 and the lower electrode 180. Until the second insulating layer 221 is formed. The first and second insulating layers 220 and 221 are formed to have a thickness of about 0.2 to 0.4 μm, respectively, by low pressure chemical vapor deposition (LPCVD).

Next, the first anchor 171, the etch stop layer 155, A portion of the second passivation layer 150 and the first passivation layer 140 is etched to form the via hole 270 up to the drain pad of the first metal layer 135, and then through the via hole 270 from the drain pad. The via contact 280 is formed to the protrusions of the lower electrode 180 (see FIG. 4). At the same time, the first upper electrode connecting member 230 is formed from the first upper electrode 200 to the common electrode line 240 through a portion of the first insulating layer 220 and the support layer 170, and the second upper electrode The second upper electrode connecting member 231 is formed from the 201 to the common electrode line 240 through a portion of the second insulating layer 221 and the support layer 170.

The via contact 280, the first and second upper electrode connection members 230 and 231 may each have a thickness of about 0.1 to 0.2 μm by sputtering or chemical vapor deposition using platinum, tantalum or platinum-tantalum. After deposition to have, the deposited metal is formed by patterning. The first and second upper electrode connecting members 230 and 231 connect the first and second upper electrodes 200 and 201 and the common electrode line 240, respectively, and the lower electrode 180 connects the via contact 280. It is connected to the drain pad of the first metal layer 135 through.

Referring to FIG. 6E, accucuflo having an excellent deposition flatness on top of the actuator 210 and the support element 175 has a sufficient height to completely cover the actuator 210 using a spin coating method. The second sacrificial layer 300 is formed. Since the accucu has a property of being flattened at the same time as the application, when the second sacrificial layer 300 is formed of the accucu, a separate process for planarizing the surface of the second sacrificial layer 300 is not added. In addition, the accucu may be applied by a spin coating method similarly to a photoresist and easily removed by a plasma ashing method. However, since the accucu has a characteristic of being etched together when developing the photoresist, the second sacrificial layer 300 may not be accurately patterned when the second sacrificial layer 300 is patterned by a photolithography process. Occurs. Therefore, in order to solve this problem, after applying the fourth photoresist 330 on the second sacrificial layer 300, it is hard to have a thickness of about 3000 kPa by sputtering a metal such as aluminum thereon. The mask 320 is formed. Preferably, the hard mask 320 is formed of the same metal as the mirror to be formed thereon, and is formed under deposition conditions in which the stress is zero. That is, the hard mask 320 has a power of about 10 kW, the flow rate of argon (Ar) gas, which is a deposition medium, is about 70 sccm, and an operating pressure (W / P) of about 1.7 mTorr under deposition conditions of sputtering aluminum to about It is formed to a thickness of 3000Å. In this case, since the stress does not occur during the deposition of the hard mask 320, the mirror 260 formed thereon is not bent upward or downward.

Subsequently, the hard mask 320 is patterned by a photolithography method, and then the fourth photoresist 330 and the second sacrificial layer 300 are patterned by using the patterned hard mask 320 as an etching mask. A portion of the lower electrode 180 having a mirror-shaped 'c' shape in parallel to the support line 174 (a portion where the first and second upper electrodes 200 and 201 are not formed thereon). ).

Next, sputtering or chemical vapor deposition is performed on a portion of the exposed lower electrode 180 and on top of the patterned hard mask 320 using the same metal as the hard mask 320 and having excellent reflectivity. And the deposited aluminum is patterned to simultaneously form a mirror 260 having a rectangular flat plate shape and a post 250 supporting the mirror 260.

Subsequently, the second sacrificial layer 300 and the fourth photoresist 330 are removed by a plasma ashing method, and the first sacrificial layer 160 is formed using xenon fluoride (XeF ₂ ) or bromine fluoride (BrF ₂ ). ) Is removed, followed by washing and drying to complete the AMA device as shown in FIG. 4. As such, when the second sacrificial layer 300 is removed, the second air gap 310 is formed at the position of the second sacrificial layer 300, and when the first sacrificial layer 160 is removed, the first sacrificial layer 160 is formed. The first air gap 165 is formed in position.

In the above-described thin film type optical path control apparatus according to the present invention, the first signal transmitted from the outside is the MOS transistor 120 embedded in the active matrix 100, the drain pad of the first metal layer 135 and the via contact 280. The second signal is applied to the lower electrode 180, and at the same time, a second signal is applied to the first and second upper electrodes 200 and 201 through the common electrode line 240 from the outside, respectively, so that the first upper electrode 200 is applied. A first electric field is generated between the and the lower electrode 180 according to the potential difference, and a second electric field is generated between the second upper electrode 201 and the lower electrode 180 according to the potential difference. The first strained layer 190 formed between the first upper electrode 200 and the lower electrode 180 causes deformation by the first electric field, and simultaneously the second upper electrode 201 and the lower part by the second electric field. The second strained layer 191 formed between the electrodes 180 causes deformation.

As the first and second deformable layers 190 and 191 contract in a direction orthogonal to the first and second electric fields, respectively, the actuator 210 including the first and second deformable layers 190 and 191 is predetermined. Bend at the angle of. The mirror 260 reflecting light incident from the light source is inclined together with the actuator 210 because the mirror 260 is supported by the post 250 and is formed on the actuator 210. Accordingly, the mirror 260 reflects incident light at a predetermined angle, and the reflected light passes through the slit to form an image on the screen.

According to the manufacturing method of the thin film type optical path control apparatus which concerns on this invention, the hard mask provided in order to improve the patterning accuracy of a 2nd sacrificial layer is formed under the deposition conditions in which stress becomes zero. Therefore, since the mirror is formed by depositing the same metal as the metal constituting the hard mask on top of the hard mask where no stress is generated, the strain stress generated in the mirror is close to zero, and thus the edge and the rest of the mirror The level of the mirror surface can be greatly improved because the step can be reduced to 500 mW or less. Accordingly, the light efficiency of the light incident on the mirror from the light source can be increased to improve the image quality of the image projected on the screen.

As described above, although described with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified without departing from the spirit and scope of the invention described in the claims below. And can be changed.

Claims (2)

Providing an active matrix including a first metal layer having a MOS transistor embedded therein and having a drain pad extending from the drain of the transistor; Forming a first sacrificial layer on the active matrix, and then patterning the first sacrificial layer to expose portions of the active matrix in which the drain pads of the first metal layer are formed and both sides of the portions in which the drain pads are formed; ; Forming a first layer, a lower electrode layer, a second layer, and an upper electrode layer on the exposed active matrix and the first sacrificial layer; Patterning the upper electrode layer, the second layer, and the lower electrode layer to form an actuator including first and second upper electrodes, first and second deformable layers, and a lower electrode; Patterning the first layer to form a support line formed on the active matrix, a support layer integrally formed with the support line, and a portion in which the drain pad of the first metal layer under the portion adjacent to the support line is formed; Forming supporting means comprising first and second anchors respectively contacting the active matrix on both sides of the pad-formed portion; Forming a second sacrificial layer on top of said support means and said actuator; Forming a photoresist and a hard mask on the second sacrificial layer; After patterning the hard mask, etching a portion of the second sacrificial layer using the patterned hard mask; And And forming a mirror on the hard mask using the same material as the hard mask. The apparatus of claim 1, wherein the forming of the hard mask is performed under deposition conditions in which a power of about 10 kW, an operating pressure of about 1.7 mTorr, and a flow rate of argon gas, which is a deposition medium, is about 70 sccm. Method of preparation.