KR20000044206A - Thin film micromirror array-actuated device and manufacturing method thereof - Google Patents

Abstract

PURPOSE: A manufacturing method of the TMA device is provided to prevent the sticking of the actuator by shortening the depth of the post hole and accordingly, the optical energy utilization is improved. CONSTITUTION: A device comprises an active matrix(100), a substrate(101), a first metal layer(135), a first protection layer(140), a second metal layer(145), a second protection layer(150), an etching preventing layer(155), a first sacrificial layer(160), and a supporting layer(170). A manufacturing method comprises a step of providing the active matrix including the first metal layer which has the drain pad extended from the drain of the transistor; a step of depositing a first layer, lower electrode layer, second layer, upper electrode layer and non-reflective layer; a step of forming non-reflective layer by patterning the reflection preventing layer; a step of forming a supporting instrument including the second anchor, first anchor, supporting layer, and a supporting line; a step of forming a post hole by patterning and depositing the sacrificial layer; and a step of forming a mirror on the upper part of the non-reflective layer.

Description

Thin film type optical path control device and its manufacturing method

The present invention relates to a thin film type optical path control device using a thin-film micromirror array-actuated (TMA) and a manufacturing method thereof, and more particularly to a thin film type optical path control device which can prevent a point defect of a pixel and improve the light efficiency of incident light. And to a method for producing the same.

Optical path control devices or spatial light modulators for projecting optical energy onto a screen may be applied to various fields such as optical communication, image processing, and information display devices. Typically, image processing apparatuses using such optical modulators are classified into a direct-view image display device and a projection-type image display device according to a method of displaying optical energy on a screen. do.

An example of a direct view image display device is a CRT (Cathode Ray Tube), which is a so-called CRT device, which has excellent image quality but increases in weight and volume as the size of the screen increases, leading to increased manufacturing costs. There is. Projection type image display devices include liquid crystal display (LCD), deformable mirror device (DMD) and AMA. Such projection image display apparatuses can be further divided into two groups according to their optical characteristics. That is, devices such as LCDs can be classified as transmissive spatial light modulators, while DMD and AMA can be classified as reflective spatial light modulators.

Transmission optical modulators, such as LCDs, have a very simple optical structure, which makes them thinner, lighter in weight, and smaller in volume. However, the light efficiency is low due to the polarity of the light, there is a problem inherent in the liquid crystal material, for example, the response speed is slow and its inside is easy to overheat. In addition, the maximum light efficiency of existing transmission optical modulators is limited to a range of 1-2% and requires dark room conditions to provide acceptable display quality. Therefore, optical modulators such as DMD and AMA have been developed to solve the above problems.

Although DMD shows a relatively good light efficiency of about 5%, the hinge structure employed in the DMD not only causes serious fatigue problems, but also requires a very complicated and expensive driving circuit. In the AMA, each of the mirrors installed therein reflects light incident from the light source at a predetermined angle, and the reflected light is projected on the screen through an aperture such as a slit or a pinhole. It is a device that can adjust the speed of light to form an image. Therefore, its structure and operation principle are simple, and high light efficiency (more than 10% light efficiency) can be obtained compared to LCD or DMD. In addition, the contrast of the image projected on the screen is improved to obtain a brighter and clearer image.

These AMA devices are largely divided into bulk type and thin film type. The bulk optical path control device is disclosed in US Pat. No. 5,085,497 to Gregory Um et al. The bulk optical path control device cuts a thin layer of multilayer ceramic, mounts a ceramic wafer having a metal electrode therein in an active matrix including a transistor, processes it using a sawing method, and applies a mirror to the top. By installing. However, the bulk optical path control device requires very high precision in design and manufacturing, and has a disadvantage in that the response of the deformation layer is slow.

Accordingly, a thin film type optical path control device (TMA) that can be manufactured using a semiconductor manufacturing process has been developed. Such a thin film type optical path control device is disclosed in Korean Patent Application No. 98-26319 filed by the applicant of the Korean Patent Office on June 30, 1998 have.

FIG. 1 is a perspective view of the thin film type optical path control device, and FIG. 2 is a cross-sectional view of the device of FIG. 1 taken along line A ₁ -A ₂ .

1 and 2, the thin film type optical path control device includes an active matrix 16, a support element 18, an actuator 31, and a mirror 41.

Referring to FIG. 2, the active matrix 16 includes a substrate 1 in which M × N (M, N is a natural number) MOS transistors 5, a drain 2 and a source of the transistor 5. 3) the first metal layer 8 formed on the substrate 1 and the first protective layer 9, the second metal layer 10, and the second protective layer sequentially formed on the first metal layer 8. 12 and the etch stop layer 13.

Referring to FIG. 1, the support element 18 comprises a support layer 19, a support line 20, a first anchor 21 and second anchors 22a, 22b. The support line 20 and the support layer 19 are horizontally formed on the etch stop layer 13 via the first air gap 15. The common electrode line 32 is formed on the support line 20, and the support layer 19 is integrally formed along the direction orthogonal to the support line 20 in the shape of a square ring. A first anchor 21 is integrally formed with the arms and attached to the etch stop layer 13 at a lower portion between two arms horizontally extending in a direction orthogonal to the support line 20 of the support layer 19. Two second anchors 22a and 22b are integrally formed on the outer lower portion of the arms and attached to the etch stop layer 13. The support layer 19 is supported by the first anchor 21 in the center portion and supported by both anchors 22a and 22b. The first anchor 21 is positioned on a portion of the anti-etching layer 13 at which the drain pad of the first metal layer 8 is formed. A via hole 38 is formed from the first anchor 21 to the drain pad of the first metal layer 8.

The actuator 31 includes a lower electrode 24, a first strained layer 26, a second strained layer 27, a first upper electrode 29, and a second upper electrode 30. The lower electrode 24 has a mirror-shaped 'c' shape spaced apart from the support line 20 by a predetermined distance, and protruding portions are stepped toward the first anchor 21 on one side of the lower electrode 24. It is formed to correspond to each other and extends to the periphery of the via hole 38 formed in the first anchor 21, respectively. The via contact 39 is formed from the drain pad of the first metal layer 8 to the protrusions of the lower electrode 24 through the via hole 38 to connect the drain pad and the lower electrode 24. The two arms of the lower electrode 24 each have a shape of a rectangular plate, and the first and second deformable layers 26 and 27 respectively have a shape of a rectangular plate having a narrower area than the two arms of the lower electrode 24. It is formed on top of the arms of the lower electrode 24. In addition, the first and second upper electrodes 29 and 30 have a shape of a rectangular flat plate having a smaller area than the first and second deformable layers 26 and 27, respectively, and the first and second deformable layers 26 and 27. It is formed at the top of the.

The first insulating layer 34 is formed from one side of the first upper electrode 29 to a part of the supporting layer 19, and the first insulating layer 34 and the supporting layer 19 from one side of the first upper electrode 29. The first upper electrode connecting member 36 is formed up to the common electrode line 32 through a portion of the upper electrode connecting member 36. In addition, a second insulating layer 35 is formed from one side of the second upper electrode 30 to a part of the support layer 19, and the second insulating layer 35 and the supporting layer (from one side of the second upper electrode 30) A second upper electrode connecting member 37 is formed up to the common electrode line 32 through a portion of 19.

A mirror 41 is formed at a portion of the mirror-shaped 'c'-shaped lower electrode 24 in which the first and second upper electrodes 29 and 30 are not formed, that is, parallel to the support line 20. A supporting post 40 is formed. The mirror 41 is centrally supported by the post 40, and both sides thereof are horizontally formed on the upper portion of the actuator 31 via the second air gap 43. The mirror 41 reflects light incident from a light source (not shown) at a predetermined angle.

Hereinafter, a method of manufacturing the above-described thin film type optical path control device will be described.

3A to 3C are diagrams for describing a method of manufacturing the apparatus shown in FIG. 2. Referring to FIG. 3A, a device isolation layer 6 is formed on a substrate 1, which is an n-type doped silicon wafer, by using silicon partial oxidation (LOCOS) to distinguish between an active region and a field region. Subsequently, a gate 4 made of a material such as polysilicon is formed on the active region, and then p ⁺ source 3 and drain 2 are formed by an ion implantation process, thereby forming M x on the substrate 1. N (M and N are natural numbers) P-MOS transistors 5 are formed.

After the insulating film 7 made of oxide is formed on the upper part of the resultant product in which the transistor 5 is formed, openings are formed to expose the upper portions of one side of the source 3 and the drain 2 by photolithography. Subsequently, a first metal layer 8 made of titanium, titanium nitride, tungsten, nitride, or the like is deposited on top of the resultant product in which the openings are formed, and then the first metal layer 8 is patterned. The patterned first metal layer 8 includes a drain pad extending from the drain 2 of the transistor 5 to the bottom of the first anchor 21.

A first protective layer 9 is formed on the first metal layer 8 and on top of the substrate 1 to prevent damage to the substrate 1 in which the transistor 5 is embedded during subsequent processing. The first protective layer 9 is formed of a silicate glass (PSG) having a thickness of 8000 kPa by chemical vapor deposition (CVD) method. The second metal layer 10 is formed on the first protective layer 9. The second metal layer 10 is formed by sputtering titanium to form a titanium layer with a thickness of 300 kV, and then forming a titanium nitride layer having a thickness of 1200 kV on the titanium layer by physical vapor deposition (PVD). Is completed. The second metal layer 10 enters the incident light not only to the mirror 41 but also to a portion other than the portion covered by the mirror 41, thereby preventing a device from malfunctioning due to a light leakage current flowing through the active matrix 16. Subsequently, a portion of the second metal layer 10 under which the drain pad of the first metal layer 8 is positioned is etched in consideration of the position where the via hole 38 is to be formed later. Not formed).

On the upper part of the second metal layer 10 is laminated a second protective layer 12 made of insilicate glass. The second protective layer 12 is formed to have a thickness of about 2000 kPa by chemical vapor deposition. The second protective layer 12 prevents the substrate 1 and the resulting products formed on the substrate 1 from being damaged during subsequent processing. On top of the second passivation layer 12 is an etch stop layer 13 that prevents the second passivation layer 12 and the resulting products on the substrate 1 from being etched during the subsequent etching process. The etch stop layer 13 is made of low temperature oxide (LTO) such as silicon oxide (SiO ₂ ) or phosphorus pentoxide (P ₂ O ₅ ). The etch stop layer 13 is formed to have a thickness of 0.2-0.8 μm at 350-450 ° C. by low pressure chemical vapor deposition (LPCVD).

The first sacrificial layer 14 is stacked on the etch stop layer 13. The first sacrificial layer 14 is formed of polysilicon to have a thickness of 2.0 to 3.0 μm by low pressure chemical vapor deposition (LPCVD). Subsequently, the surface of the first sacrificial layer 14 is polished by chemical mechanical polishing (CMP) to planarize the surface of the first sacrificial layer 14 to have a thickness of 1.1 mu m. Subsequently, after applying and patterning a first photoresist (not shown) on top of the first sacrificial layer 14, the second photoresist is used as a mask, and a second photoresist is disposed below the first sacrificial layer 14. By etching the portions in which the holes of the metal layer 12 are formed and portions adjacent to both sides thereof to expose a portion of the etch stop layer 13, the first anchor 21 and the second anchors 22a supporting the support layer 19 later. 22b) is formed and the first photoresist is removed. Accordingly, the etch stop layer 13 is exposed in the shape of three squares spaced apart by a predetermined distance.

The first layer 17 is stacked on the exposed etch stop layer 13 and the first sacrificial layer 14 as described above. The first layer 17 is formed to have a thickness of 0.1 to 1.0 mu m by low pressure chemical vapor deposition (LPCVD). The lower electrode layer 23 is stacked on top of the first layer 17. The lower electrode layer 23 is formed to have a thickness of 0.1 to 1.0 μm using a metal such as platinum (Pt), tantalum (Ta), or platinum-tantalum (Pt-Ta) by sputtering or chemical vapor deposition.

The second layer 25 made of a piezoelectric material is stacked on the lower electrode layer 23. The second layer 25 is formed by spin coating PZT prepared by the sol-gel method to have a thickness of 0.4 μm. Subsequently, the piezoelectric material constituting the second layer 25 is subjected to heat treatment by rapid thermal treatment (RTA) to cause phase shift. The upper electrode layer 28 is stacked on top of the second layer 25. The upper electrode layer 28 is formed of a metal such as platinum, tantalum, silver, or platinum-tantalum to have a thickness of 0.1 to 1.0 mu m using a sputtering method or a chemical vapor deposition method.

Referring to FIG. 3B, after applying and patterning a second photoresist (not shown) on the upper electrode layer 28, the upper electrode layer 28 is formed in a rectangular flat plate using the second photoresist as a mask. And patterning the first and second upper electrodes 29 and 30 formed in parallel with each other, and then removing the second photoresist. A second signal (bias signal) is applied to the first and second upper electrodes 29 and 30 through a common electrode line 32 formed later from the outside, respectively.

Subsequently, the second layer 25 is patterned in the same manner as the patterning of the upper electrode layer 28 to form first and second strained layers 26 and 27, each having a shape of a rectangular flat plate and formed in parallel with each other. do. In this case, as shown in FIG. 1, the first and second strained layers 26 and 27 are patterned to have a rectangular flat plate shape slightly wider than the first and second upper electrodes 29 and 30, respectively. Subsequently, the lower electrode layer 23 has a mirror-shaped 'c' shape with respect to the support line 20 formed later by patterning the lower electrode layer 23, and has a lower electrode 24 having protrusions formed stepped toward the first anchor 21. ). In this case, the two arms of the lower electrode 24 have the shape of a rectangular flat plate having a larger area than the first and second deforming layers 26 and 27, respectively. In addition, when the lower electrode layer 23 is patterned, the common electrode line 32 is formed simultaneously with the lower electrode 24 in a direction perpendicular to the lower electrode 24 on one side of the first layer 17. The common electrode line 32 is formed to be spaced apart from the lower electrode 24 by a predetermined distance on the support line 20 formed later. Thus, the actuator 31 including the first and second upper electrodes 29 and 30, the first and second strained layers 26 and 27, and the lower electrode 24 is completed.

The first layer 17 is then patterned to form a support element 18 comprising a support layer 19, a support line 20, a first anchor 21 and second anchors 22a, 22b. At this time, both sides of the portion of the first layer 17 contacting the etch stop layer 13 exposed in the three quadrangles are second anchors 22a and 22b and the center portion is the first anchor 21. . Each of the first anchor 21 and the second anchors 22a and 2b has a rectangular box shape, and a hole of the second metal layer 10 and a hole of the first metal layer 8 are disposed below the first anchor 21. The drain pad is located. Therefore, the first anchor 21 is formed below the lower electrode 24, and the second anchors 22a and 22b are formed below the outer side of the lower electrode 24, respectively.

Subsequently, a third photoresist (not shown) is applied and patterned on the support element 18 and the actuator 31 to form first and second upper portions from the common electrode line 32 formed on the support line 19. A part of the electrodes 29 and 30 are exposed respectively. At this time, even the protrusions of the lower electrode 24 are exposed together from the first anchor 21.

Subsequently, silicon oxide or phosphorus pentoxide, which is amorphous silicon or a low temperature oxide, is deposited and patterned on the exposed portion, so that a portion of the first upper electrode 29 is formed through the first strained layer 26 and the lower electrode 24. The first insulating layer 34 is formed to a part of the support layer 19, and at the same time, a part of the support layer 19 through the second strained layer 27 and the lower electrode 24 from a part of the second upper electrode 30. Until the second insulating layer 35 is formed. The first and second insulating layers 34 and 35 are formed to have a thickness of 0.2 to 0.4 µm, respectively, by low pressure chemical vapor deposition (LPCVD).

Next, the first anchor 21, the etch stop layer 13, and the first anchor 21 are formed from a central portion of the first anchor 21, which is a portion where the hole of the second metal layer 10 and the drain pad of the first metal layer 8 are formed below. After the second protective layer 12 and the first protective layer 9 are etched to form the via hole 38 to the drain pad, the via contact is extended from the drain pad to the protrusions of the lower electrode 24 through the via hole 38. 39). At the same time, the first upper electrode connecting member 36 and the second upper electrode 30 extend from the first upper electrode 29 to the common electrode line 32 through a part of the first insulating layer 34 and the support layer 19. The second upper electrode connecting member 37 is formed from the second insulating layer 35 and the support layer 19 to the common electrode line 32.

The via contact 39 and the first and second upper electrode connecting members 36 and 37 are deposited by depositing platinum or platinum-tantalum to have a thickness of 0.1 to 0.2 μm by sputtering or chemical vapor deposition. Patterned metal is formed. The first and second upper electrode connecting members 36 and 37 connect the first and second upper electrodes 29 and 30 to the common electrode line 32, respectively, and the lower electrode 24 connects the via contact 39. It is connected to the drain pad through.

Referring to FIG. 3C, a second sacrificial layer 42 is formed by spin coating an acfloflo having excellent deposition flatness on top of the actuator 31 and the support element 18. Subsequently, in order to form the mirror 41 and the post 40, after applying and patterning a fourth photoresist (not shown) on the second sacrificial layer 42, the fourth photoresist is used as a mask. By etching a portion of the second sacrificial layer 42, a portion of the mirror-shaped 'c' shaped lower electrode 24 which is not adjacent to the support line 20 but formed in parallel (ie The first and second upper electrodes 29 and 30 are not formed).

Next, aluminum is deposited on a portion of the exposed lower electrode 24 and the second sacrificial layer 42 to a thickness of 0.1 to 1.0 μm using a sputtering method or a chemical vapor deposition method. By patterning to form a mirror 41 having a shape of a square flat plate and a post 40 for supporting the mirror 41 at the same time. After the second sacrificial layer 42 and the fourth photoresist are removed by plasma ashing, the first sacrificial layer 14 is replaced with xenon fluoride (XeF ₂ ) or bromine fluoride (BrF ₂ ). Removal, and washing and drying treatments are completed to complete the TMA device as shown in FIG.

However, in the above-described thin film type optical path control device, a part of the upper electrode made of metal is exposed between the adjacent mirrors of the pixels, and the incident light is reflected on the exposed part, so that the image quality of the image projected onto the screen, in particular, The problem of lowering the contrast at the black level arises. In addition, since the depth of the portion to be etched to form the post is too deep, the process time is long, and the actuator does not drive even when a signal is applied due to the sticking of the support layer and the active matrix at the position where the post is located. The point defect of the pixel to be generated was very high.

Accordingly, an object of the present invention is to provide a thin film type optical path control apparatus and a method for manufacturing the same, which can improve the light efficiency of incident light while preventing a point defect of a pixel by forming an antireflection layer on the upper electrode and changing the position of the post. will be.

1 is a perspective view of a thin film type optical path adjusting device described in the applicant's prior application.

FIG. 2 is a cross-sectional view of the apparatus shown in FIG. _{1 taken along} lines A ₁ -A ₂ .

3A to 3E are manufacturing process diagrams of the apparatus shown in FIG.

Figure 4 is a perspective view of a thin film type optical path control apparatus according to the present invention.

5 is a cross-sectional view of the apparatus of FIG. 4 taken along line B ₁ -B ₂ .

6A to 6E are manufacturing process diagrams of the apparatus shown in FIGS. 4 and 5.

<Explanation of symbols for main parts of the drawings>

100: active matrix 101: substrate

120: transistor 135: first metal layer

140: first protective layer 145: second metal layer

150: second protective layer 155: etch stop layer

160: first sacrificial layer 170: support layer

171: first anchor 172a, 172b: second anchor

174: support line 175: support element

180: lower electrode 180b: first electrode

190: strained layer 200: upper electrode

205: antireflective layer 210: actuator

220, 221: first and second insulating layers

230 and 231: first and second upper electrode connecting members

250: Post 260: Mirror

270: Beer Hall 280: Beer Contact

300: second sacrificial layer

In order to achieve the above object of the present invention, the present invention provides an active matrix having a MOS transistor and having a drain pad, formed on top of the active matrix, and including a support line, a support layer, a first anchor and a second anchor. And an actuator including a lower electrode, a strain layer, and an upper electrode formed on the support layer and having a mirror-shaped 'c' shape with respect to the support line, an antireflection layer formed on the upper electrode, and the antireflection layer It provides a thin film type optical path control device including a mirror formed on the top.

In order to achieve the above object, the present invention, the step of laminating a first layer, a lower electrode layer, a second layer, an upper electrode layer and an anti-reflection film on top of an active matrix having a MOS transistor and having a drain pad, the anti-reflection film Forming an antireflection layer by patterning the upper electrode layer, the second layer, and the lower electrode layer to form an actuator including an upper electrode, a deformation layer, and a lower electrode each having a mirror-shaped “c” shape; Patterning the first layer to form a support means comprising a support line, a support layer, a first anchor and a second anchor, and forming a mirror on top of the antireflective layer. Provide a method.

According to the present invention, by stacking an antireflection layer on the upper electrode, it is possible to prevent the incident light from being reflected by the mirror and a part of the upper electrode exposed between the mirrors. In addition, since the antireflection layer, the upper electrode, the deformation layer, and the lower electrode having the same shape are stacked, and the post is formed on the antireflection layer, the depth of the post hole is shortened to prevent sticking of the actuator generated during the post hole forming process. You can prevent it. Therefore, the light efficiency of incident light can be improved, and the point defect of the pixel resulting from sticking of an actuator can be prevented.

Hereinafter, a thin film type optical path adjusting device according to a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

Figure 4 shows a perspective view of the thin film type optical path control apparatus according to the present invention, Figure 5 shows a cross-sectional view of the device of Figure 4 cut line B ₁ -B ₂ .

4 and 5, the thin film type optical path control apparatus according to the present invention includes an active matrix 100, a support element 175 formed on the active matrix 100, and an actuator formed on the support element 175. 210 and a mirror 260 formed on the actuator 210.

The active matrix 100 is formed from a substrate 101 having M × N (M, N being a natural number) P-MOS transistors 120, a drain 105 of the transistor 120, and a source 110. The first metal layer 135 formed on the substrate 101, the first protective layer 140 formed on the first metal layer 135, and the second metal layer formed on the first protective layer 140. 145, a second passivation layer 150 formed on the second metal layer 145, and an etch stop layer 155 formed on the second passivation layer 150.

The first metal layer 135 includes a drain pad extending from the drain 105 of the transistor 120 to transmit a first signal (image signal), and the second metal layer 145 includes a titanium layer and a titanium nitride layer. Is done.

Referring to FIG. 5, the support element 175 includes a support line 174, a support layer 170, a first anchor 171, and second anchors 172a and 172b. The support line 174 and the support layer 170 are horizontally formed on the etch stop layer 155 through the first air gap 165. The common electrode line 240 is formed on the support line 174, and the support line 174 serves to support the common electrode line 240.

The support layer 170 has a rectangular ring shape, preferably a rectangular ring shape, and is integrally formed along a direction orthogonal to the support line 174 on the same plane. A first anchor 171 is integrally formed with the arms at a lower portion between two arms horizontally extending in a direction orthogonal to the support line 174 of the rectangular annular support layer 170 to prevent the etch stop layer 155. The second anchors 172a and 172b are integrally formed on the outer lower portion of the arms and attached to the etch stop layer 155. The first anchor 171 and the second anchors 172a and 172b each have a shape of a rectangular box.

The support layer 170 is supported by the first anchor 171 in the center portion and is supported by both anchors (172a, 172b). The first anchor 171 is formed at a portion of the etch stop layer 155 where the drain pad of the first metal layer 135 is located. In the central portion of the first anchor 171, the first metal layer may be formed through the etch stop layer 155, the second passivation layer 150, the holes (not shown) of the second metal layer 145, and the first passivation layer 140. The via hole 270 is formed to the drain pad of the 135.

The actuator 210 is formed to have a mirror-shaped 'c' shape on the support layer 170. The actuator 210 includes a lower electrode 180 stacked on the support layer 170, a strain layer 190 formed on the lower electrode 180, and an upper electrode 200 formed on the strain layer 190. And an antireflective layer 205 stacked on the upper electrode 200.

The lower electrode 180 has a mirror-shaped 'c' shape spaced apart from the support line 174 by a predetermined distance, and is stepped toward the first anchor 171 inside one side of the lower electrode 180. The protrusions are formed corresponding to each other. The protrusions of the lower electrode 180 extend to the periphery of the via hole 270 formed in the first anchor 171, respectively. The via contact 280 is formed from the drain pad of the first metal layer 135 to the protrusions of the lower electrode 180 through the via hole 280 to electrically connect the drain pad and the lower electrode 180.

The two arms of the mirror-shaped 'c' shaped lower electrode 180 each have a shape of a rectangular flat plate. The strained layer 190 has the same shape as the lower electrode 180, but has a mirror-shaped 'c' shape having a small area. The upper electrode 200 has a mirror-shaped “c” shape of an area smaller than that of the deformation layer 190, and the antireflective layer 205 formed on the upper electrode 200 has the same shape and size as the upper electrode 200. Have

The first insulating layer 220 is formed from one side of the upper electrode 200 to one side of the support layer 170 through one side of the strained layer 190 and the lower electrode 180, and from the other side of the upper electrode 200. The second insulating layer 221 is formed to pass through the other side of the strained layer 190 and the lower electrode 180 to the other side of the support layer 170. In addition, a first upper electrode connecting member 230 is formed from one side of the upper electrode 200 to the common electrode line 240 through one side of the first insulating layer 220 and the support layer 170, and the upper electrode 201. The second upper electrode connecting member 231 is formed from the other side of the second electrode layer 221 to the common electrode line 240 through the second side of the second insulating layer 221 and the support layer 170. The second insulating layer 221 and the second upper electrode connecting member 231 are formed to be parallel to the first insulating layer 220 and the first upper electrode connecting member 230, respectively. The first and second upper electrode connection members 230 and 231 connect the upper electrode 201 and the common electrode line 240 to each other, and the first and second insulating layers 220 and 221 may be connected to the upper electrode 201. The lower electrodes 180 are connected to each other to prevent an electrical short circuit.

A post 250 for supporting the mirror 260 is formed at a central portion of the connection portion of the anti-reflective layer 205 having a mirror-shaped 'c' shape, ie, a portion spaced parallel to the support line 174. The mirror 260 is supported at the center portion by the post 250, and both sides thereof are formed horizontally on the actuator 210 via the second air gap 310. The mirror 260 reflects light incident from a light source (not shown) at a predetermined angle so that the image is projected onto the screen.

In the above-described thin film type optical path control apparatus according to the present invention, the first signal transmitted from the outside is connected to the transistor 120, the drain pad of the first metal layer 120, and the via contact 280 embedded in the active matrix 100. And a second signal (bias signal) is applied to the upper electrode 200 from the outside through the common electrode line 240 from the outside, and thus, between the upper electrode 200 and the lower electrode 180. An electric field is generated due to the potential difference. Due to this electric field, the deformation layer 190 formed between the upper electrode 200 and the lower electrode 180 causes deformation.

As the strained layer 190 contracts in a direction orthogonal to the electric field, the actuator 210 including the strained layer 190 is bent at a predetermined angle. The mirror 260 reflecting light incident from the light source is inclined together with the actuator 210 because the mirror 260 is supported by the post 250 and is formed on the actuator 210. Accordingly, the mirror 260 reflects incident light at a predetermined angle, and the reflected light passes through the slit to form an image on the screen.

Hereinafter, a method of manufacturing a thin film type optical path control device according to the present invention will be described in detail with reference to the accompanying drawings.

6A to 6E are diagrams for describing a method of manufacturing the apparatus shown in FIGS. 4 and 5. In Figs. 6A to 6E, the same reference numerals are used for the same members as Figs. 4 and 5.

Referring to FIG. 6A, first, a substrate 101, which is a silicon wafer doped with n-type, is prepared, and an active region and a field region are formed on the substrate 101 using a silicon partial oxidation method (LOCOS), which is a conventional device isolation process. A device isolation film 125 is formed to distinguish it. Subsequently, a gate 115 made of a conductive material such as polysilicon doped with impurities is formed on the active region, and then p ⁺ source 110 and drain 105 are formed by using an ion implantation process. M × N (M and N are natural numbers) P-MOS transistors 120 are formed on the substrate 101.

After forming an insulating layer made of an oxide on the upper part of the resultant transistor 120 is formed, openings are formed to expose the upper portion of the one side of the source 110 and the drain 105, respectively, using a photolithography method. Subsequently, after depositing the first metal layer 135 made of titanium, titanium nitride, tungsten, nitride, or the like on the resultant, the first metal layer 135 is patterned using a photolithography method. The patterned first metal layer 135 includes a drain pad extending from the drain 105 of the transistor 120 to the bottom of the first anchor 171 supporting the support layer 170.

The first passivation layer 140 is formed on the first metal layer 135 and the substrate 101. The first passivation layer 140 is formed to have a thickness of about 8000 인 by depositing silicate glass (PSG) by chemical vapor deposition (CVD). The first protective layer 140 prevents the substrate 101 in which the transistor 120 is embedded from being damaged due to a subsequent process.

The second metal layer 145 is formed on the first protective layer 140. The second metal layer 145 is formed by sputtering titanium to form a titanium layer having a thickness of about 300 μs, and then depositing titanium nitride on the titanium layer by physical vapor deposition (PVD) to obtain a thickness of about 1200 μs. It is completed by forming the titanium nitride layer which has. Since the light incident from the light source is incident not only to the mirror 260 but also to a portion other than the portion covered by the mirror 260, the light leakage current flows through the active matrix 100, causing the device to malfunction. To prevent it. Subsequently, a portion of the second metal layer 145 in which the via hole 270 is to be formed in a subsequent process, that is, a portion in which the drain pad of the first metal layer 135 is positioned is etched and then etched into the second metal layer 145. Not formed).

The second passivation layer 150 is stacked on the second metal layer 145. The second protective layer 150 is formed to have a thickness of about 2000 μs by depositing the silicate glass by chemical vapor deposition. The second protective layer 150 prevents the substrate 101 and the resulting products formed on the substrate 101 from being damaged during subsequent processing.

An etch stop layer 155 is stacked on the second passivation layer 150. The etch stop layer 155 prevents the results on the second passivation layer 150 and the active matrix 100 from being etched and damaged during the subsequent etching process. The etch stop layer 155 is made of low temperature oxide (LTO) such as silicon oxide or phosphorus pentoxide. The etch stop layer 155 is formed to have a thickness of about 0.2 to 0.8 μm at a temperature of about 350 to 450 ° C. using a low pressure chemical vapor deposition (LPCVD) method. Therefore, the active matrix 100 including the substrate 101, the first metal layer 135, the first protective layer 140, the second metal layer 145, the second protective layer 150, and the etch stop layer 155. Is completed.

The first sacrificial layer 160 is stacked on the etch stop layer 159. The first sacrificial layer 160 serves to facilitate stacking of the thin films constituting the actuator 210. The first sacrificial layer 160 is formed to have a thickness of about 2.0 to 3.0 μm by depositing polysilicon by low pressure chemical vapor deposition (LPCVD) at a temperature of about 500 ° C. or less. Subsequently, the surface of the first sacrificial layer 160 is polished using a chemical mechanical polishing (CMP) method to planarize the surface of the first sacrificial layer 160 to have a thickness of about 1.1 μm.

6B is a plan view illustrating a state in which the first sacrificial layer 160 is patterned. 6A and 6B, after applying and patterning a first photoresist (not shown) on the first sacrificial layer 160, the first sacrificial layer (using the first photoresist as a mask) The first anchor supporting the support layer 170 formed later by etching the portion of the second metal layer 145 formed below and the portions adjacent to both sides thereof by etching to expose a portion of the etch stop layer 155. 171 and the second anchors 172a and 172b are formed. Thus, the etch stop layer 155 is exposed in the shape of three squares spaced apart by a predetermined distance. Subsequently, the first photoresist is removed.

Referring to FIG. 6C, the first layer 169 is stacked on top of the etch stop layer 155 and the first sacrificial layer 160 exposed in a quadrangle as described above. The first layer 169 is formed to have a thickness of about 0.1 to 1.0 μm by depositing a hard material such as nitride by low pressure chemical vapor deposition (LPCVD).

The lower electrode layer 179 is stacked on top of the first layer 179. The lower electrode layer 179 is formed to have a thickness of about 0.1 to 1.0 μm by depositing a metal such as platinum, tantalum, or platinum-tantalum by a sputtering method or a chemical vapor deposition method. The lower electrode layer 179 is later applied with a first signal (image signal) from the outside and patterned into a lower electrode 180 having a mirror-shaped 'c' shape.

A second layer 189 made of a piezoelectric material such as PZT or PLZT is stacked on the lower electrode layer 179. Preferably, the second layer 189 is formed by spin coating PZT prepared by the sol-gel method to have a thickness of about 0.4 μm. Subsequently, the piezoelectric material constituting the second layer 189 is subjected to heat treatment by rapid thermal treatment (RTA) to cause phase shift. The second layer 189 is later patterned with a strained layer 190 which causes deformation by an electric field generated between the upper electrode 200 and the lower electrode 180.

The upper electrode layer 199 is stacked on top of the second layer 189. The upper electrode layer 179 is formed to have a thickness of about 0.1 to 1.0 μm by depositing a metal such as platinum, silver, tantalum or platinum-tantalum by a sputtering method or a chemical vapor deposition method. The upper electrode layer 199 is later patterned with an upper electrode 200 having a second signal applied thereto and having a mirror-shaped 'c' shape.

An antireflection film 204 is formed on the upper electrode layer 199. The antireflection film 204 has excellent adhesion to aluminum but poor reflectance to incident light, for example, a metal layer such as TiN / Ti or SiO _x N _y by sputtering or plasma enhanced chemical vapor deposition (PECVD). Deposition is carried out to have a thickness of about 0.1 to 0.5㎛. In addition, the anti-reflection film 204 may be formed using an anti-reflection layer coating used in a conventional optical system.

Referring to FIG. 6D, after coating and patterning a second photoresist (not shown) on the anti-reflection film 204, the anti-reflection film 204 and the upper electrode layer 199 are patterned using the mask as a mask. Each of the non-reflective layer 205 and the upper electrode 200 having a mirror-shaped 'c' shape is formed. At this time, the upper electrode 200 and the antireflection layer 205 are patterned to have the same area. Since the antireflective layer 205 covers the upper portion of the upper electrode 200, it is possible to prevent the light incident from the light source from being reflected at a portion other than the mirror 260.

Subsequently, after the second photoresist is removed, the second layer 189 is patterned in the same manner as the method for patterning the anti-reflection film 204 and the upper electrode layer 199, thereby having a larger area than the upper electrode 200. A strained layer 190 having a mirror-shaped 'c' shape is formed.

Subsequently, the lower electrode layer 179 is patterned by the same method as described above, and has a mirror-shaped 'c' shape for the support line 174 formed later, toward the first anchor 171 on one side. A lower electrode 180 having a protrusion formed in a step shape is formed. In this case, the lower electrode 180 has a larger area than the strained layer 190.

In addition, when the lower electrode layer 179 is patterned, the common electrode line 240 is formed simultaneously with the lower electrode 180 in a direction perpendicular to the lower electrode 180 on one side of the first layer 169. The common electrode line 240 is formed to be spaced apart from the lower electrode 180 by a predetermined distance on the support line 174 formed later. Accordingly, the actuator 210 including the upper electrode 200, the deformation layer 190, and the lower electrode 180, and the anti-reflective layer 205 is formed thereon is completed.

Subsequently, the first layer 169 is patterned to form a support element 175 comprising a support layer 170, a support line 174, a first anchor 171 and second anchors 172a and 172b. . At this time, both sides of the portion of the first layer 169 which contacts the etch stop layer 155 exposed in the three quadrangles are second anchors 172a and 172b, and the center portion of the first anchor 171 is do. Each of the first anchor 171 and the second anchors 172a and 172b has a rectangular box shape, and a hole of the second metal layer 145 and a hole of the first metal layer 135 are disposed below the first anchor 171. The drain pad is located. Accordingly, the first anchor 171 is formed below the lower electrode 180, and the second anchors 172a and 172b are formed below the outer electrode 180, respectively.

Subsequently, a third photoresist (not shown) is applied to the upper portion of the support element 175 and the upper portion of the actuator 210 and patterned to form a mirror image from the common electrode line 240 formed on the support line 174. One side and the other side of the '-' upper electrode 200 is exposed. At this time, the protrusions of the lower electrode 180 are also exposed together from the first anchor 171.

Subsequently, by depositing and patterning amorphous silicon or silicon oxide or phosphorus pentoxide, which is a low temperature oxide, on the exposed part, the support layer passes from one side of the upper electrode 200 to one side of the strain layer 190 and the lower electrode 180. The first insulating layer 220 is formed to one side of the 170, and at the same time, the second insulating layer 220 passes from the other side of the upper electrode 201 to the other side of the support layer 170 through the other side of the strained layer 191 and the lower electrode 180. The insulating layer 221 is formed. The first and second insulating layers 220 and 221 are formed to have a thickness of about 0.2 to 0.4 µm, and preferably about 0.3 µm, respectively, using low pressure chemical vapor deposition (LPCVD).

The first anchor 171, the etch stop layer 155, and the second anchor 171 are formed from the center of the first anchor 171, which is a portion where the hole of the second metal layer 145 and the drain pad of the first metal layer 135 are positioned. After etching the passivation layer 150 and the first passivation layer 140 to form a via hole 270 to the drain pad, the via contact is formed from the drain pad to the protrusions of the lower electrode 180 through the via hole 270. 280). At the same time, the first upper electrode connecting member 230 is formed from one side of the upper electrode 200 to the common electrode line 240 through one side of the first insulating layer 220 and the support layer 170, and the upper electrode ( The second upper electrode connecting member 231 is formed from the other side of the 201 through the second insulating layer 221 and the other side of the support layer 170 to the common electrode line 240.

The via contact 280 and the first and second upper electrode connecting members 230 and 231 are respectively deposited to have a thickness of about 0.1 to 0.2 μm using platinum or platinum-tantalum by sputtering or chemical vapor deposition. After the deposition, the deposited metal is formed by patterning. The first and second upper electrode connecting members 230 and 231 connect the upper electrode 200 and the common electrode line 240, respectively, and the lower electrode 180 is connected to the first metal layer 135 through the via contact 280. It is connected to the drain pad of.

Referring to FIG. 6E, a second sacrificial layer 300 is formed using Accuflow having excellent deposition flatness with a highly viscous fluid on top of actuator 210 and support element 175. This acuflow is applied to the upper part of the actuator 210 and the support element 175 by using a spin coating method, and thus the portion of the actuator 210 and the support element 175 on the active matrix 100 is formed and the rest thereof. The step can be easily overcome.

Subsequently, the second sacrificial layer 300 is patterned to form the mirror 260 and the post 250, so that the center portion of the connection portion of the mirror-shaped 'c' shaped antireflective layer 205 (that is, the support line ( 174) to form a post hole that exposes a portion formed in parallel. Next, a metal, such as aluminum (Al), having reflective properties is deposited on a portion of the exposed antireflective layer 205 and on the second sacrificial layer 300 by a sputtering method or a chemical vapor deposition method, and the deposited metal is deposited. By patterning, a mirror 260 having a shape of a square plate and a post 250 supporting the mirror 260 are simultaneously formed. After the second sacrificial layer 300 is removed by the plasma ashing method, the first sacrificial layer 160 is removed using xenon fluoride (XeF ₂ ) or bromine fluoride (BrF ₂ ), and cleaning and drying are performed. Performed to complete the TMA device as shown in FIG. As described above, when the second sacrificial layer 300 is removed, the second air gap 310 is formed at the position of the second sacrificial layer 300, and when the first sacrificial layer 160 is removed, the first sacrificial layer 160 is removed. The first air gap 165 is formed at the position of.

According to the thin film type optical path control apparatus and the manufacturing method thereof according to the present invention, by stacking the anti-reflection layer on the upper electrode, it is possible to prevent the incident light is reflected by the part of the upper electrode exposed between the mirror and the mirror. In addition, since the antireflection layer, the upper electrode, the deformation layer, and the lower electrode having the same shape are stacked, and the post is formed on the antireflection layer, the depth of the post hole is shortened to prevent sticking of the actuator generated during the post hole forming process. You can prevent it. Therefore, the light efficiency of incident light can be improved, and the point defect of the pixel resulting from sticking of an actuator can be prevented.

As described above, although described with reference to a preferred embodiment of the present invention, those skilled in the art will be modified in various ways without departing from the spirit and scope of the invention described in the claims below. And can be changed.

Claims (4)

An active matrix (100) with a MOS transistor (120) embedded therein and having a drain pad extending from the drain (105) of the transistor (120); Support means 175 formed on the active matrix 100 and including a support line 174, a support layer 170, a first anchor 171, and second anchors 172a and 172b; An actuator formed on the support layer 170 and including a lower electrode 180, a strain layer 190, and an upper electrode 200, each having a mirror-shaped 'c' shape with respect to the support line 174. 210; An antireflection layer 205 formed on the upper electrode 200; And Thin film type optical path control device, characterized in that it comprises a mirror (260) formed on top of the anti-reflective layer (205). The apparatus of claim 1, wherein the anti-reflective layer (205) is made of TiN / Ti or SiO _x N _y . Providing an active matrix having a drain pad embedded therein and extending from a drain of the transistor; Stacking a first layer, a lower electrode layer, a second layer, an upper electrode layer, and an anti-reflection film on the active matrix; Patterning the anti-reflection film to form an antireflection layer; Patterning the upper electrode layer, the second layer, and the lower electrode layer to form an actuator including an upper electrode, a deformation layer, and a lower electrode each having a mirror-shaped 'C' shape; Patterning the first layer to form support means including a support line, a support layer, a first anchor and a second anchor; And Method of manufacturing a thin film type optical path control device comprising the step of forming a mirror on top of the anti-reflective layer. The method of claim 3, wherein the antireflective layer is formed to a thickness of about 0.1 to 0.5 μm using a sputtering method or a plasma enhanced chemical vapor deposition (PECVD) method.