KR19990010334A - 3-electrode surface discharge plasma display panel and driving method thereof - Google Patents

Abstract

The present invention provides a substrate comprising: a front substrate and a rear substrate facing each other with a predetermined space therebetween; M + 1 partition walls arranged between the front substrate and the rear substrate to prevent inter-cell mixing and to secure a discharge space; M address electrodes formed one on the rear substrate between each of the barrier ribs; On the opposite side of the front substrate, the front substrate is arranged in parallel to each other so as to be orthogonal to the address electrodes, and one side and the other side of each of the center portions that correspond to different cells are disposed together with the M address electrodes. N + 1 sustain electrodes for dividing the entire screen into M × N cells; The dielectric layer is formed to have a thicker thickness on the other side than the one side of each of the sustain electrodes to discharge only between one side of the address electrode and the sustain electrode when an address pulse having a predetermined voltage is applied between the address electrode and the sustain electrode. The present invention relates to a three-electrode surface discharge plasma display panel and a method of driving the same, wherein one storage electrode is commonly used for two adjacent cells, so that the width of each storage electrode is wider than in the prior art, and thus there is no great difficulty in the manufacturing process. The manufacturing of the high resolution panel is easy, and since the number of the entire sustaining electrodes is reduced to almost 1/2 of the prior art, the manufacturing cost is greatly reduced.

Description

3-electrode surface discharge plasma display panel and driving method thereof

The present invention relates to a three-electrode surface discharge plasma display panel (hereinafter referred to as a three-electrode surface discharge PDP) and a driving method thereof, and in particular, gray scale according to the ADS subfield method (Addressing and Display System sub-field method). The present invention relates to a three-electrode surface discharge PDP and a driving method thereof.

As the modern society is called an information society, the importance of display increases with the development and spread of information processing system, and its types are gradually diversifying.

CRT (Cathode Ray Tube), which has been the most used display for a long time, has various problems such as large size, high operating voltage, and distortion of display. Recently, research and development of various flat displays having a matrix structure have been actively progressed since they are not suitable.

Among the flat panel displays, PDP (Plasma Display Panel) is in the spotlight as the next generation large screen flat panel display. The PDP is applied to a wall-mounted television, a home theater display, various monitors, etc. due to its large screen and thin thickness.

The most widely used PDP is a three-electrode surface discharge PDP. FIG. 1 shows an overall electrode structure diagram of a 16 × 12 resolution three-electrode surface discharge PDP according to the prior art, and FIG. A cross-sectional view of one cell of the discharge PDP is shown, and FIG. 3 is a cross-sectional view taken along line AA ′ of FIG. 2.

The conventional 16 × 12 resolution three-electrode surface discharge PDP has 12 first sustain electrodes Y _{1 to} Y ₁₂ and second sustain electrodes X ₁ arranged in parallel with each other alternately as shown in FIG. 1. ~X ₁₂₎ and the first sustain electrodes (Y ₁ ~Y ₁₂₎ and the second sustain electrodes (X ₁ ~X ₁₂₎ and two mutually parallel array 48 to be orthogonal to the address electrode across the predetermined space Cells are formed at each intersection of (A _{1 to} A ₄₈ ), and the entire screen is composed of 48 x 12 cells in a matrix form.

In the above, the first sustain electrodes Y ₁ to Y ₁₂ and the second sustain electrodes X ₁ to X ₁₂ are composed of a transparent electrode and a metal electrode, respectively, so as to actually between the corresponding first and second transparent electrodes of each cell. Surface discharge occurs, and the metal electrode prevents the voltage drop caused by the resistance of the transparent electrode.

The configuration of each cell of the three-electrode surface discharge PDP will be described by taking the cells of the second row and the second column shown in FIGS. 2 and 3 as an example.

First, the first sustain electrode (Y ₂ : Y ₂ ′, Y ₂ ″) and the second sustain electrode (X ₂ : X ₂ ′, X ₂ ″) are formed on one surface of the front substrate 51 which is the display surface of the image. They are arranged in parallel to each other, and discharge current is discharged on the first sustain electrode (Y ₂ : Y ₂ ′, Y ₂ ″) and the second sustain electrode (X ₂ : X ₂ ′, X ₂ ″). The first dielectric layer 52 is formed to have a uniform thickness to limit and facilitate the generation of wall charges, and the first sustain electrode Y ₂ may be formed from sputtering occurring during discharge on the first dielectric layer 52. _{Y 2 ', Y 2''} ) and the second sustain electrodes (X _2: is _{X 2', X 2 ''} ) and the magnesium oxide to protect the first dielectric layer (52), (MgO) protective film 53 is formed .

In the above description, the first sustain electrode Y ₂ and the second sustain electrode X ₂ are positioned at a predetermined position on the transparent electrodes Y ₂ ′, X ₂ ′, and the transparent electrodes Y ₂ ′, X ₂ ′, respectively. each metal electrode _{(Y 2 '', X 2} '') is formed is composed of.

Further, the address electrode A ₂ is formed on the opposite surface to the front substrate 51 among the back substrates 54 disposed in parallel with the front substrate 51 at a predetermined distance therebetween. ₂ ) a second dielectric layer 55 is formed on the discharge substrate to limit the discharge current and facilitate the generation of wall charges, and prevents inter-cell mixing and discharge space between the front substrate 51 and the rear substrate 54. First and second partitions 56a and 56b are formed to form an array, and phosphors 57 are coated on the second dielectric layer 55 and a part of the first and second partitions 56a and 56b. Discharge gas is injected into the space.

The basic driving principle of each cell of the three-electrode surface discharge PDP configured as described above is to discharge a discharge between the first sustain electrode Y ₂ and the address electrode A ₂ to form a wall charge on the first sustain electrode Y ₂ . Next, a continuous discharge is generated between the first sustain electrode Y ₂ and the second sustain electrode X ₂ to generate vacuum ultraviolet rays, and the ultraviolet rays excite the phosphor 57 to generate visible light.

On the other hand, the gray scale implementation of each cell of the three-electrode surface discharge PDP configured as described above is implemented through the number of discharges per unit time since the intensity of the discharge is difficult to adjust, and the number of discharges of each cell is 0 to 0 in every frame. When the discharge is divided into 2 ^X -1 cycles, the brightness of each cell changes according to the number of discharges during one frame, so that the entire screen has a 2 ^X grayscale image, that is, one level of 0 to 2 ^X -1 levels for each cell. The image is displayed.

One of the gradation implementation methods based on the above concept is the ADS subfield method, in which each cell operates in two states of on and off and implements 2 ^X gradations. By using a binary X bit system based on the above, one frame is divided and driven into X subfields having different discharge counts (ie, discharge sustain periods).

Next, the display process of the grayscale image according to one of the general ADS subfield methods will be described in more detail.

4 is a detailed configuration diagram of one frame when implementing 256 (2 ⁸ ) gray scale according to a general ADS subfield method, and FIG. 5 is a 16 × 12 resolution three electrode shown in FIG. 1 according to a driving method of the related art. A timing diagram of some driving voltage waveforms applied to each electrode of the surface discharge plasma display panel is shown.

First, one frame is dividedly driven into eight subfields SF1 to SF8 as shown in FIG. 4 to implement 2 ⁸ gray scales, and each subfield SF1 to SF8 has a reset period, an address period, and a discharge sustain period. Is divided into driving.

In the reset period of each of the subfields SF1 to SF8, 0 V is applied to all the address electrodes A _{1 to} A ₄₈ and the first sustain electrodes Y ₁ to Y ₁₂ , as shown in FIG. 5. In the state, a writing pulse of the voltage V _{W is} applied to all of the second sustain electrodes X ₁ to X ₁₂ , so that the entire first sustain electrodes Y ₁ to Y ₁₂ and the second sustain electrodes X are _{1 to} X ₁₂ ) causes a write discharge to cause wall charges to be generated inside the entire cell.

Thereafter, 0 V is continuously applied to the entire address electrodes A _{1 to} A ₄₈ and the first sustain electrodes Y ₁ to Y ₁₂ for a predetermined time, and at the same time, the entire second sustain electrodes X ₁ to X _{12 are applied} . 0V is applied to the internal wall charges of the entire cells generated by the write discharges so that they are self-erased.

In the address period of each subfield SF1 to SF8, a scan pulse of -V _S is sequentially applied to one of the _twelve first sustain electrodes Y _{1 to} Y ₁₂ , and a digital image corresponding to each cell is applied. A _first sustain electrode to which the V _S + V _A voltage is applied by selectively applying an image pulse of V _A voltage synchronized with the scan pulse to all address electrodes A _{1 to} A ₄₈ according to the signal; By causing the address discharge to occur between the address electrodes, the corresponding cell in which the address discharge has occurred is turned on to generate wall charges therein.

In the discharge sustain period of each of the subfields SF1 to SF8, the voltage V _A1 is applied to all the address electrodes A _{1 to} A ₄₈ , and the first and second sustain electrodes Y ₁ to Y ₁₂ and the second sustain electrode are applied. In a state in which 0 V is applied to the fields X ₁ to X ₁₂ , the first and second sustain electrodes Y ₁ to Y ₁₂ and the second sustain electrodes X ₁ to X ₁₂ are alternately disposed with a phase difference of 180 °. Sustain pulses of the voltage V _S are respectively applied to maintain discharge and light emission of the cells turned on in the immediately preceding address period.

The application of the voltage V _A1 to the entire address electrodes A _{1 to} A ₄₈ during the discharge sustain period is performed by the address electrodes A _{1 to} A ₄₈ , the first sustain electrodes Y ₁ to Y ₁₂ , and the second voltage. This is to prevent the discharge from occurring between the sustain electrodes X ₁ to X ₁₂ .

The voltage pulses V _W , V _F (discharge starting voltage), V _S , V _A , and V _A1 applied to the electrodes are V _W V _F V _S and V _A V _A1 and V _A + V _S V _{F, respectively.} Set to voltage values satisfying.

Further, an image pulse applied to the address electrodes A _{1 to} A ₄₈ during the address period of each subfield SF1 to SF8 is an 8-bit digital image signal (lowest bit B ₁ to highest bit B corresponding to each cell). ₈ ) corresponds to one bit value, more specifically, B ₁ during the address period of the first subfield SF1, B ₂ during the address period of the second subfield SF2,. The eighth sub-address period B ₈ for the field (SF8) is applied, respectively.

In addition, the number of sustain pulses applied to each of sub-fields (SF1~SF8) the entire first sustain electrode during the discharge sustain period (Y ₁ ~Y ₁₂₎ and the the second sustain electrode (X ₁ ~X ₁₂₎ is usually SF1 : SF2: SF3: SF4: SF5: SF6: SF7: SF8 = 1: 2: 4: 8: 16: 32: 64: 128 is set to enable 256 gray scale implementation.

As a result, when the first to eighth subfield SF1 to SF8 screens are sequentially configured during the one frame driving time through the detailed process described above, 256 grayscale images of one frame are displayed on the three-electrode surface discharge PDP.

However, as shown in FIG. 1, since the three-electrode surface discharge PDP according to the prior art requires two sustain electrodes for each cell configuration, the pixels-R (Red), G in a state where the panel size is defined (Green), B (Blue) It consists of 3 cells-As the number increases, the width of the sustain electrode (transparent electrode) decreases, which leads to a big difficulty in the manufacturing process, which makes it difficult to manufacture high resolution panels. .

The present invention has been made to solve the above problems, a three-electrode surface discharge in which one sustain electrode is commonly used in two adjacent cells, the width of each sustain electrode is wider, the number of total sustain electrodes is greatly reduced The purpose is to provide a PDP.

In addition, an object of the present invention is to provide a method of driving a three-electrode surface discharge PDP that enables accurate gray scale implementation as in the prior art on a three-electrode surface discharge PDP in which one sustain electrode is commonly used for two adjacent cells. There is this.

1 is an overall electrode structure diagram of a 16 x 12 resolution three-electrode surface discharge plasma display panel (hereinafter referred to as a three-electrode surface discharge PDP) according to the prior art;

2 is a cross-sectional view of one cell of a three-electrode surface discharge PDP according to the prior art,

3 is a cross-sectional view taken along line AA ′ of FIG. 2;

4 is a detailed configuration diagram of one frame when implementing 256 gray scales according to a general ADS subfield method;

FIG. 5 is a timing diagram of some driving voltage waveforms applied to each electrode of the three-electrode surface discharge PDP shown in FIG. 1 according to a conventional driving method;

6 is an overall electrode structure diagram of a 16 × 12 resolution three-electrode surface discharge PDP according to an embodiment of the present invention;

7 is a cross-sectional view of two adjacent cells of a three-electrode surface discharge PDP according to an embodiment of the present invention;

8 is a cross-sectional view taken along the line B-B 'shown in FIG.

9 is a view showing that the first dielectric layer of each cell shown in FIG. 7 is formed in a different shape;

10 is a timing diagram of some driving voltage waveforms applied to each electrode of the three-electrode surface discharge PDP shown in FIG. 6 according to the driving method of the present invention;

Explanation of symbols for main parts of the drawings

S _{1 to} S ₁₃ : sustain electrode A _{1 to} A ₄₈ : address electrode

11: front substrate 12: dielectric layer

14: back substrate 16a, 16b: partition wall

In order to achieve the above object, the three-electrode surface discharge PDP according to the present invention comprises: a front substrate and a rear substrate facing each other with a predetermined space therebetween; M + 1 partition walls arranged between the front substrate and the rear substrate to prevent inter-cell mixing and to secure a discharge space; M address electrodes formed one on the rear substrate between each of the barrier ribs; On the opposite side of the front substrate, the front substrate is arranged in parallel to each other so as to be orthogonal to the address electrodes, and one side and the other side of each of the center portions that correspond to different cells are disposed together with the M address electrodes. N + 1 sustain electrodes for dividing the entire screen into M × N cells; The dielectric layer is formed to have a thicker thickness on the other side than the one side of each of the sustain electrodes to discharge only between one side of the address electrode and the sustain electrode when an address pulse having a predetermined voltage is applied between the address electrode and the sustain electrode. It is characterized by.

Each sustain electrode is composed of a transparent electrode formed on the front substrate and a metal electrode formed on a central portion of the transparent electrode to prevent a voltage drop caused by the resistance of the transparent electrode.

In addition, the driving method of the three-electrode surface discharge PDP according to the present invention includes the M address electrodes arranged in parallel with each other and the N + 1 sustain electrodes arranged in parallel with each other so as to be orthogonal to the address electrodes. A three-electrode surface composed of x N cells, each having one side and the other side bounded by a central portion of each of the sustain electrodes in a different cell, and having a thicker dielectric layer formed on the other side than one side of each of the sustain electrodes. In the method of driving a discharge plasma display panel, a voltage of -V2 is selectively applied to the M address electrodes while a scan pulse of + V1 voltage is sequentially applied to even-numbered sustain electrodes of the N + 1 sustain electrodes. By applying an image pulse of the cell to the cell to which the scan pulse and the image pulse is applied at the same time (on) to generate a wall charge therein A first step and an image pulse of + V2 are selectively applied to the M address electrodes while sequentially applying a scan pulse of −V1 to the other odd sustain electrodes except for the first sustain electrode after the first step. A second step in which a cell to which the scan pulse and the image pulse are simultaneously applied is turned on to generate wall charges of opposite polarity to the wall charges generated in the first step, and retains the first after the second step. A sustain pulse of + V3 voltage having a phase difference between the odd-numbered sustain electrodes and the even-numbered sustain electrodes so that a voltage having the same polarity as the wall charges generated at the remaining sustain electrodes except for the electrodes is applied to the corresponding sustain electrodes, respectively. and a third step of maintaining discharge and light emission of all the cells turned on in the first and second steps by applying a sustain pulse, respectively. It is characterized by.

The voltage V1, V2 and V3 are set to values satisfying V1 = V3 and V1 + V2 V4 and V4 V3 (where V4 is the discharge start voltage),

In the third step, the sustain pulses applied to the odd-numbered sustain electrodes and the even-numbered sustain electrodes are 180 ° out of phase with each other.

Before the first step, a wall pulse is generated inside the entire cell by applying a writing pulse of a voltage V5 greater than the discharge start voltage between all odd-numbered sustain electrodes and all even-numbered sustain electrodes. It is preferred to further comprise the step of applying a 0V for a time to cause the internal wall charges of the entire cell to self erase.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 6 shows a structure diagram of an entire electrode of a 16 × 12 resolution three-electrode surface discharge PDP according to an embodiment of the present invention, and FIG. 7 shows two adjacent cells of a three-electrode surface discharge PDP according to an embodiment of the present invention. A cross sectional view of FIG. 8 is shown, and FIG. 8 is a cross sectional view along the line B-B 'shown in FIG.

The 16 × 12-resolution three-electrode surface discharge PDP is a two mutually parallel array 13 as shown in Figure 6 keep the electrodes (S ₁ ~S ₁₃₎ and the sustain electrode according to an embodiment of the present invention ₍₁ S ~S ₁₃₎ and has a full-screen consists of 48 × 12 gae cell in matrix form, by mutual parallel to address electrodes arranged in ₄₈ (a ₁ ~A 48) so as to be perpendicular across the predetermined space.

That is, the sustain electrode 13 (S ₁ ~S ₁₃₎ of the remaining sustain electrodes other than the first sustain electrodes (S ₁₎ of the upper part of the broken line _{(S 2 ~S 13) (S} 2-1 ~S 13-1) Corresponding to the second storage electrodes of the prior art, the lower portions S _{1-2 to} S _12-2 of the remaining storage electrodes S ₁ to S ₁₂ except for the _thirteenth sustain electrode S ₁₃ are Corresponds to the first sustain electrodes of the prior art.

That is, the storage electrodes S ₁ to S ₁₃ have to be wider than the first or second storage electrodes of the prior art because one storage electrode must be commonly used for two cells, unlike the prior art.

In addition, each of the sustain electrodes S _{1 to} S ₁₃ is composed of a transparent electrode and a metal electrode, so that surface discharge is actually generated between the transparent electrodes, and the metal electrode prevents a voltage drop due to the resistance of the transparent electrode.

The configuration of each cell of the three-electrode surface discharge PDP will be described with reference to two cells of the second, third, fourth and second columns shown in FIGS. 7 and 8 as an example.

First, the second sustain electrode _{(S 2: S 2 ',} S 2'') and the third holding electrode _{(S 3: S 3',} S 3 '') and the fourth holding electrode (S _4: S ₄ ', S ₄ ″) are arranged on one surface of the front substrate 11, which is the display surface of the image, in parallel with each other, and the discharge current is restricted and discharged on the sustain electrodes S ₂ , S ₃ , and S ₄ . The first dielectric layer 12 which facilitates the generation of electric charges is formed to have a thicker thickness on the other side than one side bordering the central portion of each of the sustain electrodes S ₂ , S ₃ , and S ₄ . A magnesium oxide protective film 13 is formed on the dielectric layer 12 to protect the sustain electrodes S ₂ , S ₃ , and S ₄ and the first dielectric layer 12 from sputtering occurring during discharge.

The sustain electrodes S ₂ , S ₃ , and S ₄ are transparent electrodes S ₂ ′, S ₃ ′, and S ₄ ′, and the transparent electrodes S ₂ ′, S ₃ ′, and S ₄ ′, respectively. ) metal electrode _{(S 2 '', S 3} '', respectively, formed on the center of the is composed of S ₄ '').

Further, a second address electrode A ₂ is formed on the opposite surface to the front substrate 11 among the back substrates 14 positioned in parallel with the front substrate 11 at a predetermined distance therebetween, and the address electrode A _second dielectric layer 15 is formed on (A ₂ ) to limit the discharge current during discharge and to facilitate the generation of wall charges, and to prevent inter-cell mixing between the front substrate 11 and the rear substrate 14. First and second partitions 16a and 16b are disposed to secure a discharge space, and phosphors 17 are coated on the second dielectric layer 15 and a part of the first and second partitions 16a and 16b. The discharge gas is injected into the discharge space.

Therefore, in FIG. 6, the upper portions S _{1-1 to} S _13-1 of the dotted lines of the sustain electrodes S _{1 to} S ₁₃ are thinner than the lower portions S _{1-2 to} S _13-2 . One dielectric layer 12 is formed.

Here, each of the sustain electrodes (S ₁ ~S ₁₃₎ which is different to the thickness of the first dielectric layer 12 formed on the other sustain electrode, except for the first sustain electrodes _{(S 1) (S 2 ~S} 13) The remaining portions except for the 13th sustain electrode S ₁₃ while the upper portion S _2-1 , S _3-1 ,..., S _13-1 of the dotted line cause the address discharge together with the address electrodes A _{1 to} A ₄₈ . To prevent discharge from occurring between the lower portions S _1-2 , S _2-2 ,..., S _{12-1 of the} sustain electrodes S ₁ to S ₁₂ and the address electrodes A _{1 to} A ₄₈ . to be.

In addition, the first dielectric layer 12 may have a cross-sectional shape of a portion formed thicker than other portions of the first dielectric layer 12 having a triangle shown in FIG. 7, an ellipse shown in FIG. 9, or other shapes.

The basic driving principle of each cell of the three-electrode surface discharge PDP according to the embodiment of the present invention configured as described above will be described with reference to the cell A shown in FIG. 7 as an example.

First, the second dielectric layer 12 is thin is a transparent electrode (S ₄ ') + voltage to the address electrode (A ₂₎ to - When a voltage is applied to the transparent electrodes (S _4' that is formed in order to turn on the A cell) Address discharge occurs between the address electrode A ₂ and the wall charge on the side of the transparent electrode S ₄ ′ in which the first dielectric layer 12 has a thin thickness, and the wall charge is positive on the address electrode A ₂ side. Each is generated.

Thereafter, in order to indicate the on state of the A cell, a voltage is applied to the transparent electrode S ₄ ′ in which the wall charges are generated, to be added to the voltage of the wall charges, and to the remaining transparent electrodes S ₃ ′. A positive voltage is applied to cause the sustain discharge to occur between the two transparent electrodes S ₃ ′ and S ₄ ′.

When a sustain discharge occurs in the discharge space of the cell A, an electric field is generated in the discharge space to accelerate the trace electrons in the discharge gas, and when the accelerated electrons collide with the neutral particles of the discharge gas, the neutral particles are converted into electrons and ions. When the ionized electrons are also accelerated by the electric field and participate in collisions with the neutral particles, the neutral particles are ionized to electrons and ions at a rapid rate so that the discharge gas becomes a plasma and vacuum ultraviolet rays are generated. do.

The generated vacuum ultraviolet rays excite the phosphor 17 to generate visible light, and the visible light is emitted to the outside through the front substrate 11, thereby enabling image recognition from the outside.

However, after an address discharge occurs in the discharge space of the cell A, a voltage is applied to the transparent electrode S ₄ ′ where wall charges are generated, instead of a voltage, and a voltage is applied to the remaining transparent electrode S ₃ ′. When voltage is applied, sustain discharge does not occur between the two transparent electrodes S ₃ ′ and S ₄ ′, and thus the ON state of the A cell is not displayed.

On the other hand, if the 16 x 12 resolution three-electrode surface discharge PDP according to the method described in the prior art according to the embodiment of the present invention in which each cell is driven on the same principle, a problem occurs.

For example, when all the cells are turned on, all the address electrodes are sequentially applied with scan pulses of the voltage-V _S to the sustain electrodes S ₂ to S ₁₃ located in the second to thirteenth positions during the address period of each subfield. When an image pulse having a voltage of + V _A is applied to (A _{1 to} A ₄₈ ), an address discharge occurs in the discharge space of all cells, and the upper part of the dotted line S ₂ of the _second to _thirteenth sustain electrodes S ₂ to S ₁₃ . + Wall charges are generated on the side of _-1 to S _13-1 ) and-wall charges are generated to the address electrodes A _{1 to} A ₄₈ , respectively.

Subsequently, the odd-numbered sustain electrodes S ₁ , S ₃ , S ₅ ,..., S ₁₃ are supplied with even-numbered sustain electrodes S ₂ , to maintain the ON state of each cell. When + voltage (V _S voltage) is applied to S ₄ , S ₆ ,..., S ₁₂ , the even-numbered sustain electrodes S ₂ , S to which + wall charges are generated by the previous address discharge and to which + voltage is applied are applied. _4, S _6, ..., the sustain discharge occurs only within the cells containing the upper part of dotted line _{(S 2-1, S 4- 1,} S 6-1, ..., S 12-1) in S _12), previously generated The upper dotted line (S _3-1 , S _5- ) of the odd-numbered sustain electrodes S ₃ , S ₅ ,..., S ₁₃ , and the first sustain electrode S ₁ to which voltages of opposite polarities are applied. Sustain discharge does not occur inside the cells including ₁ ,..., S _13-1 ).

Subsequently, the odd-numbered sustain electrodes S ₁ , S ₃ , S ₅ ,..., And S ₁₃ have positive voltages and the even-numbered sustain electrodes S ₂ , S ₄ , S ₆ ,. ₁₂ ) When-voltage is applied, voltages having the same polarity as that of the wall charges already generated are applied to the upper portions S _{1-1 to} S _13-1 of the dotted lines of the entire sustaining electrodes S ₁ to S ₁₃ . As a result, sustain discharge occurs in the discharge space of the entire cell.

That is, when the first sustain pulse is applied in the discharge sustain period of each subfield, there is a cell in which sustain discharge does not occur, and thus there is a problem in that accurate gradation is not realized as in the prior art.

Thus, one embodiment of a three-electrode surface discharge PDP driving method according to the present invention, the sustain electrode to each of the sustain electrodes (S ₁ ~S ₁₃₎ in the even-numbered _{(S 2, S 4, S} 6, ..., S ₁₂ ) and the odd-numbered sustain electrodes S ₁ , S ₃ , S ₅ ,..., S ₁₃ , and the even-numbered sustain electrodes S ₂ , S ₄ , S ₆ ,..., S in the first address period. ₁₂ ) only the odd-numbered sustain electrodes S ₃ , S ₅ ,..., And S ₁₃ are sequentially scanned except the first sustain electrode S _{1 in} the second address period, so that the even-numbered sustain electrodes S ₂ ,. S ₄ , S ₆ ,..., S ₁₂ ) cells containing the upper dotted lines (S _2-1 , S _4-1 , S _6-1 ,…, S _12-1 ) and the other cells of opposite polarity The wall charges are generated so that even-numbered sustain electrodes S ₂ , S ₄ , S ₆ ,..., S ₁₂ and odd-numbered sustain electrodes S ₁ , S ₃ , S ₅ ,... full each time the sustain pulse is applied alternately to the S ₁₃₎ Inside the discharge space so that the correct gray scale 6 is implemented in a three-electrode surface discharge PDP according to an embodiment of the present invention shown by the sustain discharge to occur.

FIG. 10 is a partial timing diagram of driving voltage waveforms applied to each electrode of the 16 × 12 resolution three-electrode surface discharge PDP shown in FIG. 6 according to a driving method according to an exemplary embodiment of the present invention.

First, during the reset period of each subfield, as shown in FIG. 10, odd-numbered sustain electrodes are applied with 0 V applied to all the address electrodes A _{1 to} A ₄₈ and the sustain electrodes S ₁ to S ₁₃ . By applying a write pulse of the voltage V _W to (S ₁ , S ₃ , S ₅ ,..., S ₁₃ ), wall charges are generated inside the discharge space of the entire cell, and then all the address electrodes A ₁ to A for a predetermined time. A ₄₈ ) and 0 V are applied to the sustain electrodes S ₁ to S ₁₃ so that the internal wall charges of the entire cell are self erased.

Thereafter, in the first address period, scan pulses of + V _S are sequentially applied to the even-numbered sustain electrodes S ₂ , S ₄ , S ₆ ,..., S ₁₂ according to the digital image signal corresponding to each cell. At the same time, an image pulse having a voltage of -V _A synchronized with the scan pulse is selectively applied to all the address electrodes A _{1 to} A ₄₈ to simultaneously apply the scan pulse and the image pulse, that is, the voltage V _S + V _A. By causing the address discharge to occur between the applied sustain electrode and the address electrode, the corresponding cell on which the address discharge has occurred is turned on to generate wall charge therein,

Claim the second address period of the odd-numbered sustain excluding the first sustain electrodes (S ₁₎ in accordance with the digital image signal corresponding to each cell electrode _{(S 3, S 5, ...} , S 13) successively one by one on-the V _S The sustain electrode and the address electrode to which the V _S + V _A voltage is applied by selectively applying the image pulse of the + V _A voltage synchronized with the scan pulse to the entire address electrodes A _{1 to} A ₄₈ while applying the scan pulse. By causing the address discharge therebetween, the corresponding cell in which the address discharge has occurred is turned on to generate wall charges of opposite polarity to the wall charge generated in the first address period therein.

At this time, the address discharge of each cell and more particularly even-numbered sustain electrode in the upper part of the broken line _{(S 2, S 4, S} 6, ..., S 12) (S 2-1, S 4-1, S 6-1 ,..., S _12-1 and the dotted upper portions S _3-1 and S _5- between the address electrodes A _{1 to} A ₄₈ or odd-numbered sustain electrodes S ₃ , S ₅ ,..., S ₁₃ . ₁ ,..., S _13-1 ) and address electrodes A _{1 to} A ₄₈ .

In addition, the upper part of the dotted lines S _2-1 , S _4-1 , and S _{6-1 of the} even-numbered sustain electrodes S ₂ , S ₄ , S ₆ ,..., S ₁₂ after the first and second address periods. , ..., s _12-1) has - a wall charge, the odd-numbered sustain electrodes _{(s 3, s 5, ...} , s 13) upper part of dotted line (s _3-1, s _5-1, a ..., s _13- Positive wall charges are generated in ₁ ), and wall charges of opposite polarities are generated in the address electrodes A _{1 to} A ₄₈ , respectively.

Thereafter, in the discharge sustain period, the + V _A1 voltage is applied to all the address electrodes A _{1 to} A ₄₈ , and the odd-numbered sustain electrode is applied with 0 V to all the sustain electrodes S ₁ to S ₁₃ . the _{(s 1, s 3, s} 5, ..., s 13) and even the second sustain electrode + which alternately have a phase difference of 180 ° from each other in the _{(s 2, s 4, s} 6, ..., s 12) V s Sustain pulses of voltage are respectively applied to maintain the discharge and light emission of all the cells turned on in the immediately preceding address period.

At this time, the voltage having the same polarity as the wall charge generated in the upper portions S _{2-1 to} S _13-1 of the dotted lines of the remaining storage electrodes S ₂ to S ₁₃ except for the first sustain electrode S ₁ is corresponding. The phases of the sustain pulses applied to the odd sustain electrodes S ₁ , S ₃ , S ₅ ,..., S ₁₃ are applied to the even sustain electrodes S ₂ , S ₄ , S ₆ ,. S ₁₂ ) is set faster than the sustain pulse applied.

In addition, applying the voltage + V _A1 to all the address electrodes A _{1 to} A ₄₈ during the discharge sustain period discharges between the address electrodes A _{1 to} A ₄₈ and the sustain electrodes S ₁ to S ₁₃ . This is to prevent this from happening.

As described above, a positive voltage (+ V _S voltage) is applied to all odd-numbered sustain electrodes S ₁ , S ₃ , S ₅ ,..., S ₁₃ , and the even-numbered sustain electrodes S ₂ , S ₄ , S ₆ , ..., when the voltage (0V) is respectively applied to S ₁₂ , that is, the upper part of the dotted line (S _{2-1 to} S _13- ) of the remaining storage electrodes S ₂ to S ₁₃ except for the first sustaining electrode S ₁ . _When a voltage having the same polarity as the wall charges generated in ₁ ) is applied to the corresponding storage electrodes, the voltages applied to the respective storage electrodes S _{2 to} S ₁₃ and the voltages of the wall charges already generated are added to each other. Sustain discharge can occur within the discharge space, thereby enabling accurate gray scale implementation.

In addition, the voltage pulses V _W , V _F (discharge start voltage), V _S , V _A , and V _A1 applied to each electrode are V _W V _F V _S and V _A V _A1 and V _A , respectively, as in the prior art. Set to voltage values satisfying + V _S V _F.

In addition, an image pulse applied to the address electrodes A _{1 to} A ₄₈ during the first and second address periods is also one of the eight bit digital image signals (least significant bit B ₁ to most significant bit B ₈ ) corresponding to each cell. The number of sustain pulses corresponding to the number of bits and applied to all the sustain electrodes S ₁ to S ₁₃ during the discharge sustain period also depend on the gray scale to be implemented: 1: 2: 4: 8: 16: 32: 64: 128... Set the ratio to.

As described above, since the three-electrode surface discharge PDP according to the present invention has one storage electrode commonly used in two adjacent cells, the width of each storage electrode is wider than in the prior art, and thus there is no great difficulty in the manufacturing process. It becomes easier, and since the number of total holding electrodes is reduced by almost 1/2 compared with the prior art, there is an effect that the manufacturing cost is greatly reduced.

Claims (6)

A front substrate and a rear substrate opposed to each other with a predetermined space therebetween; M + 1 partition walls arranged between the front substrate and the rear substrate to prevent inter-cell mixing and to secure a discharge space; M address electrodes formed one on the rear substrate between each of the barrier ribs; On the opposite side of the front substrate, the front substrate is arranged in parallel to each other so as to be orthogonal to the address electrodes, and one side and the other side of each of the center portions that correspond to different cells are disposed together with the M address electrodes. N + 1 sustain electrodes for dividing the entire screen into M × N cells; The dielectric layer is formed to have a thicker thickness on the other side than the one side of each of the sustain electrodes to discharge only between one side of the address electrode and the sustain electrode when an address pulse having a predetermined voltage is applied between the address electrode and the sustain electrode. A three-electrode surface discharge plasma display panel, characterized in that. 3. The three-electrode of claim 1, wherein each of the sustain electrodes comprises a transparent electrode formed on the front substrate and a metal electrode formed on a central portion of the transparent electrode to prevent a voltage drop caused by the resistance of the transparent electrode. Surface discharge plasma display panel. The entire screen is composed of M × N cells by M address electrodes arranged in parallel with each other and N + 1 sustain electrodes arranged in parallel with each other so as to be orthogonal to the address electrodes, and the center portion of each of the sustain electrodes is bounded. In the method of driving a three-electrode surface discharge plasma display panel, one side and the other side are included in different cells, and a dielectric layer having a thicker thickness is formed on the other side than one side of each of the sustain electrodes. The scan pulse and the image are selectively applied to the M address electrodes by applying a scan pulse of + V1 voltage to the even-numbered sustain electrodes sequentially. A first step of causing a cell to which pulses are applied simultaneously to generate wall charge therein; and a first sustain electrode after the first step. Cells to which the scan pulse and the image pulse are simultaneously applied are applied by selectively applying the image pulses of the voltage + V2 to the M address electrodes while applying the scan pulses of the voltage V1 sequentially to the remaining odd-numbered sustain electrodes. A second step in which a wall charge having a polarity opposite to the wall charge generated in the first step is generated therein, and the same polarity as the wall charge generated in the remaining storage electrodes except for the first storage electrode after the second step; In the first and second steps, sustain pulses having a voltage of + V3 are applied to the odd sustain electrodes and the even sustain electrodes to be applied to the corresponding sustain electrodes, respectively. A three-electrode surface discharge plasma display comprising a third step of maintaining discharge and light emission of all on cells. The driving method of the panel. The method of claim 1, wherein the voltages V1, V2, and V3 are set to values satisfying V1 = V3, V1 + V2, V4, and V4 V3. , V4 is the discharge start voltage). 4. The driving of a three-electrode surface discharge plasma display panel according to claim 3, wherein the sustain pulses applied to the odd-numbered sustain electrodes and the even-numbered sustain electrodes in the third step have a phase difference of 180 degrees. Way. 4. The method of claim 3, wherein a writing pulse of a V5 voltage greater than the discharge start voltage is applied between the entire odd-numbered sustain electrodes and the even-numbered sustain electrodes before the first step, so that the wall charges inside the entire cell. And generating 0V for a predetermined time so that internal wall charges of the entire cells are self- erased.