KR19980079862A - 금속 상호접속 복합재 - Google Patents

금속 상호접속 복합재 Download PDF

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Publication number
KR19980079862A
KR19980079862A KR1019980007021A KR19980007021A KR19980079862A KR 19980079862 A KR19980079862 A KR 19980079862A KR 1019980007021 A KR1019980007021 A KR 1019980007021A KR 19980007021 A KR19980007021 A KR 19980007021A KR 19980079862 A KR19980079862 A KR 19980079862A
Authority
KR
South Korea
Prior art keywords
porous
porous material
metal
conductive
metal interconnect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1019980007021A
Other languages
English (en)
Korean (ko)
Inventor
지. 미올라 카민
디. 존슨 다니엘
알. 뱅크스 도날드
지. 아민 조셉
Original Assignee
존 에스 캠벨
더블유.엘. 고어 앤드 어소시에이츠
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 존 에스 캠벨, 더블유.엘. 고어 앤드 어소시에이츠 filed Critical 존 에스 캠벨
Publication of KR19980079862A publication Critical patent/KR19980079862A/ko
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/145—Organic substrates, e.g. plastic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0104—Properties and characteristics in general
    • H05K2201/0116—Porous, e.g. foam
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/015—Fluoropolymer, e.g. polytetrafluoroethylene [PTFE]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09945—Universal aspects, e.g. universal inner layers or via grid, or anisotropic interposer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10378—Interposers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00—Stock material or miscellaneous articles
    • Y10S428/901—Printed circuit
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24826—Spot bonds connect components
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/249921—Web or sheet containing structurally defined element or component
    • Y10T428/249953—Composite having voids in a component [e.g., porous, cellular, etc.]
    • Y10T428/249955—Void-containing component partially impregnated with adjacent component
    • Y10T428/249958—Void-containing component is synthetic resin or natural rubbers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/31504—Composite [nonstructural laminate]
    • Y10T428/3154—Of fluorinated addition polymer from unsaturated monomers
    • Y10T428/31544—Addition polymer is perhalogenated

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Laminated Bodies (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Combinations Of Printed Boards (AREA)
  • Conductive Materials (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Chemically Coating (AREA)
KR1019980007021A 1997-03-04 1998-03-04 금속 상호접속 복합재 Ceased KR19980079862A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US8/810,846 1997-03-04
US08/810,846 US5910354A (en) 1997-03-04 1997-03-04 Metallurgical interconnect composite

Publications (1)

Publication Number Publication Date
KR19980079862A true KR19980079862A (ko) 1998-11-25

Family

ID=25204858

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019980007021A Ceased KR19980079862A (ko) 1997-03-04 1998-03-04 금속 상호접속 복합재

Country Status (4)

Country Link
US (1) US5910354A (enExample)
EP (1) EP0863550A3 (enExample)
JP (1) JPH1125755A (enExample)
KR (1) KR19980079862A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100980353B1 (ko) * 2003-11-19 2010-09-07 유니버시티 오브 플로리다 리서치 파운데이션, 아이엔씨. 다공성 기판상에 패턴화된 전극을 접촉시키는 방법 및 이에의한 소자

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW322613B (en) * 1997-03-10 1997-12-11 guang-long Lin Continuous method of implementing solder bump on semiconductor wafer electrode
US6372624B1 (en) 1997-08-04 2002-04-16 Micron Technology, Inc. Method for fabricating solder bumps by wave soldering
US6906423B1 (en) 2001-06-05 2005-06-14 Kabushiki Kaisha Toshiba Mask used for exposing a porous substrate
EP1265468B1 (en) 2001-06-05 2011-12-28 Kabushiki Kaisha Toshiba Method for manufacturing a composite member
US6703114B1 (en) * 2002-10-17 2004-03-09 Arlon Laminate structures, methods for production thereof and uses therefor
JP3887337B2 (ja) 2003-03-25 2007-02-28 株式会社東芝 配線部材およびその製造方法
JP2005191382A (ja) * 2003-12-26 2005-07-14 Toshiba Corp 複合部材の製造方法、および複合部材形成用基材
JP5528250B2 (ja) * 2010-07-30 2014-06-25 日東電工株式会社 配線回路基板の製造方法
US9888584B2 (en) 2014-12-31 2018-02-06 Invensas Corporation Contact structures with porous networks for solder connections, and methods of fabricating same
WO2019216885A1 (en) * 2018-05-08 2019-11-14 W.L. Gore & Associates, Inc. Flexible and stretchable printed circuits on stretchable substrates
KR20230056056A (ko) 2018-05-08 2023-04-26 더블유.엘. 고어 앤드 어소시에이트스, 인코포레이티드 신장성 및 비신장성 기재 상의 내구성 있는 연성 인쇄 회로
JP7089064B2 (ja) 2018-05-08 2022-06-21 ダブリュ．エル．ゴア アンド アソシエイツ，インコーポレイティド 皮膚適用のためのフレキシブルプリント回路

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3541222A (en) * 1969-01-13 1970-11-17 Bunker Ramo Connector screen for interconnecting adjacent surfaces of laminar circuits and method of making
CA962021A (en) * 1970-05-21 1975-02-04 Robert W. Gore Porous products and process therefor
CA1284523C (en) * 1985-08-05 1991-05-28 Leo G. Svendsen Uniaxially electrically conductive articles with porous insulating substrate
ATE112099T1 (de) * 1988-02-05 1994-10-15 Raychem Ltd Geschichtete polymerfolie.
DE68929282T2 (de) * 1988-11-09 2001-06-07 Nitto Denko Corp., Ibaraki Leitersubstrat, Filmträger, Halbleiteranordnung mit dem Filmträger und Montagestruktur mit der Halbleiteranordnung
US5371404A (en) * 1993-02-04 1994-12-06 Motorola, Inc. Thermally conductive integrated circuit package with radio frequency shielding
US5456004A (en) * 1994-01-04 1995-10-10 Dell Usa, L.P. Anisotropic interconnect methodology for cost effective manufacture of high density printed circuit boards
US5498467A (en) * 1994-07-26 1996-03-12 W. L. Gore & Associates, Inc. Process for preparing selectively conductive materials by electroless metal deposition and product made therefrom
US5698496A (en) * 1995-02-10 1997-12-16 Lucent Technologies Inc. Method for making an anisotropically conductive composite medium

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100980353B1 (ko) * 2003-11-19 2010-09-07 유니버시티 오브 플로리다 리서치 파운데이션, 아이엔씨. 다공성 기판상에 패턴화된 전극을 접촉시키는 방법 및 이에의한 소자

Also Published As

Publication number Publication date
EP0863550A3 (en) 1999-01-07
EP0863550A2 (en) 1998-09-09
US5910354A (en) 1999-06-08
JPH1125755A (ja) 1999-01-29

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Patent event code: PA01091R01D

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