KR102548782B1 - Apparatus for testing semiconductor devices - Google Patents

Abstract

A semiconductor device testing apparatus is disclosed. The apparatus includes a DC tester for performing a DC test on semiconductor devices, sequentially performing the DC test on the semiconductor devices one by one, and classifying the semiconductor devices according to the DC test result and storing them in trays; and a function tester that is disposed adjacent to the DC tester, performs a function test on semiconductor devices for which the DC test has been completed, classifies the semiconductor devices according to a result of the function test, and stores the semiconductor devices in trays.

Description

Semiconductor device testing device {Apparatus for testing semiconductor devices}

Embodiments of the present invention relate to a semiconductor device testing apparatus. More specifically, it relates to a semiconductor device testing apparatus for electrically testing individualized semiconductor devices using a probe card.

In general, semiconductor devices can be formed on a silicon wafer used as a semiconductor substrate by repeatedly performing a series of manufacturing processes, and the semiconductor devices formed as described above are packaged into semiconductor packages through a dicing process, a bonding process, and a packaging process. can be manufactured.

Semiconductor packages manufactured as described above may be determined to be good products or defective products through an electrical property test. A test handler for handling the semiconductor devices and a test device for inspecting the semiconductor packages may be used to inspect the electrical characteristics.

As semiconductor devices of various types are recently developed, an electrical test process for individualized semiconductor devices may be required through a dicing process, and there is a demand for a test device for performing this process. For example, in the case of MPGA (Micro-Pillar Grid Array) devices formed on a wafer, an electrical test process is required after being individualized through a dicing process, but it is difficult to use a general test handler.

Republic of Korea Patent Registration No. 10-0922145 (registration date: 2009.10.09)

An object of the present invention is to provide a new type of semiconductor device testing apparatus for performing a test process on individualized semiconductor devices through a dicing process.

A semiconductor device testing apparatus according to an aspect of the present invention for achieving the above object performs a DC test on semiconductor devices, sequentially performs the DC test one by one on the semiconductor devices, and according to the DC test result A function test is performed on a DC tester that classifies and accommodates the semiconductor elements in trays, and semiconductor elements disposed adjacent to the DC tester and for which the DC test has been completed, and classifying the semiconductor elements according to the result of the function test. It may include functional testers that are housed in the trays.

According to example embodiments, the semiconductor device testing apparatus may further include a tray transfer module for transferring a tray containing the semiconductor devices on which the DC test is completed to the function tester.

According to embodiments of the present invention, the DC tester includes a stage unit supporting a frame wafer including a dicing tape to which a plurality of semiconductor devices are attached and a ring-shaped mount frame on which the dicing tape is mounted; A DC test module including a DC test probe card for performing a DC test, loading the semiconductor devices one by one from the stage unit into the DC test module and unloading the DC test-completed semiconductor device from the DC test module; A load/unload module that classifies the semiconductor devices according to the DC test result may be included.

According to example embodiments, the DC tester may further include a die ejecting unit disposed below the stage unit and configured to separate the semiconductor devices from the dicing tape one by one.

According to embodiments of the present invention, the load/unload module may include a test stage for supporting a semiconductor device, a first device transfer unit for picking up the semiconductor device from the stage unit and transferring it onto the test stage; A stage driver for moving the test stage to load and unload semiconductor devices on the test stage into the DC test module; and a device for picking up the semiconductor devices from the test stage and storing them in the trays. It may include a 2-element transfer unit.

According to embodiments of the present invention, the first element transfer unit may include a first picker for picking up the semiconductor element from the dicing tape, and a first picker driving unit for moving the first picker in vertical and horizontal directions. can include

According to embodiments of the present invention, the second element transfer unit may include a second picker for picking up the semiconductor element from the test stage, a buffer tray for temporarily storing the semiconductor element, and a second picker for temporarily storing the semiconductor element in the test stage. A second picker driver for vertically and horizontally moving the second picker to transfer it from the stage to the buffer tray; a third picker for picking up the semiconductor element from the buffer tray; It may include a third picker driving unit for moving the third picker in vertical and horizontal directions in order to receive the picker.

According to embodiments of the present invention, the DC tester may further include a load port for supporting a cassette in which a plurality of frame wafers are accommodated, and a wafer transfer unit for withdrawing the frame wafer from the cassette and moving it onto the stage unit. can include

According to embodiments of the present invention, the semiconductor device testing apparatus includes a second DC tester disposed adjacent to the function tester and having the same configuration as the DC tester, and a semiconductor on which a DC test has been completed by the second DC tester. The device may further include a second tray transfer module for transferring the tray containing the devices to the function tester.

According to embodiments of the present invention, the function tester is disposed on one side of the function test module including a function test probe card for a function test of the semiconductor devices for which the DC test has been completed, and and a load/unload module for loading the semiconductor devices into the function test module, unloading the semiconductor devices for which the function test has been completed from the function test module, and classifying the semiconductor devices according to the function test result.

According to embodiments of the present invention, the load/unload module includes a test stage for supporting the semiconductor devices, and a test stage for loading and unloading the test stage into and from the functional test module. A stage driving unit for moving may be included.

According to embodiments of the present invention, the load/unload module transfers the semiconductor elements from a tray in which the semiconductor elements are accommodated onto the test stage and loads the semiconductor elements according to a function test result of the semiconductor elements. An element transfer unit configured to classify and store the elements in the trays may be further included.

According to embodiments of the present invention, the load/unload module may include an element supply area where a tray accommodating the semiconductor elements is located, and an element classification area where trays for accommodating the semiconductor elements according to the test result are located. may further include

According to example embodiments, the load/unload module may further include an empty tray supply area for supplying empty trays to the device classification areas.

According to embodiments of the present invention, the test stage may be provided with vacuum holes for vacuum adsorbing each of the semiconductor devices.

According to embodiments of the present invention, the vacuum holes are divided into a plurality of groups, the vacuum holes included in each group are connected to each other by one vacuum pipe, and the one vacuum pipe has a vacuum hole in the vacuum hole. A flow control valve may be connected to adjust the flow rate so that the vacuum pressure in is always constant.

A semiconductor device testing apparatus according to another aspect of the present invention for achieving the above object has a function of simultaneously performing a functional test on a plurality of semiconductor devices, classifying the semiconductor devices according to the functional test result, and storing the semiconductor devices in trays. It is disposed on both sides of the tester and the function tester and performs a DC test on semiconductor devices, the DC test is sequentially performed on the semiconductor devices one by one, and the semiconductor devices are classified according to the DC test result to tray a first DC tester and a second DC tester accommodated in the tester; and a tray transfer module for transferring trays containing the semiconductor devices on which the DC test has been completed by the first and second DC testers are stored to the function tester. there is.

According to embodiments of the present invention, the function tester is disposed on both sides of a function test module including a probe card for performing a function test on the semiconductor devices, and the function test module, respectively. and a pair of load/unload modules for loading the semiconductor elements and unloading the semiconductor elements from the test module after the function test by the test module is completed, wherein the load/unload modules load the test module. The semiconductor elements may be alternately loaded.

According to embodiments of the present invention, the load/unload modules may have the same structure as each other.

According to the embodiments of the present invention as described above, the semiconductor device testing apparatus may be used to test electrical characteristics of individual semiconductor devices from a wafer through a dicing process. In particular, the semiconductor device testing apparatus performs a DC test on semiconductor devices, sequentially performs the DC test on the semiconductor devices one by one, classifies the semiconductor devices according to the DC test result, and stores them in trays. and a function tester disposed adjacent to the DC tester, performing a function test on semiconductor devices for which the DC test has been completed, classifying the semiconductor devices according to the function test result, and storing the semiconductor devices in trays. trays containing the semiconductor devices on which the DC test has been completed may be transferred from the DC tester to the function tester by a tray transfer module.

Accordingly, the DC test and the function test for the individualized semiconductor devices can be sequentially performed. In particular, first and second DC testers are disposed on both sides of the function tester, and the semiconductor devices for which the DC test has been completed are tested. By supplying the first and second load/unload modules of the function tester, respectively, the time required for the DC test and the function test of the semiconductor devices can be greatly reduced.

1 is a schematic plan view illustrating a semiconductor device testing apparatus according to an exemplary embodiment of the present invention.
FIG. 2 is a schematic plan view for explaining the semiconductor devices shown in FIG. 1 .
FIG. 3 is a schematic configuration diagram for explaining the first DC tester shown in FIG. 1 .
FIG. 4 is a schematic configuration diagram for explaining the stage unit shown in FIG. 3 .
5 is a schematic configuration diagram for explaining the DC test module shown in FIG. 3 .
FIG. 6 is a schematic configuration diagram for explaining the function tester shown in FIG. 1 .
7 and 8 are schematic configuration diagrams for explaining a function test module and load/unload modules of the function tester shown in FIG. 6 .
FIG. 9 is a schematic configuration diagram for explaining a test stage of the function tester shown in FIG. 6 .

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention does not have to be configured as limited to the embodiments described below and may be embodied in various other forms. The following examples are not provided to fully complete the present invention, but rather to fully convey the scope of the present invention to those skilled in the art.

In the embodiments of the present invention, when one element is described as being disposed on or connected to another element, the element may be directly disposed on or connected to the other element, and other elements may be interposed therebetween. It could be. Alternatively, when an element is described as being directly disposed on or connected to another element, there cannot be another element between them. The terms first, second, third, etc. may be used to describe various items such as various elements, compositions, regions, layers and/or parts, but the items are not limited by these terms. will not

Technical terms used in the embodiments of the present invention are only used for the purpose of describing specific embodiments, and are not intended to limit the present invention. In addition, unless otherwise limited, all terms including technical and scientific terms have the same meaning as can be understood by those skilled in the art having ordinary knowledge in the technical field of the present invention. The above terms, such as those defined in conventional dictionaries, shall be construed to have a meaning consistent with their meaning in the context of the relevant art and description of the present invention, unless expressly defined, ideally or excessively outwardly intuition. will not be interpreted.

Embodiments of the present invention are described with reference to schematic illustrations of idealized embodiments of the present invention. Accordingly, variations from the shapes of the illustrations, eg, variations in manufacturing methods and/or tolerances, are fully foreseeable. Accordingly, embodiments of the present invention are not to be described as being limited to specific shapes of regions illustrated as diagrams, but to include variations in shapes, and elements described in the drawings are purely schematic and their shapes is not intended to describe the exact shape of the elements, nor is it intended to limit the scope of the present invention.

1 is a schematic plan view illustrating a semiconductor device testing apparatus according to an exemplary embodiment, and FIG. 2 is a schematic plan view illustrating semiconductor devices illustrated in FIG. 1 .

Referring to FIG. 1 , according to an embodiment of the present invention, a semiconductor device testing apparatus 10 performs a DC test and a function test on individual semiconductor devices 20 (see FIG. 2 ) from a semiconductor wafer through a dicing process. can be used to perform As an example, a plurality of micro bumps 22 may be provided at the center of the semiconductor elements 20 and a plurality of electrode pads 24 may be provided at the edge.

In the DC test, a preset voltage may be applied through the micro bumps 22 of the semiconductor devices 20 to measure DC characteristics such as open/short, input current, output voltage, and power supply current. As a result, From this, the quantity and defect of the semiconductor elements 20 can be determined.

In the function test, the read/write function and mutual interference of the semiconductor elements 20 may be tested, and the test pattern provided from the pattern generator is passed through the electrode pads 24 of the semiconductor elements 20. After application, the output signals from the semiconductor devices 20 are compared with reference values, and the comparison result is compared with the expected output pattern generated from the pattern generator to evaluate the amount and defect of the operation.

In addition, an AC test on the semiconductor devices 20 may be additionally performed along with the function test. In the AC test, a pulse signal is applied through the electrode pads 24 of the semiconductor elements 20 to measure operating characteristics such as input/output transport delay time and start/end time of an output signal to determine speed grades. can

According to one embodiment of the present invention, the semiconductor device testing apparatus 10 includes a first DC tester 100 and a second DC tester 300 for performing a DC test on the semiconductor devices 20. can do. The first and second DC testers 100 and 300 sequentially perform the DC test on the semiconductor devices 20 one by one, and classify the semiconductor devices 20 according to the DC test results to tray Can be stored in fields.

The semiconductor device testing apparatus 10 includes a function tester 200 disposed between the first and second DC testers 100 and 300 and simultaneously performing a function test on a plurality of semiconductor devices 20. can do. For example, the function tester 200 performs a function test on the semiconductor devices 20 for which the DC test has been completed, classifies the semiconductor devices 20 according to the result of the function test, and stores the semiconductor devices 20 in trays. can As another example, the function test by the function tester 200 is limited to the semiconductor devices 20 classified as good products according to the DC test results of the first and second DC testers 100 and 300. may be performed as

The semiconductor device test apparatus 10 is configured to transfer the trays in which the semiconductor devices 20 for which the DC test has been completed are accommodated from the first and second DC testers 100 and 300 to the function tester 200. It may include first and second tray transfer modules 400 and 410 . The first and second tray transfer modules 400 and 410 include first and second transfer arms 402 and 412 and the first and second transfer arms 402 and 412 for gripping the tray. First and second steps for moving the first and second DC testers 100 and 300 and the function tester 200 along the Y-axis direction, for example, as shown in FIG. 1 . Arm driving units 404 and 414 may be included, respectively.

FIG. 3 is a schematic configuration diagram for explaining the first DC tester shown in FIG. 1 , and FIG. 4 is a schematic configuration diagram for explaining the stage unit shown in FIG. 3 .

3 and 4, the first DC tester 100 has a dicing tape 32 to which a plurality of semiconductor elements 20 are attached and a circular ring shape to which the dicing tape 32 is mounted. A DC test module 120 including a stage unit 110 supporting a frame wafer 30 including a mount frame 34 of the DC test probe card 122 for performing the DC test, The semiconductor devices 20 are loaded from the stage unit 110 one by one into the DC test module 120, the DC test completed semiconductor devices 20 are unloaded from the DC test module 120, and the DC test is performed. A load/unload module 130 that classifies the semiconductor devices 20 according to results may be included.

The stage unit 110 may include a wafer stage 112 for supporting the frame wafer 30 . An expansion ring 114 for supporting the dicing tape 32 and a clamp 116 for holding the mount frame 34 may be vertically movably disposed on the wafer stage 112 . The expansion ring 114 may support edge portions of the dicing tape 32, and the clamp 116 may be lowered after gripping the mount frame 34, whereby the dicing tape 32 may be lowered. (32) can be extended.

A die ejecting unit 118 for separating the semiconductor devices 20 one by one from the dicing tape 32 may be disposed under the stage unit 110 .

The load/unload module 130 picks up the semiconductor device 20 from the test stage 132 for supporting the semiconductor device 20 and the stage unit 110 and places it on the test stage 132. A first device transfer unit 134 for transferring, and the test stage for loading and unloading the semiconductor device 20 on the test stage 134 to and from the DC test module 120 ( 132) in the Y-axis direction, and a second element transfer unit 142 for picking up the semiconductor device 20 from the test stage 132 and storing it in trays 50. can do.

The first element transfer unit 134 includes a first picker 136 for picking up the semiconductor element 20 from the dicing tape 32 and the first picker 136 in the vertical and horizontal directions (X axial direction) may include a first picker driving unit 138 for moving. The second element transfer unit 142 includes a second picker 144 for picking up the semiconductor element 20 from the test stage 132 and a buffer tray 146 for temporarily storing the semiconductor element 20 . ) and a second picker that moves the second picker 144 in vertical and horizontal directions (Y-axis direction) to transfer the semiconductor device 20 from the test stage 132 to the buffer tray 146. A driver 148, a third picker 150 for picking up the semiconductor device 20 from the buffer tray 146, and the first picker 150 for accommodating the semiconductor device 20 in the trays 50. It may include a third picker driver 152 that moves the 3 picker 150 in vertical and horizontal directions (X-axis direction and Y-axis direction). The first, second, and third pickers 136, 144, and 150 may vacuum the semiconductor device 20 using vacuum pressure.

The first picker 136 may vacuum the semiconductor element 20 separated from the dicing tape 32 by the die ejecting unit 118, and the first picker driving unit 138 The semiconductor element 20 can be picked up from the dicing tape 32 by raising the first picker 136 .

The die ejecting unit 118 may separate the semiconductor device 20 from the dicing tape 32 by raising the eject pins below the dicing tape 32 . In this case, the stage unit 110 may be configured to be movable in a horizontal direction in order to sequentially or selectively separate the semiconductor devices 20 from the dicing tape 32 . For example, although not shown, the stage unit 110 may be moved in a horizontal direction by a separate stage driving unit (not shown).

Meanwhile, the first DC tester 100 takes out the frame wafer 30 from the load port 160 supporting the cassette 40 in which the plurality of frame wafers 30 are accommodated, and the cassette 40. and a wafer transfer unit 162 for moving the wafer onto the stage unit 110 . The stage unit 110 may be moved adjacent to the wafer transfer unit 162 for loading and unloading of the frame wafer 30 by the wafer transfer unit 162, and the semiconductor devices 20 may be moved one by one. It may be moved to be positioned above the die ejecting unit 118 and to allow the first picker 136 to pick up the semiconductor devices 20 one by one.

In addition, an alignment camera 170 for confirming a state in which the semiconductor device 20 is picked up by the first picker 136 may be disposed below the movement path of the first picker 136, and the alignment Depending on the result of observation by the camera 170, the degree (angle) of the semiconductor device 20 may be corrected. The degree of distortion of the semiconductor device 20 may be corrected by rotating the first picker 136 or the test stage 132 .

5 is a schematic configuration diagram for explaining the DC test module shown in FIG. 3 .

Referring to FIG. 5 , after the semiconductor device 20 is loaded on the test stage 132 by the first picker 136, the test stage 132 is moved to the test stage 132 by the stage driver 140. may be transferred to the DC test module 120. In particular, the DC test module 120 includes a DC test probe card 122 for the DC test and a DC test head 124 connected to the DC test probe card 122 and applying test signals. can do.

The stage driving unit 140 may horizontally move the test stage 132 below the DC test probe card 122, and then raise the test stage 132 so that the micro bump of the semiconductor device 20 22 may be connected to probes of the DC test probe card 122 .

After the DC test by the DC test module 120 is completed, the stage driver 140 moves the test stage 132 to the transfer position of the semiconductor device 20, that is, the test stage by the first picker 136. 132 may be moved to a position where the semiconductor element 20 is loaded.

Referring back to FIG. 3 , the second picker 144 may pick up the semiconductor device 20 on the test stage 132 and move it to the buffer tray 146 , while the first picker 136 ) may move the subsequent semiconductor device 20 from the frame wafer 30 to the test stage 132 .

The third picker 150 may pick up the semiconductor device 20 accommodated in the buffer tray 146 and move it to one of the trays 50 according to the DC test result.

The first DC tester 100 may include a device classification area 180 in which the trays 50 are provided. The semiconductor devices 20 on which the DC test is completed may be classified into good products, defective products, retested products, and the like according to the DC test results, and stored in the trays 50 . In addition, the first DC tester 100 may include stackers 52 for accommodating a plurality of trays 50, and empty trays and non-defective semiconductor devices are stored in the stackers 52. Trays, trays accommodating defective semiconductor elements, trays accommodating semiconductor elements to be retested, and the like may be accommodated. As an example, the trays 50 may be transferred between the element sorting area 180 and the stackers 52 by the first transfer arm 402 of the first tray transfer module 400. there is. However, unlike the above, the stackers 52 may be directly arranged in the element sorting area 180 .

Referring back to FIG. 1 , the second DC tester 300 may have the same configuration as the first DC tester 100 . That is, the second DC tester 300 may be formed of substantially the same components as the first DC tester 100, and therefore, additional detailed description of the second DC tester 300 will be omitted. The first and second tray transfer modules 400 and 300 of the first and second tray transfer modules 400 and 300, in a state where the semiconductor devices 20 have completed the DC test, are accommodated in trays 50. 410), it can be transferred to the function tester 200.

FIG. 6 is a schematic configuration diagram for explaining the function tester shown in FIG. 1 .

Referring to FIG. 6 , the function tester 200 includes a function test module 210 including a function test probe card 212 for performing a function test on the semiconductor devices 20 and the function test module 210 . It is disposed on both sides of the test module 210, and the semiconductor devices 20 are loaded into the function test module 210 and after the function test by the function test module 210 is completed, the semiconductor devices 20 It may include a pair of load/unload modules 220A and 220B for unloading from the function test module 210 . In particular, the load/unload modules 220A and 220B may alternately load the semiconductor devices 20 into the function test module 210 .

7 and 8 are schematic configuration diagrams for explaining a function test module and load/unload modules of the function tester shown in FIG. 6 .

6 to 8 , the function tester includes a first load/unload module 220A and a second load/unload module for loading and unloading the semiconductor devices 20 with respect to the function test module 210 . module 220B.

As an example, as shown in FIG. 7 , after the first semiconductor elements 20A are loaded into the function test module 210 by the first load/unload module 220A, the first semiconductor elements ( While the first test process for 20A) is being performed, the second load/unload module 220B may prepare to load the second semiconductor devices 20B. After the first test process is completed, the first semiconductor devices 20A may be unloaded from the function test module 210 by the first load/unload module 220A, and then, as shown in FIG. 8 , The second semiconductor devices 20B may be loaded into the function test module 210 by the second load/unload module 220B.

In particular, while the second test process for the second semiconductor devices 20B is being performed, the first semiconductor devices 20A may be classified into good products and defective products according to the results of the first test process. Also, after the classification of the first semiconductor devices 20A is completed, the first load/unload module 220A may prepare to load subsequent third semiconductor devices.

As described above, the load and unload of the semiconductor devices 20 are alternately performed by the load/unload modules 220A and 220B, and while the function test process for the semiconductor devices 20 is performed, the tested semiconductor device Since the unloading and sorting steps for the semiconductor devices 20 and the loading preparation step for the subsequent semiconductor devices 20 can be performed simultaneously, the operating rate of the semiconductor device test apparatus 200 can be greatly improved, and the semiconductor devices The time required for the test process of (20) can be greatly reduced.

According to an embodiment of the present invention, the load/unload modules 220A and 220B may have the same configuration. That is, the first load/unload module 220A and the second load/unload module 220B may have the same configuration, and for convenience of explanation, in this embodiment, the first load/unload module 220A ) is explained only.

The first load/unload module 220A loads a test stage 222 for supporting the semiconductor devices 20 and the test stage 222 into the function test module 210 and tests the function. It may include a stage drive 224 for unloading from module 210 . That is, the stage driver 224 moves the test stage 222 horizontally between the function test module 210 and the device transfer area 226 where the loading preparation step and the sorting step of the semiconductor devices 20 are performed. This may cause loading and unloading of the semiconductor devices 20 to and from the functional test module 210 .

The first load/unload module 220A transfers the semiconductor elements 20 from the tray 50 in which the semiconductor elements 20 are accommodated onto the stage 222 and transfers the semiconductor elements 20 to the stage 222 . An element transfer unit 228 may be included to classify the semiconductor elements 20 into pre-prepared trays 52 and 54 according to the test result and transfer them. In particular, the first load/unload module 220A includes an element supply region 234 where the tray 50 in which the semiconductor elements are accommodated is located and the semiconductor elements 20 are accommodated according to the test result. It may include device classification areas 236 and 538 in which the trays 52 and 54 are positioned. In this case, the tray 50 in which the semiconductor devices are accommodated may be provided from the first DC tester 100 .

For example, the element transfer unit 228 includes a picker 230 for picking up the semiconductor elements 20 using vacuum pressure and the picker 230 for transferring the semiconductor elements 20 . It may include a picker driving unit 232 that moves in vertical and horizontal directions. The device transfer unit 228 is to transfer the semiconductor devices 20 from the tray 50 in which the semiconductor devices 20 are accommodated onto the test stage 222 located in the device transfer area 226. After the function test process is completed, the semiconductor devices 20 are classified into good products and defective products according to the test results from the test stage 222 and stored in the trays 52 and 54, respectively. .

Meanwhile, in the device supply area 234 and the device classification areas 236 and 238, the tray 50 accommodating the semiconductor devices 20 before the function test and the semiconductor devices 20 after the function test are accommodated. Support plates (not shown) on which the trays 52 and 54 are respectively placed may be provided. Unlike the above, a stacker (not shown) on which the trays 50 accommodating the semiconductor devices 20 are stacked may be provided in the device supply area 234 , and the device sorting areas 236 and 238 ) may be provided with stackers (not shown) on which trays 52 accommodating non-defective semiconductor elements and trays 54 accommodating inferior semiconductor elements are respectively stacked.

In addition, the first load/unload module 220A may include an empty tray supply area 240 for supplying empty trays 56 to the device classification areas 236 and 238, and as an example , A stacker (not shown) on which a plurality of empty trays 56 are stacked may be provided in the empty tray supply area 240 .

FIG. 9 is a schematic configuration diagram for explaining a test stage of the function tester shown in FIG. 6 .

Referring to FIG. 9 , the semiconductor devices 20 transferred onto the test stage 222 by the device transfer unit 228 are vacuumed by vacuum holes 223A provided in the test stage 222 . can be adsorbed. For example, the stage 222 may include a plurality of vacuum holes 223A, and the semiconductor elements 20 may be vacuum-sucked by the vacuum holes 223A, respectively.

According to one embodiment of the present invention, the vacuum holes 223A may be divided into a plurality of groups, and as shown, the vacuum holes 223A included in each group are one vacuum pipe ( 223B) can be connected to each other. In particular, vacuum pipes 250 may be connected to the vacuum pipes 223B connected to the vacuum holes 223A included in each group, and the vacuum pipes 250 may include the vacuum holes 223A. Flow control valves 252 may be installed to keep the internal vacuum pressure constant.

In particular, if the vacuum holes 223A included in one of the groups are described as an example, when the semiconductor devices 20 are sequentially placed on the vacuum holes 223A one by one, the one vacuum pipe The flow rate sucked through (223B) may be gradually reduced. The degree of opening of the flow control valve 252 can be adjusted to constantly adjust the flow rate, and accordingly, the vacuum pressure applied to the semiconductor elements 20 vacuumed by the vacuum holes 223A. can always be controlled to be constant.

That is, while the semiconductor elements 20 are sequentially loaded onto the test stage 222, the flow control valves 252 operate on the vacuum pipes 223B according to the load of the semiconductor elements 20. A flow rate flowing through may be gradually decreased, and conversely, when the semiconductor devices 20 are unloaded from the test stage 222 one by one, the flow rate may be gradually increased. As a result, the semiconductor devices 20 loaded onto the test stage 222 may be more stably maintained by the vacuum holes 223A.

As shown, only vacuum pipes 250 and flow control valves 252 connected to some groups are illustratively shown, but vacuum pipes 250 and flow control valves 252 are respectively connected to all groups. ) may be connected, and the vacuum pipes 250 may be connected to a vacuum source (not shown) including a vacuum pump or the like.

According to an embodiment of the present invention, although not shown, the first load/unload module 220A may include an alignment camera for aligning the semiconductor devices 20 . The alignment camera may capture an image of the semiconductor device 20 picked up by the device transfer unit 228 or the semiconductor device 20 placed on the stage 222, and the semiconductor device obtained by the alignment camera Alignment of the semiconductor element 20 may be performed based on the image of (20). The picker driver 232 may rotate the picker 230 to align the semiconductor elements 20 and may also adjust the positions of the semiconductor elements 20 based on the image.

After the semiconductor devices 20 are loaded on the test stage 222 , the stage driver 224 may transfer the test stage 222 to the function test module 210 . For example, the stage driver 224 may move the test stage 222 below the function test probe card 212 . As shown in FIG. 2 , the test module 210 includes a function test probe card 212 equipped with a plurality of probes for connection with the electrode pads 24 of the semiconductor elements 20 and the probes. A test head 214 for applying test signals to the semiconductor devices 20 through the card 212 may be included.

Referring to FIG. 7 , the first load/unload module 220A includes an alignment driver 242 for aligning the semiconductor devices 20 on the test stage 222 and the probes of the probe card 212 with each other. can include Although not shown, the positions of the semiconductor elements 20 on the test stage 222 and the positions of the probes of the probe card 212 may be detected by upper and lower cameras (not shown), and the test An alignment step using the upper and lower cameras may be performed first before the process.

The alignment driver 242 may adjust the position of the test stage 222 using positional information of the probes of the probe card 212 and the semiconductor devices 20 detected by the upper and lower cameras. there is. For example, the position of the test stage 222 in the Y-axis direction can be adjusted by the stage driving unit 224 and the position in the X-axis direction can be adjusted by the alignment driving unit 242 . In addition, the test stage 222 may be configured to be rotatable by the alignment driving unit 242, and the alignment driving unit 242 is configured to rotate between the semiconductor elements 20 and the probes of the probe card 212. For alignment, the arrangement angle of the test stage 212 may be adjusted.

As described above, after the alignment step between the semiconductor elements 20 and the probes of the probe card 212 is completed, the test stage 222 may be raised by the connection driver 244 . For example, the first load/unload module 220A is a connection driving unit that moves the test stage 222 in a vertical direction to connect the semiconductor elements 20 to the probes of the probe card 212. (244).

According to one embodiment of the present invention, the test stage 222 may be elevated by the connection driver 244 . Accordingly, the probes of the probe card 212 may contact the electrode pads 24 of the semiconductor elements 20, and the function test may be performed thereon.

Referring back to FIG. 6 , the second load/unload module 220B may have substantially the same configuration as the first load/unload module 220A, and thus the second load/unload module 220B Additional detailed description of is omitted.

On the other hand, the first and second tray transfer modules 400 and 410 are configured to load/unload the first and second load/unload modules 220A and 220B from the first and second DC testers 100 and 300. The trays 50 containing the semiconductor devices 20 for which the DC test has been completed may be moved to the device supply areas 234 , and the empty tray 56 may be picked up from the empty tray supply areas 240 . and moved to the device classification areas 236 and 238.

According to the embodiments of the present invention as described above, the semiconductor device testing apparatus 10 may be used to test electrical characteristics of individual semiconductor devices 20 from a wafer through a dicing process. In particular, the semiconductor device testing apparatus 10 performs a DC test on the semiconductor devices 20, performs the DC test sequentially one by one with respect to the semiconductor devices 20, and performs the DC test according to the DC test result. DC testers 100 and 300 sorting semiconductor devices 20 and storing them in trays 50, and semiconductor devices 20 disposed adjacent to the DC testers 100 and 300 and having completed the DC test It may include a function tester 200 that performs a function test on the function test, classifies the semiconductor elements 20 according to the function test result, and accommodates them in trays 52 and 54, and the DC test is completed. The trays 50 containing the devices 20 may be transferred from the DC testers 100 and 300 to the function tester 200 by the tray transfer modules 400 and 410 .

Accordingly, the DC test and the function test for the individualized semiconductor devices 20 can be sequentially performed, and in particular, the first and second DC testers 100 and 300 are placed on both sides of the function tester 200. and supplying the semiconductor devices 20 for which the DC test has been completed to the first and second load/unload modules 220A and 220B of the function tester 200, respectively. The time required for DC tests and functional tests can be greatly reduced.

Although the above has been described with reference to preferred embodiments of the present invention, those skilled in the art can variously modify and change the present invention without departing from the spirit and scope of the present invention described in the claims below. You will understand that there is

10: semiconductor device test device 20: semiconductor device
30: frame wafer 40: cassette
50: tray 100: first DC tester
110: stage unit 120: DC test module
122: probe card for DC test 130: load/unload module
132: test stage 136: first picker
144: second picker 146: buffer tray
150: third picker 160: load port
200: functional tester 210: functional test module
220A: first load/unload module 220B: second load/unload module
222: test stage 228: element transfer unit
230: picker 300: second DC tester
400: first tray transport module 410: second tray transport module

Claims (19)

a DC tester for performing a DC test on semiconductor devices, sequentially performing the DC test on the semiconductor devices one by one, classifying the semiconductor devices according to the DC test result, and storing the semiconductor devices in trays; and
A function tester disposed adjacent to the DC tester, performing a function test on semiconductor devices for which the DC test has been completed, and classifying the semiconductor devices according to the function test result and storing them in trays,
The function tester includes a function test module including a function test probe card for performing a function test on semiconductor devices for which the DC test has been completed, and a function test module disposed on one side of the function test module to test the semiconductor devices with the function test module. a function test load/unload module for loading and unloading semiconductor elements for which the function test has been completed from the function test module and classifying the semiconductor elements according to the function test result;
The function test load/unload module includes a function test test stage for supporting the semiconductor devices, and a function test test stage for loading and unloading the function test test stage into and from the function test module. It includes a stage driving unit for functional testing that moves the test stage,
The test stage for the function test is provided with vacuum holes for vacuum adsorbing each of the semiconductor elements,
The vacuum holes are divided into a plurality of groups, and the vacuum holes included in each group are connected to each other by a single vacuum pipe, and the flow rate is such that the vacuum pressure in the vacuum holes is always constant in the one vacuum pipe. A semiconductor device test apparatus, characterized in that the flow control valve for adjusting the connection. The semiconductor device testing apparatus of claim 1 , further comprising a tray transfer module for transferring a tray containing the semiconductor devices on which the DC test has been completed to the function tester. The method of claim 1, wherein the DC tester,
a stage unit supporting a frame wafer including a dicing tape to which a plurality of semiconductor elements are attached and a ring-shaped mount frame on which the dicing tape is mounted;
a DC test module including a DC test probe card for performing the DC test; and
A DC test load/unload module for loading the semiconductor elements from the stage unit one by one into the DC test module, unloading the semiconductor elements on which the DC test has been completed from the DC test module, and classifying the semiconductor elements according to the DC test result. A semiconductor device test apparatus comprising a. 4 . The apparatus of claim 3 , wherein the DC tester further comprises a die ejecting unit disposed below the stage unit and configured to separate the semiconductor devices one by one from the dicing tape. The method of claim 3, wherein the load / unload module for the DC test,
a test stage for DC testing for supporting a semiconductor device;
a first device transfer unit for picking up the semiconductor device from the stage unit and transferring it onto the test stage for DC testing;
a stage driver for a DC test that moves the test stage for a DC test to load and unload a semiconductor device on the test stage for a DC test into the DC test module; and
and a second element transfer unit for picking up the semiconductor element from the test stage for the DC test and storing the semiconductor element in the trays. The method of claim 5, wherein the first element transfer unit,
a first picker for picking up the semiconductor element from the dicing tape; and
and a first picker driver for moving the first picker in vertical and horizontal directions. The method of claim 5, wherein the second element transfer unit,
a second picker for picking up the semiconductor device from the test stage for the DC test;
a buffer tray for temporarily storing the semiconductor device;
a second picker driving unit that vertically and horizontally moves the second picker to transfer the semiconductor device from the DC test test stage to the buffer tray;
a third picker for picking up the semiconductor element from the buffer tray; and
and a third picker driver for vertically and horizontally moving the third picker to accommodate the semiconductor device in the trays. The method of claim 3, wherein the DC tester,
a load port supporting a cassette in which a plurality of frame wafers are accommodated; and
The semiconductor device test apparatus further comprising a wafer transfer unit for withdrawing the frame wafer from the cassette and moving it onto the stage unit. The method of claim 1, further comprising: a second DC tester disposed adjacent to the function tester and having the same configuration as the DC tester; and
The semiconductor device test apparatus of claim 1, further comprising a second tray transfer module for transferring a tray containing the semiconductor devices on which the DC test has been completed by the second DC tester to the functional tester. delete delete The method of claim 1, wherein the load/unload module for the function test comprises:
An element transfer unit which transfers the semiconductor elements from the tray in which the semiconductor elements are accommodated onto the test stage for the function test and classifies and accommodates the semiconductor elements in the trays according to the function test result of the semiconductor elements A semiconductor device test apparatus comprising: The method of claim 12, wherein the load/unload module for the function test comprises:
an element supply region in which a tray accommodating the semiconductor elements is located; and
The semiconductor device test apparatus of claim 1, further comprising device classification regions in which trays for accommodating the semiconductor devices according to the test results are positioned. The method of claim 13, wherein the load/unload module for the function test comprises:
The semiconductor device test apparatus further comprising an empty tray supply area for supplying empty trays to the device sorting areas. delete delete delete delete delete

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