KR102538845B1 - Apparatus for testing semiconductor devices - Google Patents

Abstract

A semiconductor device testing apparatus is disclosed. The apparatus includes: a test module including a stage unit supporting semiconductor elements attached to an adhesive sheet and a probe card for testing electrical characteristics of the semiconductor elements; A test stage for supporting, an unloading shuttle for accommodating semiconductor devices tested by the test module, and transferring the semiconductor devices from the stage unit to the test stage and from the test stage to the unloading shuttle. It includes an element transfer unit that does.

Description

Semiconductor device testing device {Apparatus for testing semiconductor devices}

Embodiments of the present invention relate to a semiconductor device testing apparatus. More specifically, it relates to a semiconductor device testing apparatus for electrically testing individualized semiconductor devices using a probe card.

In general, semiconductor devices can be formed on a silicon wafer used as a semiconductor substrate by repeatedly performing a series of manufacturing processes, and the semiconductor devices formed as described above are packaged into semiconductor packages through a dicing process, a bonding process, and a packaging process. can be manufactured.

Semiconductor packages manufactured as described above may be determined to be good products or defective products through an electrical property test. A test handler for handling the semiconductor devices and a test device for inspecting the semiconductor packages may be used to inspect the electrical characteristics.

As semiconductor devices of various types are recently developed, an electrical test process for individualized semiconductor devices may be required through a dicing process, and there is a demand for a test device for performing this process. For example, in the case of MPGA (Micro-Pillar Grid Array) devices formed on a wafer, an electrical test process is required after being individualized through a dicing process, but there is considerable difficulty in using a general type test handler. There is a problem in that it takes a considerable amount of time to perform individual tests on devices.

Republic of Korea Patent Registration No. 10-0922145 (registration date: 2009.10.09)

An object of the present invention is to provide a new type of semiconductor device testing apparatus for performing a test process on individualized semiconductor devices through a dicing process.

A semiconductor device testing apparatus according to an aspect of the present invention for achieving the above object includes a stage unit supporting semiconductor devices attached on an adhesive sheet and a probe card for testing electrical characteristics of the semiconductor devices. A test module, a test stage disposed under the test module and supporting the semiconductor devices, an unloading shuttle for accommodating the semiconductor devices tested by the test module, and the semiconductor devices from the stage unit. It may include an element transfer unit that transfers the device to a test stage and transfers the device from the test stage to the unloading shuttle.

According to embodiments of the present invention, the semiconductor device testing apparatus moves the test stage horizontally between a load/unload area where the semiconductor devices are loaded and unloaded from the test stage and a test area below the test module. A stage driving unit for moving may be further included.

According to embodiments of the present invention, the semiconductor device testing apparatus includes a second test stage disposed under the test module and supporting second semiconductor devices, and the second test stage from the stage unit to the second test stage. a second element transporter for transferring to a test stage and transferring the devices from the second test stage to the unloading shuttle; a second load/unload area for loading and unloading the second semiconductor devices to and from the second test stage; and The second stage driver may further include a second stage driver for horizontally moving the second test stage between test areas under the test module.

According to example embodiments, the semiconductor device testing apparatus may include a third stage for moving the stage unit between a load region adjacent to the load/unload region and a second load region adjacent to the second load/unload region. A driving unit may be further included.

According to embodiments of the present invention, the semiconductor device testing apparatus further includes a shuttle driver for moving the shuttle between an unload area adjacent to the load/unload area and a second unload area adjacent to the second load/unload area. can include

According to embodiments of the present invention, the test stage may be provided with vacuum holes for vacuum adsorbing each of the semiconductor elements.

According to embodiments of the present invention, the vacuum holes are divided into a plurality of groups, the vacuum holes included in each group are connected to each other by one vacuum pipe, and the one vacuum pipe has a vacuum hole in the vacuum hole. A flow control valve may be connected to adjust the flow rate so that the vacuum pressure in is always constant.

According to embodiments of the present invention, the semiconductor device testing apparatus includes a tray for accommodating semiconductor devices determined to be defective among semiconductor devices stored in the shuttle, and determining that semiconductor devices stored in the shuttle are good products. The device may further include a tape providing unit providing adhesive tape for unloading the loaded semiconductor devices, and a third device transfer unit transferring the semiconductor devices from the shuttle onto the tray or the adhesive tape.

According to embodiments of the present invention, the tape providing unit may include a supply reel for supplying the adhesive tape and a collection reel for collecting the adhesive tape to which the good quality semiconductor elements are attached.

According to example embodiments, the semiconductor device testing apparatus may further include a probe camera mounted on one side of the test stage and configured to check the probes of the probe card.

According to embodiments of the present invention, the semiconductor device testing apparatus includes a stage camera disposed to be movable in a horizontal direction between the probe card and the test stage and configured to check semiconductor devices on the test stage, and the probe camera. and an alignment driver horizontally moving the test stage to align semiconductor devices on the test stage and probes of the probe card using the stage camera.

According to embodiments of the present invention, the semiconductor device testing apparatus may further include a connection driving unit that moves the test stage in a vertical direction to connect the semiconductor devices on the test stage to the probes of the probe card. .

According to example embodiments, the semiconductor device testing apparatus may further include a die ejecting unit disposed below the stage unit and configured to separate the semiconductor devices on the adhesive sheet from the adhesive sheet.

According to embodiments of the present invention, the semiconductor device testing apparatus includes a cassette accommodating frame wafers each including an adhesive sheet to which semiconductor devices are attached and a ring frame to which the adhesive sheet is mounted, and a rod supporting the cassette. A port and a wafer transfer unit for transferring frame wafers from the cassette onto the stage unit may be further included.

A semiconductor device testing apparatus according to another aspect of the present invention for achieving the above object includes a stage unit supporting semiconductor devices attached on an adhesive sheet and a probe card for testing electrical characteristics of the semiconductor devices. A test module, first and second test stages disposed under the test module and supporting the semiconductor devices, and first and second test stages alternately moving the first and second test stages to a test area under the test module. Second stage driving units may be included.

According to the embodiments of the present invention as described above, a semiconductor device testing apparatus includes a stage unit supporting semiconductor devices attached to an adhesive sheet and a probe card for testing electrical characteristics of the semiconductor devices. A test module, first and second test stages disposed under the test module and supporting the semiconductor devices, and first and second test stages alternately moving the first and second test stages to a test area under the test module. Second stage driving units may be included. As described above, since the semiconductor devices can be alternately loaded into the test module by the first and second stage drivers, the time required for the test process of the semiconductor devices 10 can be greatly reduced.

In addition, since a test process can be simultaneously performed on a plurality of semiconductor devices loaded on the first and second test stages, the time required for testing is reduced compared to the conventional test method for individual semiconductor devices. can be further shortened.

1 is a schematic plan view illustrating a semiconductor device testing apparatus according to an exemplary embodiment of the present invention.
FIG. 2 is a schematic configuration diagram for explaining a stage unit shown in FIG. 1 .
3 and 4 are schematic configuration diagrams for explaining the operation of the first and second test stages shown in FIG. 1 .
FIG. 5 is a schematic configuration diagram for explaining an example of the semiconductor device shown in FIG. 1 .
FIG. 6 is a schematic configuration diagram for explaining the first test stage shown in FIG. 1 .

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention does not have to be configured as limited to the embodiments described below and may be embodied in various other forms. The following examples are not provided to fully complete the present invention, but rather to fully convey the scope of the present invention to those skilled in the art.

In the embodiments of the present invention, when one element is described as being disposed on or connected to another element, the element may be directly disposed on or connected to the other element, and other elements may be interposed therebetween. It could be. Alternatively, when an element is described as being directly disposed on or connected to another element, there cannot be another element between them. The terms first, second, third, etc. may be used to describe various items such as various elements, compositions, regions, layers and/or parts, but the items are not limited by these terms. will not

Technical terms used in the embodiments of the present invention are only used for the purpose of describing specific embodiments, and are not intended to limit the present invention. In addition, unless otherwise limited, all terms including technical and scientific terms have the same meaning as can be understood by those skilled in the art having ordinary knowledge in the technical field of the present invention. The above terms, such as those defined in conventional dictionaries, shall be construed to have a meaning consistent with their meaning in the context of the relevant art and description of the present invention, unless expressly defined, ideally or excessively outwardly intuition. will not be interpreted.

Embodiments of the present invention are described with reference to schematic illustrations of idealized embodiments of the present invention. Accordingly, variations from the shapes of the illustrations, eg, variations in manufacturing methods and/or tolerances, are fully foreseeable. Accordingly, embodiments of the present invention are not to be described as being limited to specific shapes of regions illustrated as diagrams, but to include variations in shapes, and elements described in the drawings are purely schematic and their shapes is not intended to describe the exact shape of the elements, nor is it intended to limit the scope of the present invention.

1 is a schematic plan view for explaining a semiconductor device testing apparatus according to an embodiment of the present invention, FIG. 2 is a schematic configuration diagram for explaining a stage unit shown in FIG. 1, and FIGS. 3 and 4 are These are schematic configuration diagrams for explaining the operation of the first and second test stages shown in FIG. 1 .

1 to 4 , a semiconductor device testing apparatus 100 according to an embodiment of the present invention is used to perform an electrical test process on individualized semiconductor devices 10 from a wafer through a dicing process. can be used

According to one embodiment of the present invention, as shown in FIG. 1, a semiconductor device testing apparatus 100 includes a stage unit 102 supporting semiconductor devices 10 attached to an adhesive sheet 22; A test module 110 including a probe card 112 for testing electrical characteristics of the semiconductor devices 10 may be included. In addition, the semiconductor device testing apparatus 100 includes first and second test stages 116 for supporting the semiconductor devices 10 and providing the semiconductor devices 10 to the test module 110; 120) may be included.

The semiconductor elements 10 may be provided in a state of being attached to the adhesive sheet 22 . For example, as shown in FIG. 2 , a frame wafer including an adhesive sheet 22 to which the semiconductor elements 10 are attached and a ring frame 24 having a circular ring shape to which the adhesive sheet 22 is attached. (20) may be provided on the stage unit 102.

The stage unit 102 may include a wafer stage 104 for supporting the frame wafer 20 . An expansion ring 106 for supporting the adhesive sheet 22 and a clamp 108 for holding the ring frame 24 may be vertically movably disposed on the wafer stage 104 . The extension ring 106 may support edge portions of the adhesive sheet 22 , and the clamp 108 may be lowered after gripping the ring frame 24 , whereby the adhesive sheet 22 may be lowered. ) can be extended.

The first and second test stages 116 and 120 may be moved to a test area under the test module 110 by the first and second stage drivers 118 and 122 , respectively. In particular, the first and second stage drivers 118 and 122 may alternately move the first and second test stages 116 and 120 to the test area. That is, as shown in FIGS. 3 and 4 , after the test process for the first semiconductor elements 10A on the first test stage 116 is completed, the first stage driver 118 moves the first stage driver 118 from the test area. The first test stage 116 may be unloaded, and then the second stage driver 122 may load the second test stage 120 on which the subsequent second semiconductor devices 10B are mounted into the test area. can As described above, after the first semiconductor devices 10A are unloaded from the test area, the second semiconductor devices 10B can be directly loaded into the test area without time loss. Time can be greatly reduced.

According to an embodiment of the present invention, the semiconductor device testing apparatus 100 may include an unloading shuttle 124 for accommodating the semiconductor devices 10 that have been tested by the test module 110. . In addition, after the semiconductor device testing apparatus 100 transfers the semiconductor devices 10 from the stage unit 102 to the first test stage 116 and the test by the test module 110 is completed, A first element transfer unit 126 for transferring the semiconductor elements 10 from the first test stage 116 to the unloading shuttle 124, and the stage unit 102 for transferring the semiconductor elements 10 to the second test stage 120, and after the test by the test module 110 is completed, the second device transfers the semiconductor devices from the second test stage 120 to the unloading shuttle 124. A transfer unit 132 may be included.

Specifically, the first semiconductor elements 10A are moved from the stage unit 102 by the first element transfer unit 126 in the first load/unload area located on one side of the test module 110. It can be loaded onto one test stage 116, and then the first test stage 116 can be moved to the test area by the first stage driver 118.

While a test process for the first semiconductor devices 10A is being performed, the second semiconductor device is moved by the second device transfer unit 132 in a second load/unload area located on the other side of the test module 110. s 10B may be loaded onto the second test stage 120 from the stage unit 102 .

After the test of the first semiconductor devices 10A is completed, the first test stage 116 may be moved to the first load/unload area by the first stage driving unit 118, and then the first test stage 116 may be moved to the first load/unload area. 2 The test stage 120 may be moved to the test area by the second stage driver 122 .

While the test process for the second semiconductor devices 10B is being performed, the first device transfer unit 126 transfers the first semiconductor devices from the first test stage 116 to the unloading shuttle 124. 10A may be transferred, and subsequent third semiconductor devices may be transferred from the stage unit 102 onto the first test stage 116 .

After the test of the second semiconductor devices 10B is completed, the second test stage 120 may be moved to the second load/unload region by the second stage driving unit 122, and then the second test stage 120 may be moved to the second load/unload region. 3 semiconductor devices may be moved to the test area by the first stage driver 118 .

While the test process for the third semiconductor devices is being performed, the second device transfer unit 132 transfers the second semiconductor devices 10B from the second test stage 120 to the unloading shuttle 124. can be transferred.

Meanwhile, for the transfer of the semiconductor elements 10 as described above, the stage unit 102 is configured to use a third stage driving unit 138 to transfer the first load area adjacent to the first load/unload area and the second load area. / It can be horizontally moved between the second loading area adjacent to the unloading area, and the unloading shuttle 124 is moved between the first unloading area adjacent to the first loading/unloading area and the second loading area adjacent to the first loading/unloading area by the shuttle driving unit 140. It can be horizontally moved between the second unload areas adjacent to the 2 load/unload areas.

Specifically, as shown in FIG. 1, the first and second stage drivers 118 and 122 may move the first and second test stages 116 and 120 in the Y-axis direction, and the The three-stage driving unit 138 and the shuttle driving unit 140 move the stage unit 102 and the shuttle 124 in a direction parallel to the moving direction of the first and second test stages 116 and 120, respectively. can be moved

The first element transfer unit 126 includes a first picker 128 for picking up the semiconductor elements 10 one by one and a first picker 128 for moving the first picker 128 vertically and horizontally (X-axis direction). It may include a 1 picker driving unit 130, and the second element transfer unit 132 vertically and horizontally moves the second picker 134 for picking up the semiconductor elements 10 one by one and the second picker 134. A second picker driver 136 for moving in the horizontal (X-axis direction) direction may be included. The first and second pickers 128 and 134 may vacuum the semiconductor devices 10 using vacuum pressure.

Referring back to FIG. 2 , a die ejecting unit 142 may be disposed under the stage unit 102 to separate the semiconductor devices 10 one by one from the adhesive sheet 22 . Although not shown in detail, the die ejecting unit 142 may lift the semiconductor device 10 on the adhesive sheet 22 by using eject pins, thereby causing the semiconductor device 10 to lift the adhesive sheet ( 22) can be separated.

For example, first and second die ejecting units may be disposed in the first and second load regions, respectively, and the first and second die ejecting units may be disposed on the first and second test stages. It can be used to load the semiconductor elements 10 onto (116, 120). In this case, the third stage driver 138 may move the stage unit 102 in the X-axis direction and the Y-axis direction to supply the semiconductor devices 10 one by one, and the first and second dies The ejecting units may be movable in a vertical direction so as not to interfere with the movement of the stage unit 102 between the first and second load regions.

Meanwhile, the semiconductor device test apparatus 100 includes a cassette 30 in which a plurality of frame wafers 20 are accommodated, a load port 144 supporting the cassette 30, and a frame wafer (from the cassette 30). 20) may include a wafer transfer unit 146 for withdrawing and transferring the wafer onto the stage unit 102. Although not shown in detail, the wafer transfer unit 146 includes a gripper 148 for holding the frame wafer 20, a gripper driver 150 for moving the gripper 148 in the Y-axis direction, and the frame wafer It may include guide rails (not shown) for guiding the movement of (20). The stage unit 102 may be moved by the third stage driving unit 138 to a position adjacent to the wafer transfer unit 146 for loading and unloading of the frame wafer 20 .

According to one embodiment of the present invention, the test module is a probe equipped with a plurality of probes for connection with the electrode pads 14 (see FIG. 5) of the semiconductor devices 10, as shown in FIG. 3 . A test head 114 for applying test signals to the semiconductor devices 10 through the card 112 and the probe card 112 may be included.

Referring to FIG. 3 , the semiconductor device testing apparatus 100 includes a first alignment driver 152 for aligning the semiconductor devices 10 on the first test stage 116 and the probes of the probe card 112 with each other. ) may be included. In addition, the semiconductor device testing apparatus 100 may include a first probe camera 154 and a stage camera 156 for aligning the semiconductor devices 10 and the probes of the probe card 112 . there is.

The first probe camera 154 may be mounted on one side of the first test stage 116 to check the probes of the probe card 112 . In order to check the positions of the probes of the probe card 112 using the first probe camera 154, the first alignment driver 152 may move the first test stage 116 in the X-axis direction. Also, the first stage driver 118 may move the first test stage 116 in the Y-axis direction.

The stage camera 156 may be movable between the probe card 112 and the first test stage 116 in a horizontal direction, for example, in an X-axis direction. In particular, the semiconductor device testing apparatus 100 may include a camera driving unit 158 for moving the stage camera 156 in the X-axis direction, and the stage camera 156 and the first test stage 116 ) may be moved in the X-axis direction and the Y-axis direction, respectively, to check the positions of the semiconductor devices 10 on the first test stage 116 .

After checking the positions of the probes of the probe card 112 and the positions of the semiconductor devices 10 on the first test stage 116 using the first probe camera 154 and the stage camera 156 as described above, Alignment between the semiconductor elements 10 and the probes of the probe card 112 may be achieved. In particular, the first alignment driver 152 may rotate the first test stage 116 to adjust the positions of the semiconductor devices 10 .

Meanwhile, a second probe camera 160 may be mounted on the second test stage 120, and the step of aligning the semiconductor devices 10 on the second test stage 120 may be performed by the second probe camera ( 160), the stage camera 158, and the second alignment driver 162.

As described above, after the alignment step between the semiconductor devices 10 and the probes of the probe card 112 is completed, the first test stage 116 can be raised by the first connection driving unit 164. Accordingly, the semiconductor devices 10 on the first test stage 116 may be connected to the probes of the probe card 112 . Meanwhile, the second test stage 120 may be elevated by the second connection driver 166 .

FIG. 5 is a schematic configuration diagram for explaining an example of the semiconductor device shown in FIG. 1 .

Referring to FIG. 5 , the semiconductor device 10 may include micro bumps 12 and electrode pads 14 used as external connection terminals. For example, the micro bumps 12 may be disposed at the center of the semiconductor device 10, and the electrode pads 14 are disposed along the edge of the semiconductor device 10 in a ring shape. It can be.

The test module 110 may perform a function test on the semiconductor devices 10 . Specifically, the test module 110 may test read/write functions, mutual interference, etc. of the semiconductor devices 10, and apply a test pattern provided from a pattern generator to the semiconductor devices 10. Afterwards, the output signals from the semiconductor devices 10 are compared with reference values, and the comparison result is compared with the expected output pattern generated by the pattern generator to evaluate the amount and defect of the operation.

Also, the test module 110 may additionally perform an AC test on the semiconductor devices 10 . Specifically, the test module 110 applies a pulse signal to the semiconductor devices 10 to measure operating characteristics such as input/output transport delay time and start/end time of an output signal, and determine speed grades by dividing them. .

As an example, the function test may be performed after connecting the electrode pads 14 to probes of the probe card 112 . Meanwhile, the micro bumps 12 may be used to perform a DC test on the semiconductor devices 10 .

Meanwhile, the first and second test stages 116 and 120 may have vacuum holes for vacuum adsorbing the semiconductor devices 10 , respectively.

FIG. 6 is a schematic configuration diagram for explaining the first test stage shown in FIG. 1 .

Referring to FIG. 6 , the semiconductor devices 10 transferred onto the first test stage 116 by the first device transfer unit 126 are vacuum holes provided in the first test stage 116 ( 168) can be vacuum adsorbed. For example, the first test stage 116 may include a plurality of vacuum holes 168, and the semiconductor devices 10 may be vacuum-sucked by the vacuum holes 168, respectively. .

According to one embodiment of the present invention, the vacuum holes 168 may be divided into a plurality of groups, and as shown, the vacuum holes 168 included in each group are one vacuum pipe ( 170) can be connected to each other. In particular, vacuum pipes 172 may be connected to the vacuum pipes 170 connected to the vacuum holes 168 included in each group, and the vacuum holes 168 may be connected to the vacuum pipes 172. Flow control valves 174 may be installed to keep the internal vacuum pressure constant.

In particular, when the vacuum holes 168 included in one of the groups are described as an example, when the semiconductor elements 10 are sequentially placed on the vacuum holes 168 one by one, the one vacuum pipe The flow rate sucked through 170 may be gradually reduced. The degree of opening of the flow control valve 174 can be adjusted to constantly adjust the flow rate, and accordingly, the vacuum pressure applied to the semiconductor devices 10 vacuumed by the vacuum holes 168 can always be controlled to be constant.

That is, while the semiconductor elements 10 are sequentially loaded onto the first test stage 116, the flow control valves 174 are connected to the vacuum tubes according to the load of the semiconductor elements 10 ( 170), the flow rate may be gradually decreased, and conversely, when the semiconductor devices 10 are unloaded one by one from the first test stage 116, the flow rate may be gradually increased. As a result, the semiconductor devices 10 loaded onto the first test stage 116 may be more stably maintained by the vacuum holes 168 .

As shown, only vacuum pipes 172 and flow control valves 174 connected to some groups are illustratively shown, but vacuum pipes 172 and flow control valves 174 are respectively connected to all groups. ) may be connected, and the vacuum pipes 172 may be connected to a vacuum source (not shown) including a vacuum pump or the like.

Meanwhile, the second test stage 120 may also have vacuum holes for vacuum adsorbing the semiconductor devices 10 , and vacuum pipes and flow control valves may be connected to the vacuum holes. A description of the vacuum holes of the second test stage 120 is substantially the same as that of the vacuum holes 168 of the first test stage 116 and thus will be omitted.

Referring back to FIG. 1 , according to an exemplary embodiment, the semiconductor devices 10 having completed the test process may be classified according to the test result. The semiconductor device testing apparatus 100 includes a tray 176 for accommodating semiconductor devices determined to be defective among the semiconductor devices 10 accommodated in the shuttle 124, and semiconductor devices accommodated in the shuttle 124. A tape providing unit 178 providing an adhesive tape 180 for unloading semiconductor elements determined to be non-defective among the elements 10, and the semiconductor elements 10 from the shuttle 124 are transferred to the tray 176. ) or a third element transfer unit 186 that transfers onto the adhesive tape 180 .

The adhesive tape 180 may be used to carry out the non-defective semiconductor elements, and the tape providing unit 178 includes a supply reel 182 for supplying the adhesive tape 180 and the non-defective semiconductor elements attached thereto. A collection reel 184 for collecting the adhesive tape 180 may be included. However, unlike the above, although not shown, the semiconductor device test apparatus 100 may carry out the good semiconductor devices using a separate tray.

The third element transfer unit 186 includes a third picker 188 for picking up the semiconductor elements 10 and a third picker driving unit 190 for moving the third picker 188 in vertical and horizontal directions. , and an alignment camera 192 for checking the semiconductor device 10 picked up by the third picker 188 may be disposed below the moving path of the third picker 188 . The alignment camera 192 may be used to correct the degree (angle) of the semiconductor device 10 that is distorted.

According to the embodiments of the present invention as described above, the semiconductor device testing apparatus 100 includes a stage unit 102 for supporting semiconductor devices 10 attached on an adhesive sheet 22, and the semiconductor devices. A test module 110 including a probe card 112 for testing electrical characteristics of the semiconductor devices 10, and a first and second test module 110 disposed under the test module 110 and supporting the semiconductor devices 10 Second test stages 116 and 120 and first and second stage drivers that alternately move the first and second test stages 116 and 120 to the test area under the test module 110 ( 118, 122) may be included. As described above, since the semiconductor devices 10 can be alternately loaded into the test module 110 by the first and second stage drivers 118 and 122, the test process of the semiconductor devices 10 The time required can be greatly reduced.

In addition, since the test process can be simultaneously performed on the plurality of semiconductor devices 10 loaded on the first and second test stages 116 and 120, the conventional test method for individual semiconductor devices and In comparison, the time required for testing can be further reduced.

Although the above has been described with reference to preferred embodiments of the present invention, those skilled in the art can variously modify and change the present invention without departing from the spirit and scope of the present invention described in the claims below. You will understand that there is

10: semiconductor element 12: micro bump
14: electrode pad 20: frame wafer
22: adhesive sheet 30: cassette
100: semiconductor device test apparatus 102: stage unit
110: test module 112: probe card
116: first test stage 118: first stage driving unit
120: second test stage 122: second stage driving unit
124: shuttle 126: first element transfer unit
132: second element transfer unit 138: third stage driving unit
140: shuttle drive unit 142: die ejecting unit
144: load port 146: wafer transfer unit
152: first alignment driving unit 154: first probe camera
156: stage camera 160: second probe camera
162: second alignment driving unit 164: first connection driving unit
166: second connection driving unit 168: vacuum hole
174: flow control valve 176: tray
178: tape supply unit 180: adhesive tape
182: supply reel 184: recovery reel
186: third element transfer unit 192: alignment camera

Claims (15)

a stage unit supporting the semiconductor elements attached on the adhesive sheet;
a test module including a probe card for testing electrical characteristics of the semiconductor devices;
a test stage disposed under the test module and supporting the semiconductor devices;
an unloading shuttle for accommodating the semiconductor devices tested by the test module; and
A device transfer unit for transferring the semiconductor devices from the stage unit to the test stage and transferring the semiconductor devices from the test stage to the unloading shuttle;
The test stage is provided with vacuum holes for vacuum adsorbing each of the semiconductor elements,
The vacuum holes are divided into a plurality of groups, and the vacuum holes included in each group are connected to each other by a single vacuum pipe, and the flow rate is such that the vacuum pressure in the vacuum holes is always constant in the one vacuum pipe. A semiconductor device test apparatus, characterized in that the flow control valve for adjusting the is connected. 2. The method of claim 1 , further comprising a stage driver for horizontally moving the test stage between a load/unload area where the semiconductor devices are loaded and unloaded from the test stage and a test area below the test module. Semiconductor device test device to be. The method of claim 2 , further comprising: a second test stage disposed below the test module and supporting second semiconductor devices;
a second device transfer unit transferring the second semiconductor devices from the stage unit to the second test stage and from the second test stage to the unloading shuttle; and
A second stage driver horizontally moves the second test stage between a second load/unload area where the second test stage is loaded and unloaded with the second semiconductor devices and a test area under the test module. A semiconductor device test apparatus comprising: 4. The semiconductor of claim 3 , further comprising a third stage driver for moving the stage unit between a load region adjacent to the load/unload region and a second load region adjacent to the second load/unload region. element test device. 4 . The apparatus of claim 3 , further comprising a shuttle driver for moving the shuttle between an unload area adjacent to the load/unload area and a second unload area adjacent to the second load/unload area. . delete delete The semiconductor device of claim 1 , further comprising: a tray for accommodating semiconductor devices determined to be defective among the semiconductor devices accommodated in the shuttle;
a tape providing unit providing an adhesive tape for unloading semiconductor elements determined to be good among the semiconductor elements accommodated in the shuttle; and
The semiconductor device test apparatus of claim 1, further comprising a third element transfer unit for transferring the semiconductor elements from the shuttle onto the tray or the adhesive tape. The method of claim 8, wherein the tape providing unit,
a supply reel for supplying the adhesive tape; and
A semiconductor device test apparatus comprising a recovery reel for recovering the adhesive tape to which the non-defective semiconductor devices are attached. The semiconductor device testing apparatus according to claim 1 , further comprising a probe camera installed on one side of the test stage and configured to check the probes of the probe card. 11. The method of claim 10, further comprising: a stage camera disposed to be movable in a horizontal direction between the probe card and the test stage and configured to check semiconductor devices on the test stage; and
and an alignment driver horizontally moving the test stage to align the probes of the probe card and the semiconductor devices on the test stage using the probe camera and the stage camera. . The semiconductor device testing apparatus of claim 1 , further comprising a connection driver for moving the test stage in a vertical direction to connect the semiconductor devices on the test stage to the probes of the probe card. The apparatus of claim 1 , further comprising a die ejecting unit disposed below the stage unit and configured to separate the semiconductor devices on the adhesive sheet from the adhesive sheet. The method of claim 1 , further comprising: a cassette accommodating frame wafers each including an adhesive sheet to which semiconductor elements are attached and a ring frame to which the adhesive sheet is mounted;
a load port supporting the cassette; and
The semiconductor device test apparatus further comprising a wafer transfer unit for transferring a frame wafer from the cassette onto the stage unit. a stage unit supporting the semiconductor elements attached on the adhesive sheet;
a test module including a probe card for testing electrical characteristics of the semiconductor devices;
first and second test stages disposed below the test module and supporting the semiconductor devices; and
Including first and second stage drivers for alternately moving the first and second test stages to a test area under the test module,
Each of the first and second test stages is provided with vacuum holes for vacuum adsorbing the semiconductor elements, respectively;
The vacuum holes are divided into a plurality of groups, and the vacuum holes included in each group are connected to each other by a single vacuum pipe, and the flow rate is such that the vacuum pressure in the vacuum holes is always constant in the one vacuum pipe. A semiconductor device test apparatus, characterized in that the flow control valve for adjusting the is connected.

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