KR102520096B1 - 인코딩된 멀티-레인 n-팩토리얼 및 다른 멀티-와이어 통신 시스템들 - Google Patents

인코딩된 멀티-레인 n-팩토리얼 및 다른 멀티-와이어 통신 시스템들 Download PDF

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KR102520096B1
KR102520096B1 KR1020187009328A KR20187009328A KR102520096B1 KR 102520096 B1 KR102520096 B1 KR 102520096B1 KR 1020187009328 A KR1020187009328 A KR 1020187009328A KR 20187009328 A KR20187009328 A KR 20187009328A KR 102520096 B1 KR102520096 B1 KR 102520096B1
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sequence
clock
clock signal
lane
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Korean (ko)
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KR20180066065A (ko
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쇼이치로 센고쿠
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퀄컴 인코포레이티드
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Priority claimed from US14/875,592 external-priority patent/US9735948B2/en
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4291—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/14—Channel dividing arrangements, i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
KR1020187009328A 2015-10-05 2016-09-09 인코딩된 멀티-레인 n-팩토리얼 및 다른 멀티-와이어 통신 시스템들 Active KR102520096B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/875,592 2015-10-05
US14/875,592 US9735948B2 (en) 2013-10-03 2015-10-05 Multi-lane N-factorial (N!) and other multi-wire communication systems
PCT/US2016/051131 WO2017062132A1 (en) 2015-10-05 2016-09-09 Multi-lane n-factorial encoded and other multi-wire communication systems

Publications (2)

Publication Number Publication Date
KR20180066065A KR20180066065A (ko) 2018-06-18
KR102520096B1 true KR102520096B1 (ko) 2023-04-07

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KR1020187009328A Active KR102520096B1 (ko) 2015-10-05 2016-09-09 인코딩된 멀티-레인 n-팩토리얼 및 다른 멀티-와이어 통신 시스템들

Country Status (8)

Country Link
EP (1) EP3360278A1 (enExample)
JP (1) JP2018534847A (enExample)
KR (1) KR102520096B1 (enExample)
CN (1) CN108141346A (enExample)
AU (1) AU2016335548A1 (enExample)
BR (1) BR112018006874A2 (enExample)
TW (1) TW201714443A (enExample)
WO (1) WO2017062132A1 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113192950B (zh) 2020-04-30 2025-04-18 台湾积体电路制造股份有限公司 集成电路及其制造方法
US11437998B2 (en) 2020-04-30 2022-09-06 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit including back side conductive lines for clock signals

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140372644A1 (en) 2013-06-12 2014-12-18 Qualcomm Incorporated Camera control interface extension bus
WO2015050736A1 (en) 2013-10-03 2015-04-09 Qualcomm Incorporated Method to enhance mipi d-phy link rate with minimal phy changes and no protocol changes
WO2015134071A1 (en) 2014-03-06 2015-09-11 Qualcomm Incorporated Clock recovery circuit for multiple wire data signals

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05227173A (ja) * 1992-02-10 1993-09-03 Oki Electric Ind Co Ltd 多重処理方式
US9711041B2 (en) * 2012-03-16 2017-07-18 Qualcomm Incorporated N-phase polarity data transfer
US9030976B2 (en) * 2008-03-27 2015-05-12 Silicon Image, Inc. Bi-directional digital interface for video and audio (DIVA)
JP2013110554A (ja) * 2011-11-21 2013-06-06 Panasonic Corp 送信装置、受信装置及びシリアル伝送システム
US8996740B2 (en) * 2012-06-29 2015-03-31 Qualcomm Incorporated N-phase polarity output pin mode multiplexer
WO2014065002A1 (ja) * 2012-10-26 2014-05-01 株式会社日立国際電気 マルチチャネル無線通信システム、基地局、チャネル利用方法
US9363071B2 (en) * 2013-03-07 2016-06-07 Qualcomm Incorporated Circuit to recover a clock signal from multiple wire data signals that changes state every state cycle and is immune to data inter-lane skew as well as data state transition glitches
US20150220472A1 (en) * 2014-02-05 2015-08-06 Qualcomm Incorporated Increasing throughput on multi-wire and multi-lane interfaces

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140372644A1 (en) 2013-06-12 2014-12-18 Qualcomm Incorporated Camera control interface extension bus
WO2015050736A1 (en) 2013-10-03 2015-04-09 Qualcomm Incorporated Method to enhance mipi d-phy link rate with minimal phy changes and no protocol changes
WO2015134071A1 (en) 2014-03-06 2015-09-11 Qualcomm Incorporated Clock recovery circuit for multiple wire data signals

Also Published As

Publication number Publication date
TW201714443A (zh) 2017-04-16
WO2017062132A1 (en) 2017-04-13
CN108141346A (zh) 2018-06-08
KR20180066065A (ko) 2018-06-18
AU2016335548A1 (en) 2018-04-12
BR112018006874A2 (pt) 2018-10-16
EP3360278A1 (en) 2018-08-15
JP2018534847A (ja) 2018-11-22

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KR102520096B1 (ko) 인코딩된 멀티-레인 n-팩토리얼 및 다른 멀티-와이어 통신 시스템들

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