KR102275368B1 - Semiconductor light emitting device - Google Patents

Abstract

The present disclosure provides a semiconductor light emitting device comprising: a semiconductor light emitting device chip including a first electrode and a second electrode; a substrate including a plate on which an electrical connection and an electrical connection including a first electrical connection electrically connected to the first electrode and a second electrical connection electrically connected to the second electrode are formed; And, provided on the substrate, the first metal block comprising an upper surface electrically connected to the outside and a lower surface electrically connected to the first electrical connection, and an upper surface electrically connected to the outside and a second electrical connection electrically connected It includes; a metal block including a second metal block including a lower surface, wherein the height of the metal block is greater than or equal to the height of the semiconductor light emitting device chip.

Description

Semiconductor light emitting device {SEMICONDUCTOR LIGHT EMITTING DEVICE}

The present disclosure relates to a semiconductor light emitting device as a whole, and more particularly, to a semiconductor light emitting device capable of emitting light on six sides.

Herein, background information related to the present disclosure is provided, and they do not necessarily mean prior art (This section provides background information related to the present disclosure which is not necessarily prior art). Also, in this specification, direction indications such as up/down, up/down, etc. are based on the drawings.

1 is a view showing an example of a conventional semiconductor light emitting device chip.

The semiconductor light emitting device chip includes a growth substrate 11 (eg, a sapphire substrate), a buffer layer 12 on the growth substrate 11, a first semiconductor layer 13 having a first conductivity (eg, an n-type GaN layer), electrons and An active layer 14 (eg, INGaN/(In)GaN MQWs) that generates light through recombination of holes, and a second semiconductor layer 15 (eg, p-type GaN layer) having a second conductivity different from the first conductivity are sequentially formed A light-transmitting conductive film 16 for current diffusion, an electrode 17 serving as a pad is formed thereon, and an electrode serving as a pad on the first semiconductor layer 13 exposed by etching ( 18: Example: Cr/Ni/Au laminated metal pad) is formed. A semiconductor light emitting device of the form shown in FIG. 1 is particularly referred to as a lateral chip. Here, when the growth substrate 11 side is electrically connected to the outside, it becomes a mounting surface. In the present specification, the semiconductor light emitting device chip or the outside to which the semiconductor light emitting device is electrically connected means a printed circuit board (PCB), a submount, a thin film transistor (TFT), or the like.

2 is a view showing another example of the semiconductor light emitting device chip presented in US Patent No. 7,262,436. Drawing symbols have been changed for convenience of explanation.

The semiconductor light emitting device chip includes a growth substrate 21, a first semiconductor layer 23 having a first conductivity on the growth substrate 21, an active layer 24 for generating light through recombination of electrons and holes, and a first conductivity A second semiconductor layer 25 having a second conductivity different from that of the semiconductor layer 25 is sequentially deposited, and three-layered electrode films 29, 29-1, and 29-2 for reflecting light toward the growth substrate 21 on the second semiconductor layer 25 are sequentially deposited. ) is formed. The first electrode film 29 may be an Ag reflective film, the second electrode film 29-1 may be a Ni diffusion barrier film, and the third electrode film 29-2 may be an Au bonding layer. An electrode 28 serving as a pad is formed on the etched and exposed first semiconductor layer 23 . Here, when the electrode film 29-2 side is electrically connected to the outside, it becomes a mounting surface. In particular, the semiconductor light emitting device chip of the form shown in FIG. 2 is referred to as a flip chip. In the case of the flip chip shown in FIG. 2 , the electrode 28 formed on the first semiconductor layer 23 is at a lower height than the electrode films 29 , 29-1 and 29-2 formed on the second semiconductor layer, but at the same height. It can also be made to be formed in Here, the reference height may be the height from the growth substrate 21 .

3 is a view showing another example of the semiconductor light emitting device chip presented in US Patent No. 8,008,683. Drawing symbols have been changed for convenience of explanation.

The semiconductor light emitting device chip includes a first semiconductor layer 33 having a first conductivity, an active layer 34 generating light through recombination of electrons and holes, and a second semiconductor layer 35 having a second conductivity different from the first conductivity. ) are sequentially formed, and supplying current to the upper electrode 36 and the second semiconductor layer 35 formed on the side from which the growth substrate is removed, while supporting the semiconductor layers 33 , 34 , 35 ( 31 ), and a lower electrode 32 formed on the support substrate 31 . The upper electrode 36 is electrically connected to the outside using wire bonding. When the lower electrode 32 side is electrically connected to the outside, it functions as a mounting surface. As shown in FIG. 3 , a semiconductor light emitting device chip having a structure in which electrodes 36 and 32 are provided one by one above and below the active layer 34 is referred to as a vertical chip.

4 is a diagram illustrating an example of a conventional semiconductor light emitting device.

The semiconductor light emitting device 40 is provided with lead frames 41 and 42 functioning as pads, a mold 43, and a vertical semiconductor light emitting device chip 45 (Vertical Type Light Emitting Chip) in the cavity 44, The cavity 44 is filled with an encapsulant 47 containing a wavelength conversion material 46 . A lower surface of the vertical semiconductor light emitting device chip 45 is directly electrically connected to the lead frame 41 , and an upper surface thereof is electrically connected to the lead frame 42 by a wire 48 . A part of the light emitted from the vertical semiconductor light emitting device chip 45 excites the wavelength conversion material 46 to generate light of different colors, and two different lights are mixed to produce white light. For example, the semiconductor light emitting device chip 45 generates blue light, and the light generated by being excited by the wavelength conversion material 46 is yellow light, and blue light and yellow light are mixed to produce white light. FIG. 4 shows a semiconductor light emitting device using the vertical semiconductor light emitting device chip 45 shown in FIG. 3 , but using the semiconductor light emitting device chip shown in FIGS. 1 and 2 , the semiconductor light emitting device of the form shown in FIG. 4 is used. It is also possible to manufacture devices.

5 is a view showing an example of the LED display presented in Japanese Patent Laid-Open No. 1995-288341. Drawing symbols have been changed for convenience of explanation.

5 is a plan view 190 showing the structure of one pixel in the LED display. In the pixel structure, semiconductor light emitting device chips 54 , 55 , 56 are electrically connected to a conductor layer 51 formed on a PCB. The semiconductor light emitting device chip 54 emitting blue light is a lateral chip and is electrically connected to the conductor layer 51 through wire bonding and is adhered to the conductor layer 51 with an insulating adhesive 53 . The semiconductor light emitting device chips 55 and 56 emitting green and red light are vertical chips and are electrically connected to the conductive layer 51 through a conductive adhesive 57 and wire bonding. And it is surrounded by a cover part 52 to distinguish it from other adjacent pixels. Although not shown in the drawings, a sealing material covers the semiconductor light emitting device chips 54 , 55 , and 56 to protect the semiconductor light emitting device chips 54 , 55 , and 56 .

According to the trend of miniaturization and weight reduction, the size of the semiconductor light emitting device has become smaller. However, a semiconductor light emitting device using a mini or micro semiconductor light emitting device chip having a maximum side size of 300 μm or less has problems in the SMT process, such as short circuit and poor attachment, as the pad size and the spacing between the pads become smaller.

Accordingly, the present disclosure is to solve a problem in the SMT process in a semiconductor light emitting device using a mini or micro semiconductor light emitting device chip, and further to provide a semiconductor light emitting device suitable for a transparent display.

This will be described later in 'Specific Contents for Implementation of the Invention'.

Herein, a general summary of the present disclosure is provided, which should not be construed as limiting the scope of the present disclosure (This section provides a general summary of the disclosure and is not a comprehensive disclosure of its full scope or all of its features).

According to one aspect according to the present disclosure (According to one aspect of the present disclosure), there is provided a semiconductor light emitting device, comprising: a semiconductor light emitting device chip including a first electrode and a second electrode; a substrate including a plate on which an electrical connection and an electrical connection including a first electrical connection electrically connected to the first electrode and a second electrical connection electrically connected to the second electrode are formed; And, provided on the substrate, the first metal block comprising an upper surface electrically connected to the outside and a lower surface electrically connected to the first electrical connection, and an upper surface electrically connected to the outside and a second electrical connection electrically connected A semiconductor light emitting device is provided, including; a metal block including a second metal block including a lower surface, wherein the metal block has a height equal to or greater than that of the semiconductor light emitting device chip.

This will be described later in 'Specific Contents for Implementation of the Invention'.

1 is a view showing an example of a conventional semiconductor light emitting device chip;
2 is a view showing another example of the semiconductor light emitting device chip presented in US Patent No. 7,262,436;
3 is a view showing another example of the semiconductor light emitting device chip presented in US Patent No. 8,008,683;
4 is a view showing an example of a conventional semiconductor light emitting device;
5 is a view showing an example of the LED display presented in Japanese Patent Application Laid-Open No. 1995-288341;
6 is a view showing an example of a semiconductor light emitting device according to the present disclosure;
7 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
8 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
9 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
Figure 10 is a view for explaining in detail A of Figure 9 (b),
11 is a diagram illustrating examples of a pattern according to the present disclosure;
12 is a view showing an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure;
13 is a view showing another example of a method of manufacturing a semiconductor light emitting device according to the present disclosure;
14 is a view for explaining a Zener diode according to the present disclosure;
15 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
16 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
17 is a view showing another example of a method of manufacturing a semiconductor light emitting device according to the present disclosure;
18 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
19 is a view illustrating examples in which a semiconductor light emitting device according to the present disclosure is applied to a transparent substrate;

Hereinafter, the present disclosure will be described in detail with reference to the accompanying drawings (The present disclosure will now be described in detail with reference to the accompanying drawing(s)).

6 is a diagram illustrating an example of a semiconductor light emitting device according to the present disclosure.

FIG. 6(a) is a plan view of the semiconductor light emitting device 100, and FIG. 6(b) is a cross-section taken along line AA′ of FIG. 6(a).

The semiconductor light emitting device 100 includes at least one semiconductor light emitting device chip 110 , a plurality of pads 121 , an electrical connection 123 , and an encapsulant 150 .

At least one semiconductor light emitting device chip 110 includes a plurality of electrodes 111 .

The plurality of pads 121 are formed to be spaced apart from at least one semiconductor light emitting device chip 110 by a predetermined distance on a plane. The semiconductor light emitting device 100 is directly electrically connected to the outside through the pad 121 .

The plurality of pads 121 are not provided under at least one semiconductor light emitting device chip 110 . That is, a predetermined distance is formed between the plurality of pads 121 and at least one semiconductor light emitting device chip 110 . By forming a predetermined distance between the plurality of pads 121 and at least one semiconductor light emitting device chip 110 , the size of the pad 121 can be increased, and the interval between the pads 121 is increased to increase the SMT (Surface Mounting Technology: Surface). Mounted Technology), problems such as short circuits and poor attachment were solved. In addition, when devices constituting the semiconductor light emitting device 100 , such as the pad 121 and the semiconductor light emitting device chip 110 , occupying a certain area are provided apart from each other and applied to a transparent display, the semiconductor light emitting device 100 . ) can be made inconspicuous. Furthermore, light can be emitted through the gap between the pad 121 and the semiconductor light emitting device chip 110 , so that six-sided light emission is possible. In this case, the plurality of pads 121 respectively correspond to the plurality of electrodes 111 .

The electrical connection 123 is provided between the plurality of pads 121 and the plurality of electrodes 111 . The electrical connection 123 electrically connects the plurality of pads 121 and the plurality of electrodes 111 . In particular, the electrical connection 123 may be formed on the same plane as the pad 121 .

The electrical connection 123 is formed as a single line in FIG. 6( a ). When the electrical connection 123 is formed with a single line, if the electrical connection 123 is cut, there may be a problem that the semiconductor light emitting device chip 110 cannot be driven, and a solution thereof will be described with reference to FIG. 7 .

The encapsulant 150 covers at least one semiconductor light emitting device chip 110 . The light-transmitting encapsulant 150 , the semiconductor light emitting device chip 110 , and the pad 121 are formed to be spaced apart from each other, so that the present disclosure may be a semiconductor light emitting device capable of emitting light on six sides. A plurality of pads 121 and electrical connections 123 may protrude from the encapsulant 150 . A case in which the plurality of pads 121 and the electrical connection 123 are formed in the encapsulant 150 will be described with reference to FIG. 7 .

Preferably, the size of the pad 121 is greater than the size of the semiconductor light emitting device chip 110 , and a predetermined distance between the pad 121 and the semiconductor light emitting device chip 110 is greater than the size of the semiconductor light emitting device chip 110 . For example, the size of one semiconductor light emitting device chip 110 is a mini or micro semiconductor light emitting device chip with a maximum side size of 300 μm or less, and the size of one pad 121 has a maximum side size of 100 μm or more, and one The distance between the pad 121 and one semiconductor light emitting device chip 110 is 150 μm or more, and the size of the semiconductor light emitting device 100 is 300 μm or more.

7 is a diagram illustrating another example of a semiconductor light emitting device according to the present disclosure.

FIG. 7(a) is a plan view of the semiconductor light emitting device 100, and FIG. 7(b) is a cross-sectional view of the semiconductor light emitting device 100 of FIG. 7(a).

The electrical connection 123 forms a plurality of paths between the plurality of pads 121 and the plurality of electrodes 111 , respectively. Since the plurality of pads 121 and the plurality of electrodes 111 are electrically connected through a plurality of paths, even if one path is disconnected, the remaining paths between the plurality of pads 121 and the plurality of electrodes 111 are electrically connected to each other. is connected to Accordingly, when there is only one line as shown in FIG. 6( a ), the semiconductor light emitting device does not operate when one line is disconnected, but even if one line is disconnected, between the plurality of pads 121 and the plurality of electrodes 111 . Any one of the plurality of paths of the electrical connection 123 may be electrically connected to the . In addition, since the electrical connections 123 are spread thinly and widely without being dense, the back side of the semiconductor light emitting device 100 is more clearly visible.

The encapsulant 150 covers the electrical connection 123 , and at least a portion of the electrical connection 123 may be exposed. The encapsulant 150 may cover the plurality of pads 121 and at least a portion of the pads may be exposed.

The Zener diode 130 is provided to prevent a reverse voltage applied to at least one semiconductor light emitting device chip 110 . The Zener diode 130 is connected in parallel with the semiconductor light emitting device chip 110 , and when a reverse voltage is applied to the semiconductor light emitting device chip 110 , a current flows through the Zener diode 130 to the semiconductor light emitting device chip 110 . to protect

In addition, the Zener diode 130 has a plurality of Zener electrodes 131 , and one of the plurality of Zener electrodes 131 is in contact with a corresponding one of the plurality of pads 121 , and the plurality of Zener electrodes 131 . Among the electrodes 131 , the other Zener electrode 131 is electrically connected to at least one corresponding semiconductor light emitting device chip 110 in antiparallel. At this time, one of the plurality of Zener electrodes 131 may be connected to one of the plurality of electrodes 121 of the semiconductor light emitting device chip 110 and may be connected to one of the plurality of pads 121 , It may be connected to the electrical connection 123 . The Zener diode 130 will be described in detail with reference to FIG. 14 .

8 is a diagram illustrating still other examples of a semiconductor light emitting device according to the present disclosure.

8A is an example in which a plurality of paths are formed between the plurality of pads 121 and the plurality of electrodes 111 for the electrical connection 123 .

8 (b) is an example in which the electrical connection 123 is formed in a net shape. The pattern of the electrical connection 123 is an example of a hexagonal shape formed in a honeycomb shape. This is an example in which the pattern is formed in a certain size. In the net type, the back side of the semiconductor light emitting device 100 is more visible.

9 is a diagram illustrating still other examples of a semiconductor light emitting device according to the present disclosure.

FIG. 9A is a diagram illustrating an example of a semiconductor light emitting device 100 including a plurality of semiconductor light emitting device chips 110 according to the present disclosure.

At least one semiconductor light emitting device chip 110 includes a first semiconductor light emitting device chip 110 including a first electrode 111-1 and a second electrode 111-2, a third electrode 111-3, and The second semiconductor light emitting device chip 110 including the fourth electrode 111-4 and the third semiconductor light emitting device chip 110 including the fifth electrode 111-5 and the sixth electrode 111-6 may include. The first electrode 111-1 and the second electrode 111-2 of one semiconductor light emitting device chip 110 have different polarities. For example, the first electrode 111-1 of the first semiconductor light emitting device chip 110 may be a - electrode, and the second electrode 111-2 may be a + electrode. The third electrode 111-3 of the second semiconductor light emitting device chip 110 may be a - electrode, and the fourth electrode 111-4 may be a + electrode. The fifth electrode 111 - 5 of the third semiconductor light emitting device chip 110 may be a - electrode, and the sixth electrode 111 - 6 may be a + electrode.

The plurality of pads 121 includes a first pad 121-1, a second pad 121-2, a third pad 121-3, and a fourth pad 121-4. The first pad 121-1 is electrically connected to the first electrode 111-1, the third electrode 111-3, and the fifth electrode 111-5. The second pad 121 - 2 is electrically connected to the second electrode 111 - 2 . The third pad 121-3 is connected to the fourth electrode 111-4. The fourth pad 121-4 is connected to the sixth electrode 111-6. The first pad 121-1, the second pad 121-2, the third pad 121-3, and the fourth pad 121-4 may have different polarities. Although the second pad 121-2, the third pad 121-3, and the fourth pad 121-4 have the same polarity, the first semiconductor light emitting device chip 110, the second semiconductor light emitting device chip 110 and the fourth pad 121-4 have the same polarity. The third semiconductor light emitting device chip 110 is formed separately to control ON/OFF, respectively.

The electrical connection 123 includes a first electrical connection 123-1, a second electrical connection 123-2, a third electrical connection 123-3, and a fourth electrical connection 123-4. The first electrical connection 123-1 electrically connects the first pad 121-1 and the first electrode 111-1, the third electrode 111-3, and the fifth electrode 111-5. do. The second electrical connection 123 - 2 electrically connects the second pad 121 - 2 and the second electrode 111 - 2 . The third electrical connection 123-3 electrically connects the third pad 121-3 and the fourth electrode 111-4. The fourth electrical connection 123-4 electrically connects the fourth pad 121-4 and the sixth electrode 111-6.

The plurality of semiconductor light emitting device chips 110 may be turned on/off in various combinations to emit white light or various colors. The plurality of semiconductor light emitting device chips 110 are gathered in the center and provided in the semiconductor light emitting device 100, one semiconductor light emitting device chip 110; 110-1, 110-2, 110-3 and one pad 121; 121-1, 121 -2,121-3), a certain distance may be formed.

Since the plurality of semiconductor light emitting device chips 110 have to mix colors well to form one pixel, the plurality of semiconductor light emitting device chips 110 cannot but be provided in the center of the semiconductor light emitting device 100 . If the plurality of pads 121 are provided under the plurality of semiconductor light emitting device chips 110 and the plurality of pads 121 are subjected to the SMT process, there may be a problem that a plurality of nearby pads 121 may be short-circuited. . Therefore, in the present disclosure, which is characterized in that the electrical connection 123 is made between the plurality of pads 121 and the semiconductor light emitting device chip 110 , a plurality of mini or micro semiconductor light emitting device chips 110 are placed in the center as shown in FIG. 9 . It is more effective when grouped together.

9B is a diagram illustrating another example of the semiconductor light emitting device 100 including a plurality of semiconductor light emitting device chips 110 according to the present disclosure.

The electrical connection 123 formed of a single line described in FIG. 9( a ) may be formed in a net shape in order to solve the broken problem. The electrical connection 123 is formed to be thinner, and the total area where the electrical connection 123 is formed is formed to be wide. As described in FIG. 7 , in the electrical connection 123 , a plurality of paths are formed between the plurality of pads 121 and the plurality of electrodes 111 , so that even if a part of the thin electrical connection 123 is disconnected, the probability that a connected path exists is high. rises Accordingly, the probability that electricity does not pass through the semiconductor light emitting device chip 110 is reduced.

The electrical connection 123 may be formed to have a predetermined pattern. The electrical connection 123 may be formed in a net shape. The size of the pattern of the electrical connection 123 in contact with the plurality of pads 121 or the plurality of electrodes 111 is smaller than the size of the pattern not in contact with the plurality of pads 121 or the plurality of electrodes 111 . . The detailed reason will be described with reference to FIG. 10 .

The first electrical connection 123-1 to the fourth electrical connection 123-4 are formed in a net shape. The net shape is formed by connecting a plurality of patterns. The pattern may be formed in a figure, and examples of the pattern will be described with reference to FIG. 11 . The first electrical connection 123-1 to the fourth electrical connection 123-4 are formed in a net shape when the semiconductor light emitting device 100 is used in a transparent display, the electrical connection 123 of FIG. ), so that the back side of the semiconductor light emitting device 100 of FIG. 9(b) can be seen better than the back side of the semiconductor light emitting device 100 of FIG. 9(a).

FIG. 10 is a view for explaining in detail A of FIG. 9(b).

A third electrical connection 123-3 is positioned between the third pad 121-3 and the fourth electrode 111-4. The size of the pattern (a) in contact with the third pad 121-3 and the fourth electrode 111-4 among the third electrical connections 123-3 decreases. This is because more paths can be formed when the size of the pattern a contacting the third pad 121-3 and the fourth electrode 111-4 is reduced. Since the area of the third electrical connection 123-3 that can contact the third pad 121-3 and the fourth electrode 111-4 is limited, in order to form more paths, the third pad 121- 3) and the size of the pattern (a) in contact with the third electrode 111-3 may be smaller than that of the pattern (b) not in contact. Accordingly, the probability that the third electrical connection 123-3 between the first pad 121-1 and the third electrode 111-3 is disconnected can be reduced, and it is possible to reduce the probability that the third electrical connection 123-3 is disconnected. A plurality of paths may be formed in the connection 121 .

11 is a diagram illustrating examples of patterns according to the present disclosure.

The pattern may be formed in various shapes. 11(a)(b), it may be formed in various quadrilaterals, as in FIG. 11(c), in a hexagonal shape as in FIG. 11(d), and as in a triangular shape as in FIG. 11(e). The shape of the pattern is not limited to the illustrated drawings.

12 is a diagram illustrating an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.

In the method of manufacturing the semiconductor light emitting device 100 including at least one semiconductor light emitting device chip 110 , first, a substrate 140 is prepared as shown in FIG. 12A . The semiconductor light emitting device chip 110 is temporarily fixed to the substrate 140 thereafter, and may be, for example, a silicon tape or the like. The substrate 140 is not electrically connected to the semiconductor light emitting device chip 110 .

Thereafter, at least one semiconductor light emitting device chip 110 is provided on the substrate 140 as shown in FIG. 12B . In this case, although not shown, a Zener diode 130 (refer to FIG. 7 ) may be provided on the substrate 140 . The Zener diode 130 may be provided to correspond to the at least one semiconductor light emitting device chip 110 , and the Zener diode 130 may be provided to be separated from the at least one semiconductor light emitting device chip 110 by a predetermined distance.

Thereafter, the encapsulant 150 is provided on the substrate 140 and at least one semiconductor light emitting device chip 110 as shown in FIG. 12C . The semiconductor light emitting device chip 110 may be fixed by covering the encapsulant 150 on the substrate 140 .

Thereafter, the substrate 140 is removed as shown in FIG. 12( d ). Since it is a configuration for temporarily fixing the semiconductor light emitting device chip 110 , it can be removed.

Thereafter, as shown in FIG. 12( e ), a plurality of pads 121 and a plurality of pads 121 spaced apart from the semiconductor light emitting device chip 110 by a predetermined distance in the encapsulant 150 , and at least one semiconductor light emitting device chip 110 . An electrical connection 123 connecting them is formed. After the encapsulant 150 is formed, since a plurality of pads 121 and electrical connections 123 are formed under the semiconductor light emitting device chip 110 and the encapsulant 150 , a plurality of pads 121 and electrical connections 123 are formed. The silver protrudes from the encapsulant 150 . Since the plurality of pads 121 and the electrical connection 123 are formed on one surface of the encapsulant 150 by a method such as deposition, the plurality of pads 121 and the electrical connection 123 are provided on the same plane.

13 is a diagram illustrating another example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.

In the method of manufacturing the semiconductor light emitting device 100 including at least one semiconductor light emitting device chip 110 , first, a substrate 140 is prepared as shown in FIG. 13A . The semiconductor light emitting device chip 110 is temporarily fixed to the substrate 140 thereafter, and may be, for example, a silicon tape or the like. The substrate 140 is not electrically connected to the semiconductor light emitting device chip 110 .

Thereafter, as shown in FIG. 13B , a plurality of pads 121 and a plurality of pads 121 separated from at least one semiconductor light emitting device chip 110 and at least one semiconductor light emitting device chip ( 110) to form an electrical connection 123 that connects them. Since the plurality of pads 121 and the electrical connection 123 are formed on one surface of the substrate 140 by a method such as deposition, the plurality of pads 121 and the electrical connection 123 are provided on the same plane.

Thereafter, at least one semiconductor light emitting device chip 110 is provided on the substrate 140 as shown in FIG. 13C . The semiconductor light emitting device chip 110 may be positioned so as to be in contact with the electrical connection 123 . At this time, although not shown, at least one semiconductor light emitting device chip 110 and corresponding Zener diode 130 may be provided on the plurality of pads 121 .

Thereafter, the encapsulant 150 is provided on the substrate 140 and at least one semiconductor light emitting device chip 110 as shown in FIG. 13D .

Thereafter, the substrate 140 is removed as shown in FIG. 13(e). Since the encapsulant 150 is covered after the plurality of pads 121 and the electrical connection 123 are formed, the plurality of pads 121 and the electrical connection 123 are provided in the encapsulant 150 , and the substrate 140 . When removing , only one surface of the plurality of pads 121 and the electrical connection 123 that has been in contact with the substrate 140 is exposed.

The plurality of pads 121 and the electrical connection 123 are preferably provided in the encapsulant 150 . Because, as shown in FIG. 12( e ), when the plurality of pads 121 and the electrical connection 123 protrude out of the encapsulant 150 , the adhesive force between the encapsulant 150 and the plurality of pads 121 and the electrical connection 123 . This is because they are so weak that they can be separated from each other.

14 is a view for explaining a Zener diode according to the present disclosure.

14A is a diagram illustrating an example in which a Zener diode is mounted in a conventional semiconductor light emitting device.

A hole (H) is provided in the PCB substrate (240), and an electrical connection is formed along the hole (H) while forming the pad (221) provided under the PCB substrate (240), to the upper surface of the PCB substrate (240) An electrical connection is formed so as to protrude. The pad electrode 223 is formed on the upper surface of the PCB substrate 240 so as to be connected to the pad 221 , and the pad electrode 223 is also formed to protrude by the protruding electrical connection. Therefore, when the Zener electrode 131 of the Zener diode 130 is attached to the pad electrode 223 , a gap is created, and the Zener diode 130 is easily detached. Therefore, although not shown, the Zener diode 130 is provided at a portion other than the pad electrode 223 to avoid the hole H, and the Zener diode 130 is provided at a position that does not overlap the pad 221 .

FIG. 14(b) is a view showing a cross section BB′ of FIG. 7 .

One of the Zener electrodes 131 of the Zener diode 130 is in contact with one pad 121 . This is a possible structure in the present disclosure because the pad 121 is formed flat without the hole H (FIG. 14(a)) and the pad electrode 223 (FIG. 14(a)).

The pad 121 and the Zener diode 130 are configured to increase the optical loss, and the pad 121 is formed to be flat so that the Zener diode 130 can be positioned within the pad 121 on a planar view. It is formed so that the area of the zener diode 130 overlaps with the area of the zener diode 130, so that light loss can be reduced. In addition, when applied to a transparent display, since many portions of the pad 121 and the Zener diode 130 overlap, the transparency of the semiconductor light emitting device 100 can be increased.

15 is a diagram illustrating another example of a semiconductor light emitting device according to the present disclosure.

15A is a bottom view illustrating a lower surface of the semiconductor light emitting device 100 , and is an example in which one semiconductor light emitting device chip 110 is provided in the semiconductor light emitting device 100 . Fig. 15(b) is a view showing a cross section AA' of Fig. 15(a).

The semiconductor light emitting device 100 may include an insulating layer 160 that covers the electrical connection 123 and exposes the plurality of pads 121 . It is possible to reduce the risk of a short circuit during soldering by covering the electrical connection 123 with the insulating layer 160 . Although the example in which the electrical connection 123 and the pad 121 are provided inside the encapsulant 150 is shown, it can also be applied to an example in which the electrical connection 123 and the pad 121 protrude from the encapsulant 150 . The insulating layer 160 may be formed using a method such as silk screen printing after FIGS. 12(e) and 13(e).

The height h of the insulating layer 160 is preferably formed to be 10 μm or less. Since the insulating layer 160 is formed so that the plurality of pads 121 are exposed after FIG. 12E or 13E , the plurality of pads 121 may be formed lower than the insulating layer 160 . When electrically connected to the outside by soldering, the height h of the insulating layer 160 is preferably as thin as 10 μm or less in order for the solder material to contact the plurality of pads 121 well. Alternatively, after the formation of the insulating layer 160 , the heights of the plurality of pads 121 may be raised to the same as the dotted line 122 by plating or the like to be equal to or higher than the height h of the insulating layer 160 .

The insulating layer 160 may be formed of at least one of a transparent material or an opaque material. When the insulating layer 160 is formed of a transparent material, the semiconductor light emitting device 100 may emit light on six sides. On the other hand, when the insulating layer 160 is formed of an opaque material, the semiconductor light emitting device 100 may emit light on five sides. When applied to a transparent display, it is sometimes necessary to prevent light from emitting to the back side. Accordingly, the insulating layer 160 may be formed of an opaque material. However, for example, if the size of the semiconductor light emitting device is 500umX500um or less, even if the insulating layer is opaque, the semiconductor light emitting device is not easily recognized, but as in the present disclosure, the gap between the pad and the semiconductor light emitting device chip is changed to prevent the semiconductor light emitting device 100 When the size is larger than the conventional one (eg, a semiconductor light emitting device having a size of 1500 umX1500 um), the semiconductor light emitting device 100 may be easily recognized. In order to solve this problem, only the portion 170 indicated by the dotted line in FIG. 15(a) of the insulating layer 160 under the semiconductor light emitting device chip 110 is formed of an opaque material, and the remaining portion is formed of a transparent material. can In this case, the light emitted from the semiconductor light emitting device chip 110 is prevented from going down the semiconductor light emitting device 100 and the remaining portion is transparent, so that even when the size of the semiconductor light emitting device is increased according to the present disclosure, the light from the semiconductor light emitting device is moved downward. It can be applied to transparent displays where light does not need to go out. In this case, the size of the portion 170 indicated by the dotted line is preferably 300 μm or less.

15( c ) is a bottom view illustrating a lower surface of the semiconductor light emitting device 100 , and is an example in which the semiconductor light emitting device 100 is provided with a plurality of semiconductor light emitting device chips 110 . Fig. 15(d) is a view showing a cross section BB' of Fig. 15(c).

15(a) and 15(b) may be applied to FIGS. 15(c) and 15(d).

16 is a diagram illustrating another example of a semiconductor light emitting device according to the present disclosure.

The semiconductor light emitting device 200 includes a semiconductor light emitting device chip 210 , a substrate 230 , a metal block 250 , and an encapsulant 270 .

The semiconductor light emitting device chip 210 emits light, and the size of the semiconductor light emitting device chip 210 is 300 μm or less in the case of a mini LED and 100 μm or less in the case of a micro LED, and a semiconductor light emitting device chip having the same size ( 210) is preferably a mini LED, a micro LED, or the like. The semiconductor light emitting device chip 210 may be a flip chip. In a flip chip, which is an example of the semiconductor light emitting device chip 210 , light may mainly exit in the direction of the top surface of the flip chip.

The substrate 230 includes a plate 231 and electrical connections 232 . The plate 231 may be formed of a light-transmitting material. For example, the plate 231 may be formed of glass, sapphire, or the like. The electrical connection 232 may be provided by being deposited on the plate 231 . The electrical connection 232 electrically connects the semiconductor light emitting device chip 210 and the metal block 250 .

In the case of the semiconductor light emitting device 100 described up to FIG. 15 , the encapsulant 150 and the electrical connection 123 are in direct contact. When the semiconductor light emitting device 100 is attached to the external substrate through soldering, there is a problem in that the precision of the encapsulant 150 and the electrical connection 123 decreases due to heat. In addition, there is a problem in that the degree of expansion and contraction of the encapsulant 150 and the electrical connection 123 is large, and the electrical connection 123 is cut off because the thickness of the electrical connection 123 is thin. In order to solve this problem, an electrical connection 232 is provided on the plate 231, and the plate 231 has a small deformation rate due to heat, so that it is possible to solve the above problems, simplify the process, and secure reliability.

The metal block 250 is provided on the substrate 230 , and the metal block 250 is electrically connected to the outside. The metal block 250 includes an upper surface 250 - 1 in contact with the outside, and the metal block 250 includes a lower surface 250 - 2 in contact with the electrical connection 232 . The metal block 250 may be formed in the shape of a column, for example, it may be formed in a cylinder, a square pillar, or the like. The shape of the metal block 250 is partially exposed so as to be electrically connected to the outside, and is not limited as long as it can be electrically connected to the electric connection 232 .

The height h2 of the metal block 250 may be formed to be greater than or equal to the height h1 of the semiconductor light emitting device chip 210 . The height h2 of the metal block 250 is formed to be greater than the height h1 of the semiconductor light emitting device chip 210 so that the semiconductor light emitting device 200 is electrically connected to the upper surface direction of the semiconductor light emitting device chip 210 . have. The height h2 of the metal block 250 may be the same as the height h1 of the semiconductor light emitting device chip 210 . When the height h2 of the metal block 250 and the height h1 of the semiconductor light emitting device chip 210 are the same, the top surface 250 - 1 of the metal block 250 is exposed, so that The upper surface (not shown) may also be exposed. Then, there is a disadvantage that the semiconductor light emitting device chip 210 is not completely protected from the outside. When the top surface of the semiconductor light emitting device chip 210 is exposed, it may be adversely affected by external physical shocks and electrical ESD (Electro Static Discharge), and moisture, etc. may penetrate and cause defects such as discoloration. Accordingly, the height h2 of the metal block 250 is preferably higher than the height h1 of the semiconductor light emitting device chip 210 .

The encapsulant 270 may cover the semiconductor light emitting device chip 210 and the substrate 230 , and surround the metal block 250 so that the upper surface 250 - 1 of the metal block 250 is exposed. The encapsulant 270 may shrink while curing. The plate 231 of the substrate 230 is preferably formed of, for example, a material that is less easily bent than a silicone tape. This is because, when the substrate 230 is bent due to the contracting force of the encapsulant 270 , the semiconductor light emitting device 200 may be broken or bent.

The semiconductor light emitting device chip 210 includes a first electrode 211 and a second electrode 212 .

The electrical connection 232 includes a first electrical connection 232-1 and a second electrical connection 232-2. The first electrical connection 232 - 1 is electrically connected to the first electrode 211 of the semiconductor light emitting device chip 210 , and the second electrical connection 232 - 2 is the second electrical connection of the semiconductor light emitting device chip 210 . It is electrically connected to the electrode 212 .

The metal block 250 includes a first metal block 251 and a second metal block 252 . The first metal block 251 is electrically connected to the first electrical connection 232-1. The second metal block 252 is electrically connected to the second electrical connection 232 - 2 . The first metal block 251 and the second metal block 252 may have the same height h2.

The first electrical connection 232-1 includes a first contact portion 233-1, a first pad 234-1, and a first connection portion 235-1.

The first contact portion 233 - 1 is in contact with the first electrode 211 of the semiconductor light emitting device chip 210 , and the first pad 234 - 1 is in contact with the first metal block 251 .

The first connection part 235 - 1 is provided between the first contact part 233 - 1 and the first pad 234 - 1 and connects between the first contact part 233 - 1 and the first pad 234 - 1 . electrically connect. A predetermined distance s is preferably formed between the first contact portion 233 - 1 and the first pad 234 - 1 . For six-sided light emission, light should be emitted toward the lower surface of the semiconductor light emitting device chip 210. If a predetermined distance is not formed between the first contact portion 233-1 and the first pad 234-1, the light is emitted from the semiconductor. It is difficult to go out in the direction of the lower surface of the element chip 210 . Accordingly, the first connection part 235 - 1 may be formed in a net shape. The first connection part 235 - 1 may have various patterns as shown in FIG. 11 .

The second electrical connection 232 - 2 includes a second contact portion 233 - 2 , a second pad 234 - 2 , and a second connection portion 235 - 2 .

The second contact portion 233 - 2 contacts the second electrode 212 of the semiconductor light emitting device chip 210 , and the second pad 234 - 2 contacts the second metal block 252 .

The second connection part 235 - 2 is provided between the second contact part 233 - 2 and the second pad 234 - 2 to electrically connect the second contact part 233 - 2 and the second pad 234 - 2 . connect to A predetermined distance s is preferably formed between the second contact portion 233 - 2 and the second pad 234 - 2 . For 6-sided light emission, light should also be emitted in the direction of the lower surface of the semiconductor light emitting device chip 210. If a predetermined distance s is not formed between the second contact portion 233-2 and the second pad 234-2, It is difficult for light to go out toward the lower surface of the semiconductor light emitting device chip 210 . Accordingly, the second connection part 235 - 2 may be formed in a net shape. The second connection part 235 - 2 may have various patterns as shown in FIG. 11 .

The first electrical connection 232-1 has a plurality of paths between the first electrode 211 and the first metal block 251, and the second electrical connection 232-2 is connected to the second electrode 212 and the second electrode 212. A plurality of paths may be formed between the two metal blocks 252 . That is, the first connection part 232-1 and the second connection part 232-2 are formed between the first contact part 232-1 and the first pad 234-1 and between the second contact part 233-2 and the second connection part 232-2. A plurality of paths may be connected between the two pads 234 - 2 . In this case, the first connection part 232-1 and the second connection part 232-2 may form a space through which light can pass.

The first pad 234-1 and the second pad 234-2 may be formed as passages electrically connected to the outside, and the first pad 234-1 and the second pad 234-2 are shown in FIG. It may have the characteristics of the pad 121 of 6.

17 is a diagram illustrating another example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.

First, a substrate 230 is prepared as shown in FIG. 17A . The substrate 230 may prepare a plate 231 and form an electrical connection 232 to the plate 231 . Electrical connections 232 may be deposited. The electrical connection 232 includes a first electrical connection 232-1 and a second electrical connection 232-2.

Thereafter, as shown in FIG. 17B , the semiconductor light emitting device chip 210 and the metal block 250 are provided on the substrate 230 . The semiconductor light emitting device chip 210 includes a first electrode 211 and a second electrode 212 . The first electrode 211 is electrically connected to the first electrical connection 232-1, and the second electrode 212 is electrically connected to the second electrical connection 232-2.

Regardless of the area of the lower surfaces 251-2 and 252-2 of the first metal block 251 and the second metal block 252, the first pad 234-1 and the second pad 234-2 and the first metal The block 251 and the second metal block 252 only need to be electrically connected.

Thereafter, as shown in FIG. 17( c ), the first metal block 251 and the second metal block 252 except for the upper surfaces 251-1 and 252-1 of the first metal block 251 and the second metal block 252 . ) to cover the encapsulant 270 to surround the periphery. The encapsulant 270 covers upper surfaces of the semiconductor light emitting device chip 210 and the substrate 230 .

18 is a diagram illustrating another example of a semiconductor light emitting device according to the present disclosure.

The semiconductor light emitting device 200 includes a plurality of semiconductor light emitting device chips 210 . The plurality of semiconductor light emitting device chips 210 may emit red light, green light, and blue light, respectively. The plurality of semiconductor light emitting device chips 210 includes a first semiconductor light emitting device chip 210 - 1 , a second semiconductor light emitting device chip 210 - 2 , and a third semiconductor light emitting device chip 210 - 3 . The first semiconductor light emitting device chip 210 - 1 includes a first electrode 211 and a second electrode 212 , and the second semiconductor light emitting device chip 210 - 2 includes a third electrode 213 and a fourth electrode 212 . The electrode 214 is included, and the third semiconductor light emitting device chip 210 - 3 includes a fifth electrode 215 and a sixth electrode 216 .

The metal block 250 includes a first metal block 251 , a second metal block 252 , a third metal block 253 , and a fourth metal block 254 . The first metal block 251 , the third metal block 253 , and the fourth metal block 254 , and the second metal block 252 may have different polarities. The reason why four metal blocks 250 are provided is to control the first semiconductor light emitting device chip 210-1, the second semiconductor light emitting device chip 210-2, and the third semiconductor light emitting device chip 210-3, respectively. to do For example, the second metal block 252 may be used as a common electrode.

The electrical connection 232 (FIG. 16) includes a first electrical connection 232-1, a second electrical connection 232-2, a third electrical connection 232-3, and a fourth electrical connection 232-4. can do.

The first electrical connection 232-1 may include a first contact portion 233-1, a first pad 234-1, and a first connection portion 235-1. The second electrical connection 232-1 includes a second contact portion 233-2, a fourth contact portion 233-4 and a sixth contact portion 233-6, a second pad 234-2, and a second connection portion ( 235-2). The third electrical connection 232-3 includes a third contact portion 233-3, a third pad 234-3, and a third connection portion 235-3, and the fourth electrical connection 232-4 is It may include a fourth contact portion 233 - 4 , a fourth pad 234 - 4 , and a fourth connection portion 235 - 4 .

The first contact portion 233 - 1 is in contact with the first electrode 211 and is electrically connected to the first electrode 211 . The second contact portion 233 - 2 is in contact with the second electrode 212 and is electrically connected. The third contact portion 233 - 3 contacts the third electrode 213 and is electrically connected to each other. The fourth contact portion 233 - 4 is in contact with the fourth electrode 214 and is electrically connected. The fifth contact portion 233 - 5 is in contact with the fifth electrode 215 and is electrically connected. The sixth contact portion 233 - 6 is in contact with the sixth electrode 216 and is electrically connected.

The first pad 234 - 1 contacts the first metal block 251 and is electrically connected. The second pad 234 - 2 contacts the second metal block 252 and is electrically connected. The third pad 234 - 3 contacts the third metal block 253 and is electrically connected. The fourth pad 234 - 4 contacts the fourth metal block 254 and is electrically connected.

The first connection part 235 - 1 is provided between the first contact part 233 - 1 and the first pad 234 - 1 and electrically connects them. The second connection part 235-2 is provided between the second contact part 233-2, the fourth contact part 233-4, and the sixth contact part 233-6 and the second pad 234-2, and is disposed between the second contact part 233-2, the fourth contact part 233-4, and the sixth contact part 233-6 and the second pad 234-2. electrically connect to The third connection part 235 - 3 is provided between the third contact part 233 - 3 and the third pad 234 - 3 and electrically connects them. The fourth connection part 235 - 4 is provided between the fifth contact part 233 - 4 and the fourth pad 234 - 4 and electrically connects them.

The semiconductor light emitting device 200 may further include a Zener diode z. The Zener diode z has been described in detail with reference to FIG. 7 . The Zener diode z may be electrically connected to the first electrical connection 232-1 and the second electrical connection 232-2. Zener pads z1 and z2 contacting the Zener diode z may be provided in the first electrical connection 232-1 and the second electrical connection 232-2, respectively. Although not shown, the Zener diode (z) other than the third electrical connection (232-3), the second electrical connection (232-2) and the fourth electrical connection (232-4), the second electrical connection (232-2) It may also be provided in between.

In FIG. 8 , the Zener diode 130 was in contact with the pad 121 , and the pad 121 and the electrical connection 123 were provided on the same plane to have a possible structure. In the present invention, since the metal block 250 provided on the pad 234 has a height h2 (FIG. 16), the metal block 250 is not provided on the same plane, and therefore the first electrical connection provided on the same plane. 232-1, the third electrical connection 232-3, the fourth electrical connection 232-4, and the second electrical connection 232-2 may be electrically connected.

19 is a view illustrating examples in which the semiconductor light emitting device according to the present disclosure is applied to a transparent substrate.

The semiconductor light emitting device chips 110 and 210 of FIGS. 19A and 19B are formed of a flip chip, and in the case of the flip chip, most of the light exits to the top surface of the semiconductor light emitting device chips 110 and 210 in the drawing.

Although some of the light from the semiconductor light emitting device 100 of FIG. 19 ( a ) goes out in the direction of the transparent substrate 290 , most of the light is directed toward the top surface of the semiconductor light emitting device chip 110 in the opposite direction to the transparent substrate 290 . can go out to The transparent substrate may be a transparent PCB (an example).

The semiconductor light emitting device 200 of FIG. 19(b) is electrically connected to the transparent substrate 290 through the upper surface 250-1 of the metal block 250, and most of the light of the semiconductor light emitting device 200 is transparent. It may go out toward the substrate 290 .

Since the plate 231 of the semiconductor light emitting device 100 may be made of glass or sapphire, it is difficult to directly electrically connect to the transparent substrate 290 . If the plate 231 of the semiconductor light emitting device 200 is to be attached to the transparent substrate 290 as shown in FIG. 19( a ), an electrical connection is formed on the upper and lower surfaces of the plate 231 , and a gap between the electrical connections is formed. You need a hole to connect. In order to form a hole, a laser drilling process is required, and the laser drilling process has a high equipment cost and a long process time, which causes an increase in process cost. In order to reduce cost and time, it may be electrically connected to the transparent substrate 290 by using the metal electrode 250 as shown in FIG. 19(b) without a hole.

Hereinafter, various embodiments of the present disclosure will be described.

(1) A semiconductor light emitting device comprising: a semiconductor light emitting device chip including a first electrode and a second electrode; a substrate including a plate on which an electrical connection and an electrical connection including a first electrical connection electrically connected to the first electrode and a second electrical connection electrically connected to the second electrode are formed; And, provided on the substrate, the first metal block comprising an upper surface electrically connected to the outside and a lower surface electrically connected to the first electrical connection, and an upper surface electrically connected to the outside and a second electrical connection electrically connected A semiconductor light emitting device including; a metal block including a second metal block including a lower surface, wherein the metal block has a height equal to or greater than that of the semiconductor light emitting device chip.

(2) A semiconductor light emitting device in which a distance greater than a certain distance is formed between the semiconductor light emitting device chip and the metal block.

(3) The substrate is a transparent semiconductor light emitting device.

(4) The plate is formed of a transparent material, and the electrical connection is a semiconductor light emitting device formed to have a plurality of paths.

(5) an encapsulant covering the first metal block and the second metal block so that the upper surface of the first metal block and the upper surface of the second metal block are exposed, and covering the semiconductor light emitting device chip and the substrate; A semiconductor light emitting device further comprising a.

(6) The first electrical connection includes a first contact portion contacting the first electrode, a first pad contacting the first metal block, and a first connection portion electrically connecting the first contact portion and the first pad, The second electrical connection includes a second contact portion contacting the second electrode, a second pad contacting the second metal block, and a second connection portion electrically connecting the second contact portion and the second pad, and the first pad includes the first pad. A semiconductor light emitting device provided under the first metal block, and the second pad is provided under the second metal block.

(7) A semiconductor light emitting device in which the first connecting portion and the second connecting portion are formed in a net shape.

(8) a second semiconductor light emitting device including a third electrode and a fourth electrode; and a third semiconductor light emitting device including a fifth electrode and a sixth electrode, wherein the metal block further includes a third metal block and a fourth metal block, and the first metal block is electrically connected to the first electrode , the second metal block is electrically connected to the second electrode, the fourth electrode, and the sixth electrode, the third metal block is electrically connected to the third electrode, and the fourth metal block is electrically connected to the fifth electrode connected to, and the electrical connection is a first electrical connection formed between the first metal block and the first electrode, a second electrical connection formed between the second metal block and the second electrode, the fourth electrode and the sixth electrode, the second A semiconductor light emitting device comprising a third electrical connection formed between the third metal block and the third electrode and a fourth electrical connection formed between the fourth metal block and the fifth electrode.

(9) The electrical connection connects the semiconductor light emitting device chip and the metal block, and the semiconductor light emitting device connects the semiconductor light emitting device chip and the metal block through a plurality of paths.

According to one semiconductor light emitting device according to the present disclosure, six-sided light emission is possible.

According to another semiconductor light emitting device according to the present disclosure, a metal block connected to the outside is provided in a direction in which light of the semiconductor light emitting device chip exits.

According to the method of manufacturing another semiconductor light emitting device according to the present disclosure, it is possible to manufacture a semiconductor light emitting device without warpage.

200: semiconductor light emitting device
210: semiconductor light emitting device chip 210-1: first semiconductor light emitting device chip
210-2: second semiconductor light emitting device chip 210-3: third semiconductor light emitting device chip
211: first electrode 212: second electrode 213: third electrode
214: fourth electrode 215: fifth electrode 216: sixth electrode
230: substrate 231: plate
232: electrical connection 232-1: first electrical connection 232-2: second electrical connection
232-3: third electrical connection 232-4: fourth electrical connection
233: contact portion 233-1: first contact portion 233-2: second contact portion
233-3: third contact portion 233-4: fourth contact portion 233-5: fifth contact portion
233-6: sixth contact part
234: pad 234-1: first pad 234-2: second pad
234-3: third pad 234-4: fourth pad
235: connection part 235-1: first connection part 235-2: second connection part
235-3: third connection part 235-4: fourth connection part
250: metal block 250: first metal block 251: second metal block
253: third metal block 254: fourth metal block 270: encapsulant
h1: height of semiconductor light emitting device chip h2: height of metal block
z: zener diode s: fixed distance z1, z2: zener pad

Claims (9)

In the semiconductor light emitting device,
a semiconductor light emitting device chip including a first electrode and a second electrode;
a substrate including a plate on which an electrical connection and an electrical connection including a first electrical connection electrically connected to the first electrode and a second electrical connection electrically connected to the second electrode are formed; And,
A first metal block provided on the substrate and including an upper surface electrically connected to the outside and a lower surface electrically connected to the first electrical connection, and an upper surface electrically connected to the outside and a lower surface electrically connected to the second electrical connection A metal block including a second metal block including
The height of the metal block is greater than the height of the semiconductor light emitting device chip,
The semiconductor light emitting device further comprising a; encapsulant covering the first metal block and the second metal block so that the top surface of the first metal block and the top surface of the second metal block are exposed, and covering the semiconductor light emitting device chip and the substrate. The method according to claim 1,
A semiconductor light emitting device in which a distance of more than a certain distance is formed between a semiconductor light emitting device chip and a metal block. The method according to claim 1,
The substrate is a transparent semiconductor light emitting device. 4. The method according to claim 3,
The plate is formed of a transparent material,
The electrical connection is a semiconductor light emitting device formed to have a plurality of paths. delete The method according to claim 1,
The first electrical connection includes a first contact portion contacting the first electrode, a first pad contacting the first metal block, and a first connection portion electrically connecting the first contact portion and the first pad,
The second electrical connection includes a second contact portion contacting the second electrode, a second pad contacting the second metal block, and a second connection portion electrically connecting the second contact portion and the second pad,
The first pad is provided under the first metal block,
The second pad is a semiconductor light emitting device provided under the second metal block. 7. The method of claim 6,
A semiconductor light emitting device in which the first connecting portion and the second connecting portion are formed in a net shape. The method according to claim 1,
a second semiconductor light emitting device including a third electrode and a fourth electrode; And,
A third semiconductor light emitting device including a fifth electrode and a sixth electrode; further comprising,
The metal block further includes a third metal block and a fourth metal block,
The first metal block is electrically connected to the first electrode, the second metal block is electrically connected to the second electrode, the fourth electrode, and the sixth electrode, and the third metal block is electrically connected to the third electrode, The fourth metal block is electrically connected to the fifth electrode,
The electrical connection includes a first electrical connection formed between the first metal block and the first electrode, a second electrical connection formed between the second metal block and the second electrode, the fourth electrode and the sixth electrode, a third metal block, and A semiconductor light emitting device comprising a third electrical connection formed between the third electrodes and a fourth electrical connection formed between the fourth metal block and the fifth electrode. The method according to claim 1,
The electrical connection connects between the semiconductor light emitting device chip and the metal block, and the semiconductor light emitting device connects between the semiconductor light emitting device chip and the metal block through a plurality of paths.

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