KR102161006B1 - Semiconductor light emitting device and method for manufacturing the same - Google Patents

Abstract

The present disclosure provides a semiconductor light emitting device comprising: at least one semiconductor light emitting device chip including a plurality of electrodes; A plurality of pads respectively corresponding to the plurality of electrodes apart from a plurality of electrodes of at least one semiconductor light emitting device chip on a plane; An electrical connection provided on the same plane as the plurality of pads and electrically connecting the plurality of pads and the plurality of electrodes, respectively; And, it relates to a semiconductor light emitting device comprising a; an encapsulant covering at least one semiconductor light emitting device chip.

Description

A semiconductor light emitting device and a method of manufacturing the same {SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME}

The present disclosure generally relates to a semiconductor light emitting device and a method of manufacturing the same, and in particular, to a semiconductor light emitting device having a low probability of disconnection and a method of manufacturing the same.

Here, a background technology related to the present disclosure is provided, and these do not necessarily mean a known technology (This section provides background information related to the present disclosure which is not necessarily prior art). In addition, in the present specification, direction indications such as top/bottom and top/bottom are based on the drawings.

1 is a diagram illustrating an example of a conventional semiconductor light emitting device chip.

The semiconductor light emitting device chip includes a growth substrate 10 (e.g., a sapphire substrate), a buffer layer 20 on the growth substrate 10, a first semiconductor layer 30 having a first conductivity (e.g., an n-type GaN layer), and electrons. An active layer 40 generating light through recombination of holes (eg: INGaN/(In)GaN MQWs), a second semiconductor layer 50 having a second conductivity different from the first conductivity (eg, a p-type GaN layer) sequentially A translucent conductive film 60 for current diffusion and an electrode 70 serving as a pad are formed thereon, and an electrode serving as a pad on the exposed first semiconductor layer 30 by etching ( 80: Example: Cr/Ni/Au laminated metal pad) is formed. The semiconductor light emitting device of the shape as shown in FIG. 1 is specifically referred to as a lateral chip. Here, when the growth substrate 10 side is electrically connected to the outside, it becomes a mounting surface. In the present specification, the semiconductor light emitting device chip or the exterior to which the semiconductor light emitting device is electrically connected means a printed circuit board (PCB), a submount, a thin film transistor (TFT), and the like.

2 is a view showing another example of a semiconductor light emitting device chip disclosed in US Patent Publication No. 7,262,436. For convenience of explanation, the reference numerals have been changed.

The semiconductor light emitting device chip includes a growth substrate 10, a first semiconductor layer 30 having a first conductivity on the growth substrate 10, an active layer 40 generating light through recombination of electrons and holes, and a first conductivity. A second semiconductor layer 50 having a second conductivity different from that is sequentially deposited, and a three-layered electrode film 90, 91, 92 for reflecting light toward the growth substrate 10 is formed thereon. have. The first electrode layer 90 may be an Ag reflective layer, the second electrode layer 91 may be a Ni diffusion barrier layer, and the third electrode layer 92 may be an Au bonding layer. An electrode 80 serving as a pad is formed on the first semiconductor layer 30 exposed by etching. Here, when the electrode film 92 side is electrically connected to the outside, it becomes a mounting surface. The semiconductor light emitting device chip of the shape as shown in FIG. 2 is specifically referred to as a flip chip. In the case of the flip chip shown in FIG. 2, the electrode 80 formed on the first semiconductor layer 30 is at a lower height than the electrode films 90, 91, and 92 formed on the second semiconductor layer, but may be formed at the same height. You can also do it. Here, the standard of the height may be the height from the growth substrate 10.

3 is a view showing another example of a semiconductor light emitting device chip disclosed in US Patent Publication No. 8,008,683. For convenience of explanation, the reference numerals have been changed.

The semiconductor light emitting device chip includes a first semiconductor layer 30 having a first conductivity, an active layer 40 generating light through recombination of electrons and holes, and a second semiconductor layer 50 having a second conductivity different from the first conductivity. ) Are sequentially formed, and supply current to the upper electrode 31 and the second semiconductor layer 50 formed on the side from which the growth substrate is removed, and a support substrate (for supporting the semiconductor layers 30, 40, 50) ( 51), and a lower electrode 52 formed on the support substrate 51. The upper electrode 31 is electrically connected to the outside using wire bonding. When the lower electrode 52 side is electrically connected to the outside, it functions as a mounting surface. As shown in FIG. 3, a semiconductor light emitting device chip having a structure in which one electrode 31 and 52 is disposed above and below the active layer 40 is referred to as a vertical chip.

4 is a diagram illustrating an example of a conventional semiconductor light emitting device.

The semiconductor light emitting device 100 includes a lead frame 110 and 120 functioning as a pad, a mold 130, and a vertical type light emitting device chip 150 in the cavity 140, The cavity 140 is filled with an encapsulant 170 containing a wavelength converting material 160. The lower surface of the vertical semiconductor light emitting device chip 150 is electrically directly connected to the lead frame 110, and the upper surface is electrically connected to the lead frame 120 by a wire 180. Part of the light emitted from the vertical semiconductor light emitting device chip 150 excites the wavelength converter 160 to generate light of different colors, and two different lights may be mixed to produce white light. For example, the semiconductor light emitting device chip 150 produces blue light, and the light generated by excitation by the wavelength converter 160 is yellow light, and blue light and yellow light are mixed to produce white light. FIG. 4 shows a semiconductor light emitting device using the vertical semiconductor light emitting device chip 150 shown in FIG. 3, but using the semiconductor light emitting device chip shown in FIGS. 1 and 2 Devices can also be manufactured.

5 is a diagram showing an example of an LED display disclosed in Japanese Laid-Open Patent Publication No. 1995-288341. For convenience of explanation, the reference numerals have been changed.

5 is a plan view 190 illustrating a single pixel structure in an LED display. In a pixel structure, semiconductor light emitting device chips 194, 195, and 196 are electrically connected to a conductor layer 191 formed on a PCB. The semiconductor light emitting device chip 194 emitting blue light is a lateral chip and is electrically connected to the conductor layer 191 through wire bonding, and is bonded to the conductor layer 191 with an insulating adhesive 193. The semiconductor light emitting device chips 195 and 196 emitting green and red light are vertical chips and are electrically connected to the conductor layer 191 through a conductive adhesive 197 and wire bonding. In addition, it is surrounded by a cover part 192 to distinguish it from other adjacent pixels. Although not shown in the drawing, a sealing material covers the semiconductor light emitting device chips 194, 195 and 196 to protect the semiconductor light emitting device chips 194, 195, and 196.

According to the trend of miniaturization and weight reduction, the size of semiconductor light emitting devices has gradually become smaller. However, in the case of a semiconductor light emitting device using a mini or micro semiconductor light emitting device chip having a size of 300 μm or less with a maximum side size, the size of the pad and the spacing between the pads decrease, causing problems in the SMT process such as short circuit and poor adhesion.

Accordingly, the present disclosure is to solve the problems in the SMT process in a semiconductor light emitting device using a mini or micro semiconductor light emitting device chip, and furthermore, to provide a semiconductor light emitting device suitable for a transparent display.

This will be described later in the'Specific Contents for the Implementation of the Invention'.

Here, a summary of the present disclosure is provided, and this section provides a general summary of the disclosure and is not a comprehensive disclosure of its full scope or all of its features).

According to an aspect of the present disclosure, there is provided a semiconductor light emitting device comprising: at least one semiconductor light emitting device chip including a plurality of electrodes; A plurality of pads respectively corresponding to the plurality of electrodes apart from a plurality of electrodes of at least one semiconductor light emitting device chip on a plane; An electrical connection provided on the same plane as the plurality of pads and electrically connecting the plurality of pads and the plurality of electrodes, respectively; And, there is provided a semiconductor light emitting device including; an encapsulant covering at least one semiconductor light emitting device chip.

According to another aspect of the present disclosure, there is provided a method of manufacturing a semiconductor light emitting device including at least one semiconductor light emitting device chip, the method comprising: preparing a substrate; Providing at least one semiconductor light emitting device chip on a substrate; Providing an encapsulant on the substrate and at least one semiconductor light emitting device chip; Removing the substrate; And, there is provided a method of manufacturing a semiconductor light emitting device comprising; forming an electrical connection between the pad and at least one or more semiconductor light emitting device chips and a pad spaced apart from the semiconductor light emitting device chip in the encapsulant.

According to another aspect of the present disclosure, there is provided a method of manufacturing a semiconductor light emitting device including at least one semiconductor light emitting device chip, comprising: preparing a substrate; Forming a plurality of pads spaced apart from at least one semiconductor light emitting device chip at a predetermined distance on a substrate and an electrical connection connecting the plurality of pads to at least one semiconductor light emitting device chip; Providing at least one semiconductor light emitting device chip on a substrate; Providing an encapsulant on the substrate and at least one semiconductor light emitting device chip; And, there is provided a method for manufacturing a semiconductor light emitting device comprising; removing the substrate.

This will be described later in the'Specific Contents for the Implementation of the Invention'.

1 is a diagram showing an example of a conventional semiconductor light emitting device chip;
2 is a view showing another example of a semiconductor light emitting device chip disclosed in US Patent Publication No. 7,262,436;
3 is a view showing another example of a semiconductor light emitting device chip proposed in US Patent Publication No. 8,008,683;
4 is a view showing an example of a conventional semiconductor light emitting device;
5 is a view showing an example of the LED display disclosed in Japanese Patent Laid-Open No. 1995-288341,
6 is a view showing an example of a semiconductor light emitting device according to the present disclosure;
7 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
8 is a view showing still another example of a semiconductor light emitting device according to the present disclosure;
9 is a view showing still another example of a semiconductor light emitting device according to the present disclosure;
Fig. 10 is a diagram explaining in detail A in Fig. 9(b);
11 is a diagram illustrating examples of patterns according to the present disclosure;
12 is a diagram illustrating an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure;
13 is a view showing another example of a method of manufacturing a semiconductor light emitting device according to the present disclosure;
14 is a diagram illustrating a Zener diode according to the present disclosure;
15 is a view showing another example of a semiconductor light emitting device according to the present disclosure.

Hereinafter, the present disclosure will now be described in detail with reference to the accompanying drawing(s)).

6 is a diagram illustrating an example of a semiconductor light emitting device according to the present disclosure.

FIG. 6(a) is a plan view of the semiconductor light emitting device 100, and FIG. 6(b) shows a cross-section AA′ of FIG. 6(a).

The semiconductor light emitting device 100 includes at least one semiconductor light emitting device chip 110, a plurality of pads 121, an electrical connection 123, and an encapsulant 150.

At least one semiconductor light emitting device chip 110 includes a plurality of electrodes 111.

The plurality of pads 121 are formed at a predetermined distance away from the at least one semiconductor light emitting device chip 110 on a plane. The semiconductor light emitting device 100 is directly electrically connected to the outside through the pad 121.

The plurality of pads 121 are not provided under the at least one semiconductor light emitting device chip 110. That is, a predetermined distance is formed between the plurality of pads 121 and at least one semiconductor light emitting device chip 110. By forming a predetermined distance between the plurality of pads 121 and at least one semiconductor light emitting device chip 110, the size of the pads 121 can be increased, and the spacing between the pads 121 is widened to increase the SMT (Surface Mounting Technology). Mounted Technology) in the process, solved problems such as short circuit and poor adhesion. In addition, when elements occupying a certain area, such as the pad 121 and the semiconductor light emitting device chip 110, among the devices constituting the semiconductor light emitting device 100 are provided apart from each other without being concentrated and applied to a transparent display, the semiconductor light emitting device 100 Can be made inconspicuous. Furthermore, since light can be emitted through the gap between the pad 121 and the semiconductor light emitting device chip 110, 6-sided light emission is possible. In this case, the plurality of pads 121 correspond to the plurality of electrodes 111, respectively.

The electrical connection 123 is provided between the plurality of pads 121 and the plurality of electrodes 111. The electrical connection 123 electrically connects the plurality of pads 121 and the plurality of electrodes 111. In particular, the electrical connection 123 may be formed on the same plane as the pad 121.

The electrical connection 123 is formed as a single line in FIG. 6A. When the electrical connection 123 is formed with a single line, a problem in that the semiconductor light emitting device chip 110 cannot be driven may occur when the electrical connection 123 is disconnected, and a solution thereof will be described in FIG. 7.

The encapsulant 150 covers at least one semiconductor light emitting device chip 110. The light-transmitting encapsulant 150, the semiconductor light emitting device chip 110, and the pad 121 are formed at predetermined intervals, so that the present disclosure may be a semiconductor light emitting device capable of emitting six-sided light. A plurality of pads 121 and electrical connections 123 may protrude from the encapsulant 150. A case in which the plurality of pads 121 and the electrical connection 123 are formed in the encapsulant 150 will be described with reference to FIG. 7.

It is preferable that the size of the pad 121 is larger than the size of the semiconductor light emitting device chip 110 and a predetermined distance between the pad 121 and the semiconductor light emitting device chip 110 is larger than the size of the semiconductor light emitting device chip 110. For example, the size of one semiconductor light emitting device chip 110 is a mini or micro semiconductor light emitting device chip having a maximum side size of 300 μm or less, and the size of one pad 121 is a maximum side size of 100 μm or more, and one The maximum side size of the distance between the pad 121 and one semiconductor light emitting device chip 110 is 150 μm or more, and the size of the semiconductor light emitting device 100 is 300 μm or more.

7 is a diagram illustrating another example of a semiconductor light emitting device according to the present disclosure.

7(a) is a view showing a plan view of the semiconductor light emitting device 100, and FIG. 7(b) is a view showing a cross section of the semiconductor light emitting device 100 of FIG. 7(a).

The electrical connection 123 forms a plurality of paths between the plurality of pads 121 and the plurality of electrodes 111, respectively. Since the plurality of pads 121 and the plurality of electrodes 111 are electrically connected through a plurality of paths, even if one path is disconnected, the plurality of pads 121 and the plurality of electrodes 111 are electrically connected through the remaining paths. It is connected by Therefore, if there is only one line as shown in FIG. 6(a), the semiconductor light emitting device does not operate when one line is disconnected, but even if one line is disconnected, between the plurality of pads 121 and the plurality of electrodes 111 Any one of a plurality of paths of the electrical connection 123 may be electrically connected to. In addition, since the electrical connection 123 is not concentrated and spreads thin and wide, the back side of the semiconductor light emitting device 100 is more visible.

The encapsulant 150 covers the electrical connection 123 and at least a portion of the electrical connection 123 may be exposed. The encapsulant 150 may cover the plurality of pads 121 and at least a portion of the pads may be exposed.

Zener diode 130 is provided to prevent reverse voltage applied to at least one semiconductor light emitting device chip 110. The Zener diode 130 is connected in parallel with the semiconductor light emitting device chip 110, and when a reverse voltage is applied to the semiconductor light emitting device chip 110, a current flows through the Zener diode 130 so that the semiconductor light emitting device chip 110 Protect.

In addition, the zener diode 130 has a plurality of zener electrodes 131, one of the plurality of zener electrodes 131 is in contact with a corresponding one of the plurality of pads 121, and a plurality of zener electrodes 131 The other Zener electrode 131 of the electrodes 131 is electrically connected to be connected to the corresponding at least one semiconductor light emitting device chip 110 in reverse parallel. At this time, one of the plurality of zener electrodes 131 may be connected to one of the plurality of electrodes 121 of the semiconductor light emitting device chip 110 and may be connected to one of the plurality of pads 121, or It may be connected to the electrical connection 123. The Zener diode 130 will be described in detail in FIG. 14.

8 is a diagram illustrating still other examples of a semiconductor light emitting device according to the present disclosure.

8A illustrates an example in which a plurality of paths are formed between the plurality of pads 121 and the plurality of electrodes 111 in the electrical connection 123.

8(b) shows an example in which the electrical connection 123 is formed in a net shape. The pattern of the electrical connection 123 is hexagonal and is an example formed in a honeycomb shape. This is an example in which the pattern is formed in a certain size. In the net type, the back side of the semiconductor light emitting device 100 is more visible.

9 is a diagram illustrating still other examples of a semiconductor light emitting device according to the present disclosure.

9A is a diagram illustrating an example of a semiconductor light emitting device 100 including a plurality of semiconductor light emitting device chips 110 according to the present disclosure.

At least one semiconductor light emitting device chip 110 includes a first semiconductor light emitting device chip 110 and a third electrode 111-3 including a first electrode 111-1 and a second electrode 111-2 The second semiconductor light emitting device chip 110 including the fourth electrode 111-4 and the third semiconductor light emitting device chip 110 including the fifth electrode 111-5 and the sixth electrode 111-6 It may include. The first electrode 111-1 and the second electrode 111-2 of one semiconductor light emitting device chip 110 have different polarities. For example, the first electrode 111-1 of the first semiconductor light emitting device chip 110 may be a-electrode, and the second electrode 111-2 may be a + electrode. The third electrode 111-3 of the second semiconductor light emitting device chip 110 may be a-electrode, and the fourth electrode 111-4 may be a + electrode. The fifth electrode 111-5 of the third semiconductor light emitting device chip 110 may be a-electrode, and the sixth electrode 111-6 may be a + electrode.

The plurality of pads 121 includes a first pad 121-1, a second pad 121-2, a third pad 121-3 and a fourth pad 121-4. The first pad 121-1 is electrically connected to the first electrode 111-1, the third electrode 111-3, and the fifth electrode 111-5. The second pad 121-2 is electrically connected to the second electrode 111-2. The third pad 121-3 is connected to the fourth electrode 111-4. The fourth pad 121-4 is connected to the sixth electrode 111-6. The first pad 121-1, the second pad 121-2, the third pad 121-3, and the fourth pad 121-4 may have different polarities. The second pad 121-2, the third pad 121-3, and the fourth pad 121-4 have the same polarity, but the first semiconductor light emitting device chip 110, the second semiconductor light emitting device chip 110, and They are formed separately to control ON/OFF of the third semiconductor light emitting device chip 110, respectively.

The electrical connection 123 includes a first electrical connection 123-1, a second electrical connection 123-2, a third electrical connection 123-3, and a fourth electrical connection 123-4. The first electrical connection 123-1 electrically connects the first pad 121-1, the first electrode 111-1, the third electrode 111-3, and the fifth electrode 111-5 do. The second electrical connection 123-2 electrically connects the second pad 121-2 and the second electrode 111-2. The third electrical connection 123-3 electrically connects the third pad 121-3 and the fourth electrode 111-4. The fourth electrical connection 123-4 electrically connects the fourth pad 121-4 and the sixth electrode 111-6.

The plurality of semiconductor light emitting device chips 110 may be turned on/off in various combinations in order to emit white light or various colors. A plurality of semiconductor light emitting device chips 110 are gathered in the center and provided in the semiconductor light emitting device 100, one semiconductor light emitting device chip 110; 110-1, 110-2, 110-3 and one pad 121; 121-1, 121 A certain distance may be formed between -2,121-3).

Since the plurality of semiconductor light emitting device chips 110 are well-mixed to form one pixel, the plurality of semiconductor light emitting device chips 110 must be provided in the center of the semiconductor light emitting device 100. If a plurality of pads 121 are provided under the plurality of semiconductor light emitting device chips 110 and the plurality of pads 121 enter the SMT process, a problem in that a plurality of nearby pads 121 may be shorted may occur. . Accordingly, the present disclosure, characterized in that the electrical connection 123 is made between the plurality of pads 121 and the semiconductor light emitting device chip 110, includes a plurality of mini or micro semiconductor light emitting device chips 110 in the center as shown in FIG. It is more effective if you put them together.

9B is a diagram illustrating another example of a semiconductor light emitting device 100 including a plurality of semiconductor light emitting device chips 110 according to the present disclosure.

The electrical connection 123 formed of a single line described in FIG. 9A may be formed in a net shape to solve the problem of being disconnected. The electrical connection 123 is formed thinner and the total area in which the electrical connection 123 is formed is formed wider. As described in FIG. 7, in the electrical connection 123, a plurality of paths are formed between the plurality of pads 121 and the plurality of electrodes 111, so that even if a part of the thin electrical connection 123 is disconnected, there is a probability that a connected path exists. It gets higher. Therefore, the probability that electricity does not pass through the semiconductor light emitting device chip 110 is lowered.

The electrical connection 123 may be formed to have a certain pattern. The electrical connection 123 may be formed in a net shape. The size of the pattern of the electrical connection 123 contacting the plurality of pads 121 or the plurality of electrodes 111 is smaller than the size of the pattern not contacting the plurality of pads 121 or the plurality of electrodes 111 . The detailed reason will be described in FIG. 10.

The first electrical connection 123-1 to the fourth electrical connection 123-4 are formed in a net shape. The net type is formed by connecting a plurality of patterns. The pattern may be formed as a figure, and examples of the pattern will be described in FIG. 11. Forming the first electrical connection 123-1 to the fourth electrical connection 123-4 in a net shape is the electrical connection 123 of FIG. 9(a) when the semiconductor light emitting device 100 is used in a transparent display. ), the back side of the semiconductor light emitting device 100 of FIG. 9(b) may be more visible than the back side of the semiconductor light emitting device 100 of FIG. 9(a).

Fig. 10 is a diagram explaining in detail A in Fig. 9B.

A third electrical connection 123-3 is positioned between the third pad 121-3 and the fourth electrode 111-4. Among the third electrical connections 123-3, the size of the pattern a contacting the third pad 121-3 and the fourth electrode 111-4 is reduced. This is because more paths can be formed only when the size of the pattern (a) contacting the third pad 121-3 and the fourth electrode 111-4 is reduced. Since the area of the third electrical connection 123-3 that can reach the third pad 121-3 and the fourth electrode 111-4 is limited, the third pad 121- The size of the pattern (a) in contact with 3) and the third electrode 111-3 may be formed to be smaller than that of the non-contact pattern (b). Therefore, the probability that the third electrical connection 123-3 between the first pad 121-1 and the third electrode 111-3 is disconnected can be lowered, and more electrical than forming a pattern having one size A plurality of paths may be formed in the connection 121.

11 is a diagram illustrating examples of patterns according to the present disclosure.

The pattern can be formed in various shapes. It may be formed in a variety of squares as shown in FIG. 11(a)(b), a hexagonal shape as in FIG. 11(c), a circle as in FIG. 11(d), and a triangle as in FIG. The shape of the pattern is not limited to the illustrated drawings.

12 is a diagram illustrating an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.

In the method of manufacturing a semiconductor light emitting device 100 including at least one semiconductor light emitting device chip 110, first, a substrate 140 is prepared as shown in FIG. 12(a). The substrate 140 is then temporarily fixed to the semiconductor light emitting device chip 110, and may be, for example, a silicon tape. The substrate 140 is not electrically connected to the semiconductor light emitting device chip 110.

Thereafter, at least one semiconductor light emitting device chip 110 is provided on the substrate 140 as shown in FIG. 12(b). In this case, although not shown, a zener diode 130 (refer to FIG. 7) may be provided on the substrate 140. The Zener diode 130 may be provided to correspond to at least one semiconductor light emitting device chip 110 and may include a Zener diode 130 to be separated from the at least one semiconductor light emitting device chip 110 by a predetermined distance.

Thereafter, the encapsulant 150 is provided on the substrate 140 and at least one semiconductor light emitting device chip 110 as shown in FIG. 12C. The semiconductor light emitting device chip 110 may be fixed by covering the encapsulant 150 on the substrate 140.

Thereafter, the substrate 140 is removed as shown in FIG. 12(d). Since it is a configuration for temporarily fixing the semiconductor light emitting device chip 110, it can be removed.

Thereafter, as shown in FIG. 12(e), a plurality of pads 121 and a plurality of pads 121 and at least one or more semiconductor light emitting device chips 110 separated from the semiconductor light emitting device chip 110 in the encapsulant 150 An electrical connection 123 is formed between them. After the encapsulant 150 is formed, a plurality of pads 121 and electrical connections 123 are formed under the semiconductor light emitting device chip 110 and the encapsulant 150, so a plurality of pads 121 and electrical connections 123 Silver protrudes from the encapsulant 150. Since the plurality of pads 121 and the electrical connection 123 are formed on one surface of the encapsulant 150 by a method such as vapor deposition, the plurality of pads 121 and the electrical connection 123 are provided on the same plane.

13 is a diagram illustrating another example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.

In a method of manufacturing a semiconductor light emitting device 100 including at least one semiconductor light emitting device chip 110, first, a substrate 140 is prepared as shown in FIG. 13(a). The substrate 140 is then temporarily fixed to the semiconductor light emitting device chip 110, and may be, for example, a silicon tape. The substrate 140 is not electrically connected to the semiconductor light emitting device chip 110.

Thereafter, as shown in FIG. 13(b), a plurality of pads 121 and a plurality of pads 121 and at least one or more semiconductor light emitting device chips ( 110) to form an electrical connection 123 to connect. Since the plurality of pads 121 and the electrical connection 123 are formed on one surface of the substrate 140 by a method such as vapor deposition, the plurality of pads 121 and the electrical connection 123 are provided on the same plane.

Thereafter, at least one semiconductor light emitting device chip 110 is provided on the substrate 140 as shown in FIG. 13(c). The semiconductor light emitting device chip 110 may be positioned to contact the electrical connection 123. In this case, although not shown, a zener diode 130 corresponding to at least one semiconductor light emitting device chip 110 may be provided on the plurality of pads 121.

Thereafter, as shown in FIG. 13D, an encapsulant 150 is provided on the substrate 140 and at least one semiconductor light emitting device chip 110.

Thereafter, the substrate 140 is removed as shown in FIG. 13(e). After forming the plurality of pads 121 and the electrical connection 123 and covering the encapsulant 150, the plurality of pads 121 and the electrical connection 123 are provided in the encapsulant 150 and the substrate 140 In the case of removing the plurality of pads 121 and the electrical connection 123, only one surface that was in contact with the substrate 140 is exposed.

It is preferable that the plurality of pads 121 and the electrical connection 123 are provided in the encapsulant 150. This is because when the plurality of pads 121 and the electrical connection 123 protrude out of the encapsulant 150 as shown in FIG. 12(e), the adhesion between the encapsulant 150 and the plurality of pads 121 and the electrical connection 123 Because these are weak and can be separated from each other.

14 is a diagram illustrating a Zener diode according to the present disclosure.

14(a) is a diagram illustrating an example in which a Zener diode is mounted in a conventional semiconductor light emitting device.

A hole (H) is provided in the PCB substrate 240, and an electrical connection is formed along the hole (H) while forming the pad 221 provided under the PCB substrate 240, and to the top surface of the PCB substrate 240. An electrical connection is made to protrude. The pad electrode 223 is formed on the upper surface of the PCB substrate 240 so as to be connected to the pad 221, and the pad electrode 223 is also formed to protrude by the protruding electrical connection. Therefore, when the Zener electrode 131 of the Zener diode 130 is attached to the pad electrode 223, a gap is created, and the Zener diode 130 is liable to fall off. Accordingly, although not shown, the zener diode 130 is provided at a portion other than the pad electrode 223 avoiding the hole H, and the zener diode 130 is provided at a position not overlapping with the pad 221.

FIG. 14(b) is a diagram illustrating a section BB′ of FIG. 7.

One of the zener electrodes 131 of the zener diode 130 is in contact with one pad 121. This disclosure is possible because the pad 121 is formed flat without the hole H (FIG. 14(a)) and the pad electrode 223 (FIG. 14(a)).

The pad 121 and the zener diode 130 are configured to increase optical loss, and the pad 121 is formed flat so that the zener diode 130 can be positioned within the pad 121 on a plane, so that the pad 121 It is formed so that the area of and the area of the zener diode 130 overlaps, thereby reducing optical loss. In addition, when applied to a transparent display, since many portions of the pad 121 and the zener diode 130 overlap, the transparency of the semiconductor light emitting device 100 can be increased.

15 is a diagram illustrating another example of a semiconductor light emitting device according to the present disclosure.

FIG. 15A is a bottom view showing the lower surface of the semiconductor light emitting device 100, and is an example in which one semiconductor light emitting device chip 110 is provided in the semiconductor light emitting device 100. Fig. 15(b) is a view showing a cross section AA' of Fig. 15(a).

The semiconductor light emitting device 100 may include an insulating layer 160 covering the electrical connection 123 and exposing the plurality of pads 121. By covering the electrical connection 123 with the insulating layer 160, it is possible to reduce the risk of a short circuit during soldering. Although an example in which the electrical connection 123 and the pad 121 are provided inside the encapsulant 150 is shown, it can also be applied to an example in which the electrical connection 123 and the pad 121 protrude from the encapsulant 150. The insulating layer 160 may be formed after FIGS. 12(e) and 13(e) by using a method such as silk screen printing.

It is preferable that the height h of the insulating layer 160 is formed to be 10 μm or less. Since the insulating layer 160 is formed so that the plurality of pads 121 are exposed after FIG. 12(e) or 13(e), the plurality of pads 121 may be formed lower than the insulating layer 160. When electrically connected to the outside by soldering, the height h of the insulating layer 160 is preferably as thin as 10 μm or less in order for the solder material to make good contact with the plurality of pads 121. Alternatively, after the formation of the insulating layer 160, the height of the plurality of pads 121 may be increased as shown by the dotted line 122 by a method such as plating to be formed equal to or higher than the height h of the insulating layer 160.

The insulating layer 160 may be formed of at least one of a transparent material or an opaque material. When the insulating layer 160 is formed of a transparent material, the semiconductor light emitting device 100 may emit light on six surfaces. On the other hand, when the insulating layer 160 is formed of an opaque material, the semiconductor light emitting device 100 may emit light on five surfaces. When applied to a transparent display, it may be necessary to prevent the light from exiting the back side. Therefore, the insulating layer 160 may be formed of an opaque material. However, for example, if the size of the semiconductor light emitting device is 500umX500um or less, the semiconductor light emitting device is not easily recognized even if the insulating layer is opaque, but as in the present disclosure, the gap between the pad and the semiconductor light emitting device chip is increased so that the semiconductor light emitting device 100 When the size is larger than before (for example, a semiconductor light emitting device having a size of 1500umX1500um), the semiconductor light emitting device 100 can be well recognized. In order to solve such a problem, only the portion 170 indicated by the dotted line in FIG. 15(a) of the insulating layer 160 under the semiconductor light emitting device chip 110 is formed of an opaque material, and the remaining portions are formed of a transparent material. I can. In this case, the light emitted from the semiconductor light emitting device chip 110 is prevented from exiting the bottom of the semiconductor light emitting device 100, and the remaining portions are transparent, so that even when the size of the semiconductor light emitting device is increased by the present disclosure, It can be applied to transparent displays that require no light to emit. At this time, it is preferable that the size of the portion 170 indicated by the dotted line is 300um or less.

15(c) is a bottom view showing the lower surface of the semiconductor light emitting device 100, and is an example in which a plurality of semiconductor light emitting device chips 110 are provided in the semiconductor light emitting device 100. FIG. 15(d) is a diagram showing a section BB′ of FIG. 15(c).

15(a) and 15(b) may be applied to FIGS. 15(c) and 15(d).

Hereinafter, various embodiments of the present disclosure will be described.

(1) A semiconductor light emitting device comprising: at least one semiconductor light emitting device chip including a plurality of electrodes; A plurality of pads respectively corresponding to the plurality of electrodes apart from a plurality of electrodes of at least one semiconductor light emitting device chip on a plane; An electrical connection provided on the same plane as the plurality of pads and electrically connecting the plurality of pads and the plurality of electrodes, respectively; And an encapsulant covering at least one semiconductor light emitting device chip.

(2) Electrical connection is a semiconductor light emitting device in which a plurality of paths are respectively formed between a plurality of pads and a plurality of electrodes.

(3) Electrical connection is a semiconductor light emitting device formed in a net shape.

(4) The electrical connection is a semiconductor light emitting device formed to have a certain pattern.

(5) A semiconductor light emitting device in which a size of a pattern of electrical connection contacting a plurality of pads or a plurality of electrodes is smaller than a size of a pattern not contacting a plurality of pads or a plurality of electrodes.

(6) A semiconductor light emitting device in which the encapsulant covers the electrical connection and at least a part of the electrical connection is exposed.

(7) A semiconductor light emitting device in which an encapsulant covers a plurality of pads and at least a portion of the pads are exposed.

(8) A semiconductor light emitting device having a predetermined distance between the plurality of pads and the semiconductor light emitting device chip is greater than or equal to the width of the semiconductor light emitting device chip.

(9) The width of the plurality of pads is a semiconductor light emitting device larger than the width of the semiconductor light emitting device chip.

(10) A semiconductor light emitting device with a pad protruding from the encapsulant.

(11) A semiconductor light emitting device comprising a Zener diode provided to prevent reverse voltage applied to at least one semiconductor light emitting device chip.

(12) Zener diode is a semiconductor light emitting device provided on the pad.

(13) At least one semiconductor light emitting device chip includes a first semiconductor light emitting device chip including a first electrode and a second electrode, a second semiconductor light emitting device chip including a third electrode and a fourth electrode, and a fifth electrode and a fifth electrode. A third semiconductor light emitting device chip including 6 electrodes, wherein the pad includes a first electrode, a third electrode, and a first pad electrically connected to the fifth electrode, a second pad electrically connected to the second electrode, A third pad connected to the fourth electrode and a fifth pad connected to the sixth electrode, and the electrical connection is a first electrical connection electrically connecting the first pad and the first electrode, the third electrode, and the fifth electrode. Connection, a second electrical connection electrically connecting the second pad and the second electrode, a third electrical connection electrically connecting the third pad and the third electrode, and the electrical connection between the fourth pad and the fourth electrode A semiconductor light emitting device comprising a fourth electrical connection.

(14) a first semiconductor light emitting device chip, a second semiconductor light emitting device chip, and a plurality of zener diodes each provided to prevent reverse voltage applied to the third semiconductor light emitting device.

(15) A plurality of Zener diodes are semiconductor light emitting devices provided on the second pad, the third pad, and the fourth pad, respectively.

(16) A method of manufacturing a semiconductor light emitting device including at least one semiconductor light emitting device chip, the method comprising: preparing a substrate; Providing at least one semiconductor light emitting device chip on a substrate; Providing an encapsulant on the substrate and at least one semiconductor light emitting device chip; Removing the substrate; And forming an electrical connection between the pad and the pad and at least one semiconductor light emitting device chip at a predetermined distance from the semiconductor light emitting device chip on the encapsulant.

(17) In the step of providing at least one semiconductor light emitting device chip on a substrate; In the semiconductor light emitting device having a Zener diode corresponding to at least one semiconductor light emitting device chip and separated by a predetermined distance from the at least one semiconductor light emitting device chip How to manufacture.

(18) A method of manufacturing a semiconductor light emitting device including at least one semiconductor light emitting device chip, the method comprising: preparing a substrate; Forming a plurality of pads spaced apart from at least one semiconductor light emitting device chip at a predetermined distance on a substrate and an electrical connection connecting the plurality of pads to at least one semiconductor light emitting device chip; Providing at least one semiconductor light emitting device chip on a substrate; Providing an encapsulant on the substrate and at least one semiconductor light emitting device chip; And, the method of manufacturing a semiconductor light emitting device comprising a; step of removing the substrate.

(19) In the step of providing at least one semiconductor light emitting device chip on a substrate; a method of manufacturing a semiconductor light emitting device having a zener diode corresponding to at least one semiconductor light emitting device chip on a plurality of pads.

According to one semiconductor light emitting device according to the present disclosure, since the electrical connection is formed in a net shape, the electrical connection is formed thinner, thereby improving visibility.

According to another semiconductor light emitting device according to the present disclosure, even if one path is disconnected because a plurality of paths are formed between the pad and the electrode for electrical connection, electricity is connected to the other paths.

According to another semiconductor light emitting device according to the present disclosure, an electrical connection and a plurality of pads are provided inside the encapsulant so that they are not separated from the encapsulant.

According to the method of manufacturing another semiconductor light emitting device according to the present disclosure, it is possible to manufacture a semiconductor light emitting device whose electrical connection protrudes from the encapsulant.

According to the method of manufacturing another semiconductor light emitting device according to the present disclosure, it is possible to manufacture a semiconductor light emitting device in which electrical connection and a plurality of pads are provided inside the encapsulant and only partially exposed.

100: semiconductor light emitting device 110: semiconductor light emitting device chip 111: plural electrodes
121: plural pads 123: electrical connection 130: zener diode
140: substrate 150: encapsulant

Claims (19)

delete In a semiconductor light emitting device,
At least one semiconductor light emitting device chip including a plurality of electrodes;
A plurality of pads respectively corresponding to the plurality of electrodes apart from a plurality of electrodes of at least one semiconductor light emitting device chip on a plane;
An electrical connection provided on the same plane as the plurality of pads and electrically connecting the plurality of pads and the plurality of electrodes, respectively; And,
Includes; an encapsulant covering at least one semiconductor light emitting device chip,
A gap is formed between the semiconductor light emitting device chip and the pad, and the width of the electrical connection between the semiconductor light emitting device chip and the pad is less than or equal to the plurality of electrodes of the semiconductor light emitting device chip,
Electrical connection is a semiconductor light emitting device that forms a plurality of paths, respectively, between a plurality of pads and a plurality of electrodes. The method according to claim 2,
The electrical connection is a semiconductor light emitting device formed in a net shape. The method of claim 3,
The electrical connection is a semiconductor light emitting device formed to have a certain pattern. The method of claim 4,
A semiconductor light emitting device in which a size of a pattern of electrical connection contacting a plurality of pads or a plurality of electrodes is smaller than a size of a pattern that does not contact the plurality of pads or electrodes. The method according to claim 2,
A semiconductor light emitting device in which an encapsulant covers the electrical connection and at least a part of the electrical connection is exposed. The method of claim 6,
A semiconductor light emitting device in which an encapsulant covers a plurality of pads and at least a portion of the pads is exposed. In a semiconductor light emitting device,
At least one semiconductor light emitting device chip including a plurality of electrodes;
A plurality of pads respectively corresponding to the plurality of electrodes apart from a plurality of electrodes of at least one semiconductor light emitting device chip on a plane;
An electrical connection provided on the same plane as the plurality of pads and electrically connecting the plurality of pads and the plurality of electrodes, respectively; And,
Includes; an encapsulant covering at least one semiconductor light emitting device chip,
A gap is formed between the semiconductor light emitting device chip and the pad, and the width of the electrical connection between the semiconductor light emitting device chip and the pad is less than or equal to the plurality of electrodes of the semiconductor light emitting device chip,
A semiconductor light emitting device in which a predetermined distance between a plurality of pads and a semiconductor light emitting device chip is larger than the size of a semiconductor light emitting device chip. In a semiconductor light emitting device,
At least one semiconductor light emitting device chip including a plurality of electrodes;
A plurality of pads respectively corresponding to the plurality of electrodes apart from a plurality of electrodes of at least one semiconductor light emitting device chip on a plane;
An electrical connection provided on the same plane as the plurality of pads and electrically connecting the plurality of pads and the plurality of electrodes, respectively; And,
Includes; an encapsulant covering at least one semiconductor light emitting device chip,
A gap is formed between the semiconductor light emitting device chip and the pad, and the width of the electrical connection between the semiconductor light emitting device chip and the pad is less than or equal to the plurality of electrodes of the semiconductor light emitting device chip,
A semiconductor light emitting device having a size of a plurality of pads larger than that of a semiconductor light emitting device chip. The method according to claim 8 or 9,
A semiconductor light emitting device with a pad protruding from the encapsulant. The method according to claim 8 or 9,
A semiconductor light emitting device comprising a Zener diode provided to prevent reverse voltage applied to at least one semiconductor light emitting device chip. The method of claim 11,
Zener diode is a semiconductor light emitting device provided on the pad. In a semiconductor light emitting device,
At least one semiconductor light emitting device chip including a plurality of electrodes;
A plurality of pads respectively corresponding to the plurality of electrodes apart from a plurality of electrodes of at least one semiconductor light emitting device chip on a plane;
An electrical connection provided on the same plane as the plurality of pads and electrically connecting the plurality of pads and the plurality of electrodes, respectively; And,
Includes; an encapsulant covering at least one semiconductor light emitting device chip,
A gap is formed between the semiconductor light emitting device chip and the pad, and the width of the electrical connection between the semiconductor light emitting device chip and the pad is less than or equal to the plurality of electrodes of the semiconductor light emitting device chip,
At least one semiconductor light emitting device chip includes a first semiconductor light emitting device chip including a first electrode and a second electrode, a second semiconductor light emitting device chip including a third electrode and a fourth electrode, and a fifth electrode and a sixth electrode. It includes a third semiconductor light emitting device chip comprising,
The pad is connected to the first electrode, the third electrode, and the first pad electrically connected to the fifth electrode, the second pad electrically connected to the second electrode, the third pad connected to the fourth electrode, and the sixth electrode. It includes a fifth pad that becomes,
The electrical connection is a first electrical connection electrically connecting the first pad and the first electrode, the third electrode and the fifth electrode, a second electrical connection electrically connecting the second pad and the second electrode, and a third pad A semiconductor light emitting device comprising a third electrical connection electrically connecting between the and the third electrode and a fourth electrical connection electrically connecting between the fourth pad and the fourth electrode. delete delete delete delete In the method of manufacturing a semiconductor light emitting device including at least one semiconductor light emitting device chip,
Preparing a substrate;
Forming a plurality of pads spaced apart from at least one semiconductor light emitting device chip at a predetermined distance on a substrate and an electrical connection connecting the plurality of pads to at least one semiconductor light emitting device chip;
Providing at least one semiconductor light emitting device chip on a substrate;
Providing an encapsulant on the substrate and at least one semiconductor light emitting device chip; And,
Including; removing the substrate;
In the step of forming the electrical connection, a gap is formed between the semiconductor light emitting device chip and the pad, and the width of the electrical connection between the semiconductor light emitting device chip and the pad is less than or equal to the plurality of electrodes of the semiconductor light emitting device chip Method of manufacturing a light emitting device. The method of claim 18,
In the step of providing at least one semiconductor light emitting device chip on a substrate; In,
A method of manufacturing a semiconductor light emitting device including a zener diode corresponding to at least one semiconductor light emitting device chip on a plurality of pads.

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