KR102169565B1 - 플라즈마 에칭 방법 - Google Patents

플라즈마 에칭 방법 Download PDF

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Publication number
KR102169565B1
KR102169565B1 KR1020140025525A KR20140025525A KR102169565B1 KR 102169565 B1 KR102169565 B1 KR 102169565B1 KR 1020140025525 A KR1020140025525 A KR 1020140025525A KR 20140025525 A KR20140025525 A KR 20140025525A KR 102169565 B1 KR102169565 B1 KR 102169565B1
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South Korea
Prior art keywords
gas
flow rate
etching
semiconductor region
plasma
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KR1020140025525A
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English (en)
Korean (ko)
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KR20140111599A (ko
Inventor
마사유키 사와타이시
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도쿄엘렉트론가부시키가이샤
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Inorganic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
KR1020140025525A 2013-03-11 2014-03-04 플라즈마 에칭 방법 Active KR102169565B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2013-047900 2013-03-11
JP2013047900A JP6059048B2 (ja) 2013-03-11 2013-03-11 プラズマエッチング方法

Publications (2)

Publication Number Publication Date
KR20140111599A KR20140111599A (ko) 2014-09-19
KR102169565B1 true KR102169565B1 (ko) 2020-10-23

Family

ID=51696448

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KR1020140025525A Active KR102169565B1 (ko) 2013-03-11 2014-03-04 플라즈마 에칭 방법

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JP (1) JP6059048B2 (enrdf_load_stackoverflow)
KR (1) KR102169565B1 (enrdf_load_stackoverflow)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6494424B2 (ja) * 2015-05-29 2019-04-03 東京エレクトロン株式会社 エッチング方法
JP6529357B2 (ja) * 2015-06-23 2019-06-12 東京エレクトロン株式会社 エッチング方法
JP7190940B2 (ja) * 2019-03-01 2022-12-16 東京エレクトロン株式会社 基板処理方法及び基板処理装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009021489A (ja) * 2007-07-13 2009-01-29 Toshiba Corp 半導体装置およびその製造方法
JP2011508431A (ja) * 2007-12-21 2011-03-10 ラム リサーチ コーポレーション シリコン構造体の製造及びプロファイル制御を伴うシリコンディープエッチング

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3803516B2 (ja) * 1999-09-22 2006-08-02 株式会社東芝 ドライエッチング方法及び半導体装置の製造方法
JP2003151960A (ja) * 2001-11-12 2003-05-23 Toyota Motor Corp トレンチエッチング方法
JP2005276931A (ja) * 2004-03-23 2005-10-06 Toshiba Corp 半導体装置およびその製造方法
JP2006339490A (ja) * 2005-06-03 2006-12-14 Toshiba Corp 半導体装置の製造方法
JP2007019191A (ja) * 2005-07-06 2007-01-25 Fujitsu Ltd 半導体装置とその製造方法
JP2008124399A (ja) * 2006-11-15 2008-05-29 Toshiba Corp 半導体装置の製造方法
JP4816478B2 (ja) * 2007-02-02 2011-11-16 東京エレクトロン株式会社 エッチング方法及び記憶媒体
JP5226296B2 (ja) * 2007-12-27 2013-07-03 東京エレクトロン株式会社 プラズマエッチング方法、プラズマエッチング装置、制御プログラム及びコンピュータ記憶媒体
JP2012174854A (ja) 2011-02-21 2012-09-10 Tokyo Electron Ltd 半導体素子の製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009021489A (ja) * 2007-07-13 2009-01-29 Toshiba Corp 半導体装置およびその製造方法
JP2011508431A (ja) * 2007-12-21 2011-03-10 ラム リサーチ コーポレーション シリコン構造体の製造及びプロファイル制御を伴うシリコンディープエッチング

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Publication number Publication date
JP6059048B2 (ja) 2017-01-11
JP2014175521A (ja) 2014-09-22
KR20140111599A (ko) 2014-09-19

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