KR102119556B1 - 반도체 웨이퍼의 양면 연마 방법 - Google Patents

반도체 웨이퍼의 양면 연마 방법 Download PDF

Info

Publication number
KR102119556B1
KR102119556B1 KR1020197007838A KR20197007838A KR102119556B1 KR 102119556 B1 KR102119556 B1 KR 102119556B1 KR 1020197007838 A KR1020197007838 A KR 1020197007838A KR 20197007838 A KR20197007838 A KR 20197007838A KR 102119556 B1 KR102119556 B1 KR 102119556B1
Authority
KR
South Korea
Prior art keywords
polishing
double
semiconductor wafer
sided
value
Prior art date
Application number
KR1020197007838A
Other languages
English (en)
Korean (ko)
Other versions
KR20190040031A (ko
Inventor
마미 구보타
후미야 후쿠하라
토모노리 미우라
Original Assignee
가부시키가이샤 사무코
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시키가이샤 사무코 filed Critical 가부시키가이샤 사무코
Publication of KR20190040031A publication Critical patent/KR20190040031A/ko
Application granted granted Critical
Publication of KR102119556B1 publication Critical patent/KR102119556B1/ko

Links

Images

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/27—Work carriers
    • B24B37/28—Work carriers for double side lapping of plane surfaces
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/042—Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/07—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool
    • B24B37/08—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool for double side lapping
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/11—Lapping tools
    • B24B37/20—Lapping pads for working plane surfaces
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02013—Grinding, lapping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02016—Backside treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02024—Mirror polishing

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
KR1020197007838A 2016-11-02 2017-10-03 반도체 웨이퍼의 양면 연마 방법 KR102119556B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JPJP-P-2016-215561 2016-11-02
JP2016215561A JP6635003B2 (ja) 2016-11-02 2016-11-02 半導体ウェーハの両面研磨方法
PCT/JP2017/036008 WO2018083931A1 (ja) 2016-11-02 2017-10-03 半導体ウェーハの両面研磨方法

Publications (2)

Publication Number Publication Date
KR20190040031A KR20190040031A (ko) 2019-04-16
KR102119556B1 true KR102119556B1 (ko) 2020-06-05

Family

ID=62076795

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020197007838A KR102119556B1 (ko) 2016-11-02 2017-10-03 반도체 웨이퍼의 양면 연마 방법

Country Status (7)

Country Link
US (1) US11731234B2 (zh)
JP (1) JP6635003B2 (zh)
KR (1) KR102119556B1 (zh)
CN (1) CN110235225B (zh)
DE (1) DE112017005536B4 (zh)
TW (1) TWI648778B (zh)
WO (1) WO2018083931A1 (zh)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102017210423A1 (de) * 2017-06-21 2018-12-27 Siltronic Ag Verfahren, Steuerungssystem und Anlage zum Bearbeiten einer Halbleiterscheibe sowie Halbleiterscheibe
JP7031491B2 (ja) * 2018-05-22 2022-03-08 株式会社Sumco ワークの両面研磨装置および両面研磨方法
JP7010166B2 (ja) * 2018-07-24 2022-01-26 株式会社Sumco ワークの両面研磨装置および両面研磨方法
JP6899080B2 (ja) * 2018-09-05 2021-07-07 信越半導体株式会社 ウェーハ形状データ化方法
JP7078525B2 (ja) * 2018-12-03 2022-05-31 株式会社神戸製鋼所 薄膜トランジスタのストレス耐性の予測方法
CN110193775B (zh) * 2019-03-12 2021-09-17 上海新昇半导体科技有限公司 化学机械抛光方法以及化学抛光系统
JP7200898B2 (ja) * 2019-09-27 2023-01-10 株式会社Sumco ワークの両面研磨方法
KR102104014B1 (ko) * 2019-10-11 2020-05-29 김병호 일면 연마가 가능한 양면연마장치
JP7215412B2 (ja) * 2019-12-26 2023-01-31 株式会社Sumco 半導体ウェーハ用研磨布の使用開始時期の判定方法及びそれを用いた半導体ウェーハの研磨方法、並びに半導体ウェーハ研磨システム
CN111805400A (zh) * 2020-07-17 2020-10-23 中国科学院微电子研究所 抛光装置
JP7452403B2 (ja) * 2020-12-18 2024-03-19 株式会社Sumco ウェーハの研磨方法およびウェーハの製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004306173A (ja) 2003-04-03 2004-11-04 Sharp Corp 基板研磨装置
JP2012232353A (ja) 2011-04-28 2012-11-29 Sumco Corp ワークの研磨方法及び研磨装置
JP2015047656A (ja) 2013-08-30 2015-03-16 株式会社Sumco ワークの両面研磨装置及び両面研磨方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000254857A (ja) * 1999-01-06 2000-09-19 Tokyo Seimitsu Co Ltd 平面加工装置及び平面加工方法
JP3791302B2 (ja) * 2000-05-31 2006-06-28 株式会社Ｓｕｍｃｏ 両面研磨装置を用いた半導体ウェーハの研磨方法
US6709981B2 (en) * 2000-08-16 2004-03-23 Memc Electronic Materials, Inc. Method and apparatus for processing a semiconductor wafer using novel final polishing method
JP5614397B2 (ja) * 2011-11-07 2014-10-29 信越半導体株式会社 両面研磨方法
JP5896884B2 (ja) 2012-11-13 2016-03-30 信越半導体株式会社 両面研磨方法
DE102013204839A1 (de) * 2013-03-19 2014-09-25 Siltronic Ag Verfahren zum Polieren einer Scheibe aus Halbleitermaterial
JP6222171B2 (ja) * 2015-06-22 2017-11-01 信越半導体株式会社 定寸装置、研磨装置、及び研磨方法
JP6579056B2 (ja) 2016-07-29 2019-09-25 株式会社Sumco ウェーハの両面研磨方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004306173A (ja) 2003-04-03 2004-11-04 Sharp Corp 基板研磨装置
JP2012232353A (ja) 2011-04-28 2012-11-29 Sumco Corp ワークの研磨方法及び研磨装置
JP2015047656A (ja) 2013-08-30 2015-03-16 株式会社Sumco ワークの両面研磨装置及び両面研磨方法

Also Published As

Publication number Publication date
TW201828346A (zh) 2018-08-01
CN110235225B (zh) 2022-09-23
WO2018083931A1 (ja) 2018-05-11
KR20190040031A (ko) 2019-04-16
DE112017005536T5 (de) 2019-07-25
US11731234B2 (en) 2023-08-22
JP2018074086A (ja) 2018-05-10
JP6635003B2 (ja) 2020-01-22
DE112017005536B4 (de) 2024-06-27
TWI648778B (zh) 2019-01-21
US20200039021A1 (en) 2020-02-06
CN110235225A (zh) 2019-09-13

Similar Documents

Publication Publication Date Title
KR102119556B1 (ko) 반도체 웨이퍼의 양면 연마 방법
JP6146213B2 (ja) ワークの両面研磨装置及び両面研磨方法
JP5924409B2 (ja) ワークの研磨方法およびワークの研磨装置
KR101312475B1 (ko) 연마방법, 연마장치 및 연마장치제어용 프로그램을 기록한 컴퓨터로 판독할 수 있는 기록매체
US10744616B2 (en) Wafer polishing method and apparatus
TWI680507B (zh) 晶圓研磨方法
SG192518A1 (en) Wafer polishing method
TWI752045B (zh) 研磨裝置
WO2016021094A1 (ja) ワークの研磨方法およびワークの研磨装置
JP3991598B2 (ja) ウエーハ研磨方法
JP5028354B2 (ja) ウェーハの研磨方法
KR102386609B1 (ko) 워크의 양면 연마 장치 및 양면 연마 방법
TW201334049A (zh) 矽晶圓的研磨方法及研磨裝置
US20200353585A1 (en) Method of double-side polishing wafer
JP6743746B2 (ja) ウェーハの両面研磨装置および両面研磨方法
JP2020049612A (ja) ワークの両面研磨装置および両面研磨方法
EP4169058A1 (en) Semiconductor substrate polishing with polishing pad temperature control
JP2002166357A (ja) ウェーハ研磨加工方法
JP2012069897A (ja) 半導体ウエハの研磨方法及び半導体ウエハ研磨装置
JP2011036954A (ja) 研磨装置、研磨方法、研磨制御プログラム、及びそのプログラムを記録した記録媒体
KR101259315B1 (ko) 반도체 웨이퍼의 연마 방법 및 반도체 웨이퍼의 연마 장치
JP5570065B2 (ja) 半導体ウエハの研磨方法及び半導体ウエハ研磨装置

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
GRNT Written decision to grant