KR102117341B1 - Organic light emitting display device and driving method thereof - Google Patents

Abstract

The present invention relates to an organic light emitting display device, in particular, by using a detection signal collected through a gate line formed to overlap with power lines in the display area, it is possible to detect a panel abnormality in the display area, An object of the present invention is to provide an organic light emitting display device and a driving method thereof. To this end, in the organic light emitting display device according to the present invention, a pixel is formed in each crossing region of gate lines and data lines formed in the display area, and a pixel circuit is formed in the pixel, and the pixel circuit is driven. A panel in which power lines are formed to supply power required for the power supply; A gate drive IC for supplying scan signals to the gate lines; A power supply unit for supplying power to the power lines; A detection unit for detecting a panel abnormality in the display area using a detection signal collected through a detection line electrically connected to the gate line; And a control unit for controlling driving of the power supply unit according to the detection result of the detection unit.

Description

Organic light emitting display device and its driving method {ORGANIC LIGHT EMITTING DISPLAY DEVICE AND DRIVING METHOD THEREOF}

The present invention relates to an organic light emitting display device, and more particularly, to an organic light emitting display device and a method of driving the same, which can prevent diffusion of panel abnormalities such as shorts, burnts or line defects generated in the organic light emitting panel. .

Flat panel display devices (FPDs) are used in various types of electronic products, including mobile phones, tablet PCs, and notebook computers. The flat panel display device includes a liquid crystal display device (LCD), a plasma display device (PDP), and a light emitting display device (EPD). Electrophoretic display devices) are also widely used.

Among them, the light emitting display device is receiving attention as a next-generation flat panel display device because the response speed is 1 ms or less, has a high-speed response speed, has low power consumption, and has no problem in viewing angle due to self-emission.

2. Description of the Related Art In general, a light emitting display device is a display device that electrically excites a light emitting material to emit light, and is classified into an inorganic light emitting display device and an organic light emitting display device according to materials and structures used.

1 is a circuit diagram schematically showing a pixel circuit of a general organic light emitting display device.

A pixel is formed in each of the regions where the gate lines and the data lines intersect on the panel of the OLED display, and a pixel circuit is formed in each of the pixels.

As illustrated in FIG. 1, the pixel circuit includes a switching transistor ST, a driving transistor DT, a capacitor C, and a light emitting device OLED.

The switching transistor ST is switched according to the scan signal supplied to the gate line GL to supply the data voltage Vdata supplied to the data line DL to the driving transistor DT.

The driving transistor DT is switched according to the data voltage Vdata supplied from the switching transistor ST to control the current flowing from the high potential driving voltage ELVDD to the light emitting device OLED. .

The capacitor C is connected to the gate terminal of the driving transistor DT, stores a voltage corresponding to the data voltage Vdata supplied to the gate terminal of the driving transistor DT, and stores the voltage as the stored voltage. Turn on (DT).

The light emitting element OLED is electrically connected between the driving transistor DT and the low potential driving voltage ELVSS and ground, and emits light by the current Ioled supplied from the driving transistor DT. At this time, the current (Ioled) flowing through the light emitting device (OLED) is determined according to the voltage between the gate-source of the driving transistor DT, the threshold voltage of the driving transistor DT and the data voltage Vdata.

The pixel circuit of the general organic light emitting display device as described above, the light emitting device (OLED) from the high potential driving voltage (ELVDD) in accordance with the data voltage (Vdata) supplied to the gate terminal of the driving transistor (DT) By controlling the magnitude of the current (Ioled) flowing to, the light emitting device (OLED) emits light, thereby displaying a predetermined image.

2 is an exemplary view showing a configuration of a general organic light emitting display device.

As shown in FIG. 1, a general organic light emitting display device includes a panel 10 in which pixels are formed in each region where gate lines and data lines intersect, and a gate drive IC for supplying a scan signal to the gate lines. (20), a source drive IC (30) for supplying a data voltage to the data lines, a timing controller (40) for controlling driving of the gate drive IC (20) and the source drive IC (30), and the A power supply unit 50 for supplying the high potential driving voltage ELVDD and the low potential driving voltage ELVSS to the pixels is included.

In a typical organic light emitting display device, as shown in FIG. 2, in the upper non-display area and the lower non-display area of the panel, a high potential driving voltage (ELVDD) line 51 and a low potential driving voltage (ELVSS) line 52 ), and the data lines DL1 to DLm extend from the source drive IC 30 so as to overlap the high potential driving voltage line 51 and the low potential driving voltage lines 52. Is formed.

In addition, in addition to the high potential driving voltage line 51 and the low potential driving voltage line 52, various types of power lines, such as a reference voltage (Vref) line, are formed to overlap data lines.

On the other hand, if the inorganic film covering the lines is damaged by damage due to various causes, or a short occurs between the lines, such as burnt and line defects, etc. Defects may occur.

In order to prevent defects such as shorts, burnts and line defects as described above, a guide ring formed in the outer portion of the active area 12, that is, a non-display area, is conventionally used. Through this, a short or burnt detection was performed.

However, conventionally, since only short, burnt, or line defects are detected in the non-display area, even if a defect occurs due to short, burnt, or line defects generated in the display area 12, proper response to the defect is generated. Could not be achieved.

That is, the overlap period as described above is formed not only in the non-display area, but also inside the display area 12. In particular, in the display area, a high potential driving voltage (ELVDD) line 51, a low potential driving voltage Power lines such as the (ELVSS) line 52, the reference voltage (Vref) line (not shown), the data line DL, the gate line GL, and the gate lines GL overlap in various forms.

Therefore, when the inorganic film insulating the lines is damaged by damage or crack, there is a high possibility that a short is generated between the lines. When a short occurs, a large amount of current flows through the lines, and accordingly, a fire is likely to occur in the gate drive IC 20 or the panel 10.

However, conventionally, as described above, since sensing lines for detecting short, burnt, or line defects in the display area 12 are not formed, short, burnt, and line defects generated in the display area 12 may be prevented. An appropriate response could not be achieved.

In addition, a method of forming an additional detection line inside the display area 12 has been proposed for detecting short, burnt, and line defects in the overlap area in the display area 12 as described above. However, in the organic light emitting display device to which such a method is applied, the aperture ratio of the display area 12 is reduced and the overlap period can be increased, and accordingly, other problems may occur.

The present invention is to solve the above-described problem, by using the detection signal collected through the gate line formed to overlap with the power lines in the display area, it is possible to detect a panel abnormality in the display area, organic It is a technical problem to provide a light emitting display device and a driving method thereof.

The organic light emitting display device according to the present invention for achieving the above-described technical problem, a pixel is formed for each crossing area of the gate lines and the data lines formed in the display area, the pixel circuit is formed in the pixel, A panel in which power lines are formed to supply power required for driving the pixel circuit; A gate drive IC for supplying scan signals to the gate lines; A power supply unit for supplying power to the power lines; A detection unit for detecting a panel abnormality in the display area using a detection signal collected through a detection line electrically connected to the gate line; And a control unit for controlling driving of the power supply unit according to the detection result of the detection unit.

A method of driving an organic light emitting display device according to the present invention for achieving the above-described technical problem is to supply power to the display area of a panel on which gate lines and data lines are formed, by supplying power to the formed power lines. Driving pixel circuits formed in the panel; Detecting a panel abnormality in the display area by using a detection signal collected through a detection line electrically connected to the gate line; And when the panel abnormality is detected, cutting off the power supplied to the power lines.

According to the present invention, since an abnormality in the panel of the display area can be detected using the detection signal collected through the gate line, there is no need to form an additional detection line in the display area.

In addition, the present invention can prevent the spread of panel abnormalities generated in the display area by detecting the panel abnormality in the display area and controlling the driving of the power supply unit or the source drive IC.

1 is a circuit diagram schematically showing a pixel circuit of a general organic light emitting display device.
2 is an exemplary view showing a configuration of a general organic light emitting display device.
3 is an exemplary view schematically showing an organic light emitting display device according to the present invention.
4 is an exemplary view schematically showing a configuration of a detection unit applied to an organic light emitting display device according to the present invention.
5 is an exemplary view showing a configuration of a detection unit applied to the organic light emitting display device according to the present invention.
6 is an exemplary view for explaining the configuration and function of the first detector applied to the organic light emitting display device according to the present invention.
7 is an exemplary view showing a modified configuration of the first detector shown in FIG. 6;
8 is an exemplary view for explaining the configuration and function of the second detector applied to the organic light emitting display device according to the present invention.
9 is an exemplary view showing a modified configuration of the second detector shown in FIG. 8;

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings.

3 is an exemplary view schematically showing an organic light emitting display device according to the present invention, and FIG. 4 is an exemplary view schematically showing a configuration of a detection unit applied to the organic light emitting display device according to the present invention.

In general, a high potential driving voltage line, a low potential driving voltage line, a reference voltage line, an input voltage line, a data line, a gate line, etc., formed on a panel for driving an organic light emitting display device, overlap in a display area of the panel It is. Therefore, when the insulating film insulating the lines is damaged by damage or the like, and shorts occur between the lines, burnt defects due to current leakage may occur.

The shorts, burnts, or line defects as described above are collectively referred to hereinafter as simply panel abnormalities. That is, in the following description, the panel abnormality means a short circuit, a burnt line, or a line defect. When the panel abnormality as described above occurs, an abnormal current or an overcurrent flows to the lines. The burnt means a fine fire generated in the panel. The line defect means a case in which an insulating film between the lines is damaged, or a case in which the lines are abnormally adjacent and a circuit problem occurs. The abnormal current is a current that flows abnormally in the lines other than the overcurrent, and means a current in which flow is not constant or a current that should not flow to the line. In the above description, it has been described that the abnormal current or the overcurrent is generated by the panel abnormality, but the phenomenon itself in which the abnormal current or the overcurrent is generated may also be included in the panel abnormality. That is, the abnormal current or the overcurrent is generated by various causes in addition to the short, burnt or line defect, and may cause problems in the panel, and thus may be included in the panel error.

In order to cope with the above panel abnormality, a method of detecting the panel abnormality has been proposed through a guide ring formed in a non-display area.

However, by the conventional method as described above, only panel abnormalities in the non-display area can be detected, and panel abnormalities occurring in the display area cannot be detected.

Accordingly, an object of the present invention is to detect a panel abnormality in a display area by using a detection signal detected through a gate line formed to overlap power lines in the display area.

To this end, the organic light emitting display device according to the present invention, as shown in Figure 3, the gate lines (GL1 to GLn), the data lines (DL1 to DLm) formed in each cross region of the pixel, and the pixel In order to supply power required for the pixel circuit formed in the panel 100, the panel 100 includes power lines 510 and 520 formed to cross the gate lines in the display area 120, and the gate lines. Gate drive IC 200 for supplying a scan signal to the source drive IC 300 for supplying a data voltage to the data lines, a power supply unit 500 for supplying the power to the power lines, the According to the detection result of the detection unit 600 and the detection unit 600 for detecting a panel abnormality in the display area 120 by using a detection signal collected through a detection line electrically connected to a gate line, And a timing controller 400 for controlling driving of the power supply unit 500.

First, a pixel is formed in each region where the gate lines GL1 to GLn and the data lines DL1 to DLm intersect in the panel 100, and a pixel circuit is formed in each of the pixels.

The pixel circuit includes a switching transistor, a driving transistor, a capacitor, and an organic light emitting device.

First, the switching transistor is switched according to the scan signal supplied to the gate line to supply the data voltage supplied to the data line to the driving transistor.

Second, the driving transistor is switched according to the data voltage supplied from the switching transistor to control the current flowing from the high potential driving voltage to the organic light emitting device.

In the pixel circuit, a plurality of transistors may be included in addition to the driving transistor and the switching transistor.

For example, since the organic light emitting device is easily deteriorated, when the organic light emitting display device is used for a long time, the quality of the organic light emitting display device may deteriorate. In order to solve this problem, the pixel circuit may include transistors for detecting characteristics for sensing the characteristics of the organic light emitting device, and transistors for compensating for deterioration of the organic light emitting device. In this case, the characteristic sensing transistors and the compensation transistors may be driven using an input voltage (Vinit) and a reference voltage (Vref). Therefore, the pixel circuit may be supplied with various levels of input voltage Vinit and reference voltage Vref in addition to the high potential driving voltage and the low potential driving voltage.

The reference voltage (Vref) and the input voltage (Vinit), as described above, for driving and compensating the organic light emitting diode (OLED), the voltage that is generally supplied to the pixel circuit, the configuration of the pixel circuit Depending on, it is composed of various levels. In addition, the transistor to which the reference voltage or the input voltage is supplied is connected to the pixel circuit in various structures, and is generally used in a pixel circuit of a general organic light emitting display device.

Accordingly, detailed descriptions of the reference voltage, the input voltage, and transistors to which the voltages are supplied are omitted.

Third, the capacitor is connected to the gate of the driving transistor, stores a voltage corresponding to the data voltage supplied to the gate terminal of the driving transistor, and turns on the driving transistor with the stored voltage.

Fourth, the organic light emitting element is electrically connected between the driving transistor and the low potential driving voltage, and emits light by a current supplied from the driving transistor. At this time, the current flowing through the light emitting element is determined according to the voltage between the gate-source of the driving transistor, the threshold voltage of the driving transistor, and the data voltage.

The pixel circuit controls the magnitude of the current (Ioled) flowing from the high potential driving voltage (ELVDD) to the light emitting device (OLED) according to the data voltage (Vdata) supplied to the gate terminal of the driving transistor, A predetermined image is displayed by emitting the organic light emitting diode (OLED).

Among the panel 100, a high-potential voltage line for supplying the high-potential voltage ELVDD to the organic light-emitting device OLED is displayed in the display area 120 where an image is output, and a low voltage is applied to the organic light-emitting device OLED. A low potential voltage line for supplying a potential voltage ELVSS, a reference voltage line 510 for supplying the reference voltage Vref to the pixel circuit, and an input for supplying the input voltage Vinit to the pixel circuit Power lines such as a voltage line 520 are formed to intersect the gate lines.

Since the voltages must be commonly supplied to all pixels formed in the display area, the power lines for transmitting the voltages are formed to cross the gate lines in the display area 120.

The data lines are also formed to cross the gate lines in the display area 120.

On the other hand, the source drive IC 300 is connected to the panel 100, the third non-display area 140 at the top of the panel and the fourth non-display area 150 at the bottom, the power supply 500 ) Are connected to the power connection lines (510a, 520a) is formed in the horizontal direction of the panel 100, as shown in FIG.

Accordingly, the power connection lines formed in the third non-display area 140 are formed to intersect with the data lines extending from the source drive IC 300.

A gate drive IC 200 is formed in the non-display area 110 of the panel, as shown in FIG. 3.

The detection line 610 connected to at least one of the gate lines through the gate drive IC 200 is formed in the non-display area, and the detection unit 600 is through the detection line 610. It is electrically connected to the gate line. The detection signal may be transmitted to the detection unit 600 through the gate drive IC 200 through the detection line 610. In this case, as illustrated in FIG. 3, through the sensing line 610, the gate high voltage VGH and gate low voltage VGL required for driving the gate drive IC 200 are the gate drive IC ( 200). However, the present invention is not limited to this. That is, the detection line 610 may perform only a function of transmitting a detection signal transmitted through the gate drive IC 200 to the detection unit 600.

Accordingly, the function of transmitting the gate high voltage VGH and the gate low voltage VGL to the gate drive IC 200 and the detection signal transmitted through the gate drive IC 200 to the detector 600. In FIG. 3, in which the sensing line 610 is shown, which performs a function of transmitting, two sensing lines 610 are formed in the non-display area 110, but only one sensing line 610 is formed. It may be formed, or three or more may be formed. That is, the sensing line 610 may be formed as many as the number of gate lines, or may be formed to correspond to gate lines spaced apart at regular intervals among the gate lines.

In addition, when the gate drive IC 200 is formed in each of the two non-display areas 110 and 130 facing each other among the non-display areas, the detection line 610 also includes the two non-display areas. It may be formed on each of (110, 130). In this case, the sensing lines 610 formed in the first non-display area 110 are connected to odd-numbered gate lines, and the second non-display area 120 facing the first non-display area 120 The sensing lines 610 formed in the may be connected to even-numbered gate lines.

In addition, in FIG. 3, it is illustrated that the power connection lines 510a and 520a do not intersect the detection line 610 in the third non-display area 140 and the fourth non-display area 150.

However, when the arrangement position of the power connection lines 510a and 520a or the detection line 610 is changed, the power connection lines 510a and 520a may intersect the detection line 610.

As described above, the sensing line 610 is connected to the gate line through the gate drive IC 200, and may be formed in at least one non-display area of the panel, and the sensing line 610 May be formed to cross the power connection lines 510a and 520a in the non-display area of the panel.

Next, the gate drive IC 200 sequentially supplies a gate-on signal to each of the gate lines using the gate control signals GCS generated by the timing controller 400.

Here, the gate-on signal refers to a voltage capable of turning on the switching thin film transistor connected to the gate lines. The voltage capable of turning off the switching thin film transistor is called a gate-off signal, and the gate-on signal and the gate-off signal are collectively referred to as a scan signal.

When the switching thin film transistor is an N type, the gate-on signal is a high-level voltage, and the gate-off signal is a low-level voltage. When the thin film transistor is of the P type, the gate-on signal is a low-level voltage, and the gate-off signal is a high-level voltage. The high-level voltage is a voltage corresponding to the gate high voltage VGH, and the low-level voltage is a voltage corresponding to the gate low voltage VGL.

The gate drive IC 200 is formed to be independent of the panel 100, and may be connected to the panel 100 through a tape carrier package (TCP) or a flexible printed circuit board (FPCB). As illustrated, it may be configured in a gate-in-panel (GIP) method mounted in the panel 100.

As described above, the gate drive IC 200 may be formed in the first non-display area 110 and the second non-display area 130 facing the panel.

In this case, the gate drive IC 200 formed in the first non-display area 110 may be connected to the detection unit 600 as illustrated in FIG. 3. In addition, the gate drive IC 200 not shown in the second non-display area 110 may be connected to the detector 600 not shown.

That is, in the organic light emitting display device according to the present invention, the gate drive IC 200 and the detection unit 600 may be formed two by one.

However, even when there are two gate drive ICs 200, only one detector 600 may be formed.

Next, the source drive IC 300 converts digital image data transmitted from the timing controller 400 into a data voltage, and the horizontal line value is equal to one horizontal line for each horizontal period during which the gate-on signal is supplied to the gate line. Data voltage is supplied to the data lines.

The source drive IC 300 may be connected to the panel 100 in the form of a chip-on film (COF), as shown in FIG. 3, mounted directly on the panel, or directly formed on the panel It might be. The number of source drive ICs 300 may be variously set according to the size of the panel, the resolution of the panel, and the like.

The source drive IC 300 converts the image data into the data voltage by using gamma voltages supplied from a gamma voltage generator (not shown), and then supplies the data voltage to the data line. . To this end, the source drive IC 300 includes a shift register unit, a latch unit, a digital-to-analog conversion unit (DAC), and an output buffer.

The shift register unit outputs a sampling signal using data control signals (SSC, SSP, etc.) received from the timing controller 400.

The latch unit latches the digital image data Data sequentially received from the timing controller 400 and simultaneously outputs the digital image conversion unit (DAC) 330.

The digital-to-analog converter converts and outputs the image data transmitted from the latch unit to the data voltage at the same time. That is, the digital-to-analog converter converts the image data into the data voltage by using the gamma voltage supplied from the gamma voltage generator (not shown), and then outputs the data voltage to the data lines. .

The output buffer outputs the data voltage transmitted from the digital-to-analog converter to the data lines (DLs) of the panel according to the source output enable signal (SOE) transmitted from the timing controller 400.

Next, the power supply unit 500 performs a function of supplying power to the power lines.

As described above, the high potential voltage ELVDD and the low potential voltage ELVSS are through the high potential voltage line and the low potential voltage line connected to the anode and cathode of the organic light emitting diode OLED. It is supplied to the organic light emitting device, the reference voltage (Vref) is supplied to the pixel circuit through the reference voltage line 510, the input voltage (Vinit) is supplied to the pixel circuit through the input voltage line 520 do.

The power supply unit 500 generates the voltage as described above, and supplies the voltage to the pixel circuit through each of the power lines.

The power connection lines 510a and 520a for connecting the power supply unit 500 and the power lines 510 and 520 may include a third non-display area 140 and a fourth non-display area ( 150), the data lines DL1 to DLm may be formed to intersect.

Next, the detection unit 600 performs a function of detecting a panel abnormality in the display area by using a detection signal collected through the gate line.

For example, the detector 600 may use the gate high voltage VGH, the gate low voltage VGL, or the gate high voltage VGH or the gate low constituting the scan signal. The panel abnormality in the display area can be detected using the current generated by the voltage VGL.

As described above, the scan signal includes the gate high voltage VGH or the gate low voltage VGL as described above, and a panel error occurs in the display area 120. Therefore, the detection unit 600 detects that the amount of voltage or current that is collected through the gate drive IC 200 is changed from the panel 100 to which the scan signal is supplied, and in the display area. It can be judged whether or not a panel error occurs.

To this end, the detection unit 600, as shown in Figure 4, through the gate drive IC 200, connected to the gate line, is transmitted from the detection line 610, the gate high voltage (VGH), a gate low voltage (VGL), or a current generated by any one of the gate high voltage and the gate low voltage is compared with a reference signal. The detection unit 600 transmits the detection signals VGL_S and VGH_S detected by the comparison to the timing controller 400.

However, the detection unit 600 is not limited to the configuration as shown in FIG. 4. That is, the detection unit 600 may be formed in various structures to detect a panel abnormality in the panel using the gate line and various types of detection signals transmitted through the gate drive IC 200. have. A specific example of the detection unit 600 will be described in detail with reference to FIGS. 5 to 8.

As described above, the detector 600 may be connected to at least one gate line among gate lines formed on the panel through the gate drive IC 200.

In this case, a circuit configuration as shown in FIG. 4 may be formed for each sensing line 610 connected to each gate line.

The detection unit 600 is connected to the gate line in the non-display area through the detection line 610, and the detection line 610 is connected to the power connection lines 510a and 520a in the non-display area. When formed to cross, the detector 600 may detect a panel abnormality in the non-display area through the sensing line 610.

Finally, the timing controller 400 uses the timing signal input from the external system, that is, the vertical synchronization signal (Vsync), the horizontal synchronization signal (Hsync), and the data enable signal (DE), to drive the gate. The gate control signal GCS for controlling the operation timing of the IC 200 and the data control signal DCS for controlling the operation timing of the source drive ICs 300 are generated, and the source drive IC 300 is generated. Create image data to be transmitted.

To this end, the timing controller 400 includes a receiving unit for receiving input image data and timing signals from the external system, a control signal generating unit for generating various control signals, and rearranging the input image data to rearrange the image. And a data alignment unit for outputting data and an output unit for outputting the control signals and the image data.

That is, the timing controller 400 rearranges the input image data input from the external system according to the structure and characteristics of the panel 100 and transmits the rearranged image data to the source drive IC 300. . This function can be executed in the data alignment unit.

The timing controller 400 uses the source drive IC by using timing signals transmitted from the external system, that is, a vertical synchronization signal (Vsync), a horizontal synchronization signal (Hsync), and a data enable signal (DE). By generating a data control signal (DCS) for controlling and a gate control signal (GCS) for controlling the gate drive IC (200), the control signals are the source drive IC (300) and the gate drive IC (200) To perform the function of transmitting. Such a function may be executed in the control signal generator.

The data control signals DCS generated by the control signal generator include a source start pulse SSP, a source shift clock signal SSC, and a source output enable signal SOE.

The gate control signals (GCS) generated by the control signal generator include a gate start pulse (GSP), a gate start signal (VST), a gate shift clock (GSC), a gate output enable signal (GOE), and a gate start signal (VST). ), gate clock (GCLK), and the like.

In addition, the timing controller 400 performs a function of controlling the driving of the power supply unit 500 according to the detection result of the detection unit 600.

That is, when it is determined that a panel error has occurred in the display area 120 as a result of analysis of the detection signals VGL_S and VGH_S transmitted through the detection unit 600, the timing controller 400 may include the power supply 500 By turning off the) function, more severe panel abnormality may not occur in the display area 120. To this end, the timing controller 400 may transmit a power control signal (PCS) to the power supply 500.

In addition, when it is determined that the panel abnormality has occurred in the display area 120, the timing controller 400 is configured not only to the power supply 500 but also to the gate drive IC 200 or the source drive IC 300. By controlling the driving, it is possible to prevent more severe panel abnormality from occurring in the display area 120. To this end, the timing controller 400 may generate various types of control signals and transmit them to the gate drive IC 200 or the source drive IC 300.

The present invention as described above is to detect the occurrence of a panel abnormality in the organic light emitting display device, and to take countermeasures therefor, using a current or voltage of a gate-on signal or a gate-off signal output to the gate line In this way, a panel abnormality in the display area 120 of the panel 100 is detected. In addition, according to the present invention, when it is determined that a panel abnormality has occurred, the driving of the power supply unit 500, the source drive IC 300, the gate drive IC 200, and the like is controlled, so that the display area 120 It is possible to prevent the panel abnormality from spreading or the power supply 500, the source drive IC 300, the gate drive IC 200, etc. being damaged.

That is, the present invention detects a change in the voltage or current supplied to the gate line formed in the display area 120, detects a panel error in the display area 120, and if a panel error occurs, the By taking measures, it is possible to prevent the panel abnormality from spreading in the display area 120.

In the above, it has been described that when a panel error occurs, the timing controller 400 controls driving of the power supply 500, the source drive IC 300, and the gate drive IC 200. However, the control as described above may be performed in other components than the timing controller 400. For example, the driver IC in which the timing controller 400 and the source drive IC 300 are integrated may perform a control function as described above, and a separate component other than the timing controller may be used. The driving of the power supply unit 500, the source drive IC 300, and the gate drive IC 200 may be controlled.

Therefore, when the panel error occurs, a component that controls driving of the power supply unit 500, the source drive IC 300, and the gate drive IC 200 is simply referred to as a control unit. However, hereinafter, for convenience of explanation, the present invention is described as an example in which the timing controller performs a function of the control unit.

5 is an exemplary view showing a configuration of a detection unit applied to the organic light emitting display device according to the present invention.

The organic light emitting display device according to the present invention, as described above, the panel 100, the gate drive IC 200, the source drive IC 300, the power supply unit 500, the detection unit 600 and It includes the timing controller 400. Hereinafter, contents identical or similar to those described with reference to FIGS. 3 and 4 will be omitted or simply described.

First, the panel 100 includes the gate lines GL, the data lines DL, the reference voltage line 510, the input voltage line 520, the high potential driving voltage line, and the low potential. A driving voltage line or the like is formed. In particular, the gate lines GL intersect the reference voltage line 510, the input voltage line 520, the high potential driving voltage line, and the low potential driving voltage line. It is formed as possible.

The reference voltage line 510 is connected to the pixel circuits, and the reference voltage Vref is supplied to the pixel circuits through the reference voltage line 510.

The input voltage line 520 is connected to the pixel circuits, and the input voltage Vinit is supplied to the pixel circuits through the input voltage line 520.

The reference voltage Vref and the input voltage Vinit are the pixel circuits for the purpose of driving the pixel circuit, compensating for deterioration of the organic light emitting device OLED, or detecting deterioration of the organic light emitting device OLED. Is supplied to.

The high potential driving voltage ELVDD and the low potential driving voltage ELVSS are supplied to the pixel circuits to drive the organic light emitting diode OLED.

Second, the gate drive IC 200 supplies the gate-on signal sequentially to the gate lines GL.

To this end, the gate drive IC 200 is electrically connected to the gate lines GL.

Third, the source drive IC 300 supplies the data voltage to the data lines DL while the gate-on signal is supplied to the gate lines GL.

Fourth, the power supply unit 500 supplies power required by the gate drive IC 200 and the data drive IC 300. For example, the power supply unit 500 generates the gate high voltage VGH and the gate low voltage VGL used to generate the scan signal, and the voltages are applied through the detection unit 600. It is supplied to the gate drive IC 200.

In addition, the power supply unit 500 generates the reference voltage Vref, the input voltage Vinit, the high potential driving voltage ELVDD, and the low potential driving voltage ELVSS, so that the power sources are It is supplied to the pixel circuits through power lines. Hereinafter, the reference voltage Vref, the input voltage Vinit, the high potential driving voltage, and the low potential driving voltage are collectively referred to as a power source. Accordingly, the power source used below may be the reference voltage Vref, the input voltage Vinit, the high potential driving voltage, or the low potential driving voltage. . However, hereinafter, for convenience of description, the reference voltage or the input voltage is referred to as the power source.

Particularly, the power supply unit 500 applied to the present invention uses the gate high voltage VGH and the gate low voltages VGL supplied to the gate drive IC 200, so that the power, that is, the The reference voltage Vref and the input voltage Vinit are generated. Hereinafter, the gate high voltage and the gate low voltage are collectively referred to as a gate voltage. In addition, hereinafter, for convenience of description, the gate low voltage is referred to as a first gate voltage, and the gate high voltage is referred to as a second gate voltage.

Accordingly, the power supply unit 500 performs the function of generating the gate voltage used to generate the scan signal and supplying the gate voltage to the gate drive IC 200 through the detection unit 600. Can be.

In addition, the power supply unit 500 may generate the power using the gate voltage and perform a function of supplying the power to the power lines.

To this end, the power supply unit 500, as shown in Figure 5, the first output unit 510 for outputting the first gate voltage to the detection unit 600, the second gate voltage to the detection unit 600 It includes a second output unit 520 outputting the output and the power generator 530 for generating the power using the first gate voltage and the second gate voltage.

For example, the first output unit may generate the gate low voltage, the second output unit may generate the gate high voltage, and the power generator 530 may generate the reference voltage Vref. .

Fifth, the detector 600 may detect a panel abnormality in the display area by using a current induced through the sensing line 610 that supplies the gate voltage to the gate drive IC 200. .

To this end, the detection unit 600, the gate voltage, the gate voltage transmitter for transmitting to the gate drive IC through the detection line, and through the gate line and the gate drive IC and the detection line 610, When the overcurrent is transmitted, it includes a detection signal transmitter that generates a detection signal and transmits it to the timing controller 400.

As described above, the gate voltage is at least one of the first gate driving voltage used for generating the gate-off signal among the scan signals or the second gate driving voltage used for generating the gate-on signals among the scan signals. It can be either. Hereinafter, the present invention will be described with an example in which the sensing line 610 is composed of a first sensing signal transmission line and a second sensing signal transmission line.

In this case, the detector 600 transmits the first gate driving voltage to the gate drive IC 200 through the first sensing signal transmission line, and transmits the second gate driving voltage to the second sensing signal. Transmitting to the gate drive IC 200 through a line, and using the first current induced through the first sensing signal transmission line or the second current induced through the second sensing signal transmission line, the panel error Can be detected.

For example, when a panel error such as a short occurs between the power lines or between the gate line and the power line, current consumption increases, so that an overcurrent flows to the gate line.

In this case, the overcurrent is induced to the detection line 610 through the gate drive IC 200 electrically connected to the gate line, and finally to the detection unit 600.

Therefore, when the overcurrent is induced through the detection line 610, the detection unit 600 determines that a panel error has occurred in the panel, and generates the detection signal. The detection signal is transmitted to the timing controller 400, and the timing controller 400 receiving the detection signal includes the gate drive IC 200, the source drive IC 300, and the power supply unit 500. ) Can be stopped.

The detection unit 600 may determine whether or not the panel error occurs using the first gate driving voltage or the second gate driving voltage, but uses both the first gate driving voltage and the second gate driving voltage. By doing so, it may be possible to determine whether the panel error occurs.

In this case, the detector 600 transmits the first gate driving voltage to the gate drive IC 200 through the first sensing signal transmission line, as shown in FIG. 5, and the first sensing The first detector 610 and the second gate driving voltage for detecting the panel abnormality are transmitted to the gate drive IC 200 through the second sensing signal transmission line by using the current transmitted through the signal transmission line. And, it may include a second detector for detecting the panel error using the current transmitted through the second detection signal transmission line.

The detailed configuration and function of the detection unit 600 will be described in detail with reference to FIGS. 6 to 9.

Sixth, the timing controller 400, the gate drive IC 200, the source drive IC 300, the power supply when the detection signal indicating that the panel error has been transmitted from the detection unit 600 At least one of the 500 may be stopped. In particular, when the power is supplied to the power line in a state in which the panel error occurs, there is a high possibility that the panel 100, the gate drive IC 200 and the source drive IC 300 are damaged. Therefore, when the detection signal is transmitted, the timing controller 400 may preferentially stop the operation of the power supply unit 500.

When explaining the driving method of the organic light emitting display device according to the present invention described above is as follows.

For example, in the method of driving an organic light emitting display device according to the present invention, in the display area 120 of the panel 100 in which gate lines and data lines are formed, a power line formed to cross the gate lines In order to supply power, driving the pixel circuits formed on the panel 100, using the detection signal collected through the detection line 610 electrically connected to the gate line, the display And detecting a panel abnormality in the region 120 and, when the panel abnormality is detected, cutting off the power supplied to the power lines.

Here, the driving of the pixel circuits may include generating a gate voltage used to generate a scan signal supplied to the gate line, supplying the gate voltage to the gate lines, and using the gate voltage to power the power. And supplying the power to the power lines.

In addition, in the step of detecting the panel abnormality, the detection unit 600 uses the current induced through the sensing line 610 electrically connected to the gate line to detect the panel abnormality in the display area. Can be detected.

In particular, when the overcurrent is transmitted through the detection line, the detection unit 600 may determine that the panel error is detected.

6 is an exemplary view for explaining the configuration and function of a first detector applied to an organic light emitting display device according to the present invention, and FIG. 7 is an exemplary view showing a modified configuration of the first detector shown in FIG. 6.

The detector 600 transmits the first gate driving voltage to the gate drive IC 200 through the first sensing signal transmission line, as shown in FIG. 5, and the first sensing signal transmission line. The first detector 610 and the second gate driving voltage for detecting the panel abnormality are transmitted to the gate drive IC 200 through the second sensing signal transmission line using the current transmitted through the, And a second detector for detecting the panel abnormality using the current transmitted through the second sensing signal transmission line.

The first detector 610 transmits the first gate driving voltage to the gate drive IC 200 through the first sensing signal transmission line, as shown in FIG. 6(a). When an overcurrent is transmitted through the gate voltage transmitter 611, the gate line, the gate drive IC 200, and the first detection signal transmission line, a first detection signal VGL_S is generated and transmitted to the timing controller And a first detection signal transmitter 612. Here, the first gate driving voltage may be the gate low voltage VGL capable of turning off the switching transistor formed in the pixel circuit among the scan signals.

The first gate voltage transmitter 611 includes resistors R1 and R2 connected to the first gate voltage VGL supplied from the power supply 500, and the first gate voltage VGL ) To the gate drive IC 200 through the first detection signal transmission line.

In the first detection signal transmitter 612, a first terminal is connected to the first gate voltage transmitter 611 and a second terminal (gate terminal) is connected through the first sensing signal transmission line. The first transistor TR1 turned on by overcurrent, and the third signal of the first transistor connected to the third terminal of the first transistor TR1 when turned on by the overcurrent, the detection signal indicating that the panel error has occurred It includes a first detection signal generator for transmitting to the timing controller 400. The first detection signal generator may include a first detection power supply V1, a fifth resistor R5, a diode D, and a fourth resistor R4, as shown in FIG. 6(a). have. A third resistor R3 may be connected between the first transistor TR1 and the first detection signal generator.

First, in the panel 100, when the panel error does not occur, the operation method of the first detector 610 will be described with reference to FIG. 6B.

When the panel error does not occur in the panel 100, an overcurrent is not supplied to the detection unit through the gate line, the gate drive IC 200 and the detection line 610. Therefore, the first transistor TR1 configured as an N type is turned off.

As the first transistor TR1 is turned off, the first gate voltage transmitter 611 and the first detection signal transmitter 612 are individually driven.

Therefore, the first gate driving voltage VGL is transmitted to the gate drive IC 200 through the first gate voltage transmitter 611 and the sensing line 610.

In this case, in the first detection signal generator, a high-level detection signal V _H is output by the first detection power source V1, and the high-level detection signal V _H is the timing controller 400. ).

The timing controller, which has received the high level detection signal V _H , determines that a panel error has not occurred in the panel, and drives the power supply 500 normally.

Second, in the panel 100, when the panel error occurs, the operation method of the first detector 610 will be described with reference to FIG. 6C.

When the panel error occurs in the panel 100, overcurrent is supplied to the detection unit through the gate line, the gate drive IC 200, and the detection line 610. Therefore, the first transistor TR1 configured as an N type is turned on.

As the first transistor TR1 is turned on, the first gate voltage transmitter 611 and the first detection signal transmitter 612 are electrically connected.

In this case, in the first detection signal generator, the current generated by the first detection power source V1 is distributed to the first transistor TR1 and the diode D. Therefore, a low-level detection signal V _L is output from the cathode terminal of the diode D, and the low-level detection signal V _L is transmitted to the timing controller 400.

The timing controller receiving the low level detection signal V _L determines that a panel error has occurred in the panel, and stops driving the power supply unit 500.

As described above, the first detector 610 that supplies the first gate driving voltage VGL to the gate drive IC 200 includes the gate line, the gate drive IC 200, and the sensing line ( When the overcurrent is not transmitted through 610, a high level detection signal V _H is transmitted to the timing controller 400, and the gate line, the gate drive IC 200, and the detection line 610 are transmitted. When the overcurrent is transmitted through, the low-level detection signal V _L is transmitted to the timing controller 400.

The timing controller 400 normally drives the power supply 500 when a high level detection signal V _H is transmitted, and when the low level detection signal V _L is transmitted, the power supply By stopping the driving of the supply unit 500, it is possible to prevent damage to the panel 100, the gate drive IC 200, the source drive IC 300, and the power supply unit 500.

The level of the detection signal VGL_S output from the first detector 610 may be variously set according to a method of connecting a plurality of resistors as shown in FIG. 7.

For example, the first resistor R1 and the second resistor R2 may be replaced by a plurality of resistors R1a to R1g connected in parallel, and the third resistor R3 in parallel. The plurality of resistors R3a and R3b connected may be replaced, and the fourth resistor R4 may be replaced by a plurality of resistors R4a, R4b, and R4c connected in series or in parallel, and the fifth The resistor R5 may be replaced by a plurality of resistors R5a and R5b connected in parallel.

8 is an exemplary view for explaining the configuration and function of a second detector applied to the organic light emitting display device according to the present invention, and FIG. 9 is an exemplary view showing a modified configuration of the second detector shown in FIG. 8.

The detector 600 transmits the first gate driving voltage to the gate drive IC 200 through the first sensing signal transmission line, as shown in FIG. 5, and the first sensing signal transmission line. The first detector 610 and the second gate driving voltage for detecting the panel abnormality are transmitted to the gate drive IC 200 through the second detection signal transmission line using the current transmitted through the, It may include a second detector for detecting the panel abnormality using the current transmitted through the second detection signal transmission line.

The second detector 620 transmits the second gate driving voltage to the gate drive IC 200 through the second sensing signal transmission line, as shown in FIG. 8(a). When an overcurrent is transmitted through the gate voltage transmitter 621, the gate line, the gate drive IC 200, and the second detection signal transmission line, a second detection signal VGH_S is generated and transmitted to the timing controller And a second detection signal transmitter 622. Here, the second gate driving voltage may be the gate high voltage VGH capable of turning on a switching transistor formed in the pixel circuit among the scan signals.

The second gate voltage transmitter 621 includes a sixth resistor (R6) connected to the second gate voltage (VGH) supplied from the power supply unit 500, and the second gate voltage (VGH) To the gate drive IC 200 through the second sensing signal transmission line.

In the second detection signal transmitter 622, a first terminal is connected to the second gate voltage transmitter 621 and a second terminal (gate terminal) is connected through the second sensing signal transmission line. The second transistor TR2 turned on by an overcurrent, and the third signal of the second transistor connected to the third terminal, and when the second transistor TR1 is turned on by the overcurrent, the detection signal indicating that the panel error has occurred It includes a second detection signal generator for transmitting to the timing controller 400. The second detection signal generator may include a second detection power source V2, a third transistor TR3, and an eighth resistor R8, as shown in FIG. 8(a). A seventh resistor R7 may be connected between the second transistor TR2 and the second detection signal generator.

First, in the panel 100, when the panel error does not occur, the operation method of the second detector 620 will be described with reference to FIG. 8B.

When the panel error does not occur in the panel 100, an overcurrent is not supplied to the detection unit through the gate line, the gate drive IC 200, and the detection line 610. Therefore, the second transistor TR2 configured as a P type is turned off.

As the second transistor TR2 is turned off, the second gate voltage transmitter 621 and the second detection signal transmitter 622 are individually driven.

Accordingly, the second gate driving voltage VGH is transmitted to the gate drive IC 200 through the second gate voltage transmitter 621 and the sensing line 610.

In this case, in the second detection signal generator, since the current generated by the second detection power source V2 does not pass through the third transistor TR3, the third transistor TR3 and the eighth At the node between the resistors R8, a low-level detection signal V _L is output, and the low-level detection signal V _L is transmitted to the timing controller 400.

The timing controller, which has received the low level detection signal V _L , determines that a panel error has not occurred in the panel, and drives the power supply 500 normally.

Second, in the panel 100, when the panel error occurs, the operation method of the second detector 620 will be described with reference to FIG. 8C.

When the panel error occurs in the panel 100, overcurrent is supplied to the detection unit through the gate line, the gate drive IC 200, and the detection line 610. Therefore, the second transistor TR2 configured as a P type is turned on.

As the second transistor TR2 is turned on, the third transistor TR3 is also turned on.

In this case, in the second detection signal generator, since the current generated by the second detection power source V2 passes through the third transistor TR3, the third transistor TR3 and the eighth resistor ( In the node between R8), a high level detection signal V _H is output, and the high level detection signal V _H is transmitted to the timing controller 400.

The timing controller, which has received the detection signal V _H of the high level, determines that a panel error has occurred in the panel, and stops driving the power supply unit 500.

As described above, the second detector 620 that supplies the second gate driving voltage VGH to the gate drive IC 200 includes the gate line, the gate drive IC 200 and the sensing line ( When the overcurrent is not transmitted through 610), a low-level detection signal V _L is transmitted to the timing controller 400, and the gate line, the gate drive IC 200, and the detection line 610 are transmitted. When an overcurrent is transmitted through, a high level detection signal V _H is transmitted to the timing controller 400.

When the low-level detection signal V _L is transmitted, the timing controller 400 normally drives the power supply 500 and when the high-level detection signal V _H is transmitted, the power By stopping the driving of the supply unit 500, it is possible to prevent damage to the panel 100, the gate drive IC 200, the source drive IC 300, and the power supply unit 500.

The level of the detection signal VGH_S output by the second detector 620 may be variously set according to a connection method of a plurality of resistors as shown in FIG. 9.

For example, the sixth resistor R6 may be replaced by a plurality of resistors R6a to R6g connected in parallel, and the seventh resistor R7 may include a plurality of resistors R7a to connected in parallel. R7d).

Those skilled in the art to which the present invention pertains will appreciate that the present invention may be implemented in other specific forms without changing its technical spirit or essential characteristics. Therefore, it should be understood that the embodiments described above are illustrative in all respects and not restrictive. The scope of the present invention is indicated by the following claims rather than the above detailed description, and it should be interpreted that all changes or modifications derived from the meaning and scope of the claims and equivalent concepts are included in the scope of the present invention. do.

100: panel 200: gate drive IC
300: source drive IC 400: timing controller
500: power supply 600: detection unit

Claims (21)

A pixel is formed in a crossing region between gate lines and data lines formed in the display area, a pixel circuit is formed in the pixel, and power lines are formed to supply power required to drive the pixel circuit. panel;
A gate drive IC for supplying scan signals to the gate lines;
A power supply unit for supplying power to the power lines;
A detection unit for detecting a panel abnormality in the display area using a detection signal collected through a detection line electrically connected to the gate line; And
According to the detection result of the detection unit, a control unit for controlling the driving of the power supply unit,
The sensing line is electrically connected to at least one of the gate lines through the gate drive IC, and at least a portion of the sensing line is disposed in a non-display area of the panel,
The detection unit,
And detecting the panel abnormality using a current generated by a gate high voltage or a gate low voltage constituting the scan signal. According to claim 1,
The power lines,
High-potential voltage line for supplying a high-potential voltage (ELVDD) to the organic light-emitting device, low-potential voltage line for supplying a low-potential voltage (ELVSS) to the organic light-emitting device, a reference voltage required for driving the organic light-emitting device ( Vref) is an at least one of a reference voltage line for supplying the pixel and an input voltage line for supplying the input voltage Vinit required for driving the organic light emitting device to the pixel. According to claim 1,
The detection unit,
An organic light emitting display device for detecting the panel abnormality by using the gate high voltage constituting the scan signal or by using the gate low voltage constituting the scan signal. According to claim 1,
The detection unit transmits the detection signal generated using the gate line and the detection signal transmitted through the gate drive IC to the control unit,
The control unit stops driving the power supply unit when the detection signal is transmitted indicating that the panel error has occurred. According to claim 1,
The two gate drive ICs are formed in each of the two non-display areas facing each other among the non-display areas of the panel,
An organic light emitting display device, wherein the detection unit is connected to each of the two gate drive ICs. According to claim 1,
The detection unit,
An organic light emitting display device, which is electrically connected to at least one of the gate lines formed on the panel through the gate drive IC. According to claim 1,
The control unit,
When the detection signal indicating that the panel error has occurred is received from the detection unit, the organic light emitting display device stops driving the source drive IC or the power supply unit that supplies a data voltage to the gate drive IC or the data lines. According to claim 1,
The power supply unit generates a gate voltage used to generate the scan signal, supplies the gate voltage to the gate drive IC through the detection unit, generates the power using the gate voltage, and supplies the power to the An organic light emitting display device that supplies power lines. The method of claim 8,
The detection unit detects the panel abnormality by using a current induced through the detection line that supplies the gate voltage to the gate drive IC. The method of claim 8,
The detection unit,
A gate voltage transmitter transmitting the gate voltage to the gate drive IC through the sensing line; And
And a detection signal transmitter that generates a detection signal indicating that the overcurrent has occurred and transmits it to the control unit when an overcurrent is transmitted through the gate line, the gate drive IC, and the detection line. The method of claim 10,
The gate voltage may be at least one of a first gate driving voltage used for generating a gate-off signal among the scan signals or a second gate driving voltage used for generating a gate-on signal among the scan signals. . The method of claim 8,
The gate voltage includes a first gate driving voltage used for generating a gate-off signal among the scan signals and a second gate driving voltage used for generating a gate-on signal among the scan signals,
The sensing line includes a first sensing signal transmission line and a second sensing signal transmission line, an organic light emitting display device. The method of claim 12,
The detection unit,
The first gate driving voltage is transmitted to the gate drive IC through the first detection signal transmission line, and the second gate driving voltage is transmitted to the gate drive IC through the second detection signal transmission line,
An organic light emitting display device for detecting the panel abnormality using the first current induced through the first sensing signal transmission line or the second current induced through the second sensing signal transmission line. The method of claim 12,
The detection unit,
A first detector for transmitting the first gate driving voltage to the gate drive IC through the first sensing signal transmission line, and detecting the panel abnormality using a current transmitted through the first sensing signal transmission line; And
A second detector for transmitting the second gate driving voltage to the gate drive IC through the second sensing signal transmission line, and detecting the panel abnormality using the current transmitted through the second sensing signal transmission line. Including, organic light emitting display device. The method of claim 14,
The first detector,
A first gate voltage transmitter transmitting the first gate driving voltage to the gate drive IC through the first sensing signal transmission line; And
And a first detection signal transmitter for generating a first detection signal indicating that the overcurrent has occurred when the overcurrent is transmitted through the gate line, the gate drive IC, and the first detection signal transmission line, and transmitting the first detection signal to the control unit. , Organic light emitting display device. The method of claim 15,
The second detector,
A second gate voltage transmitter for transmitting the second gate driving voltage to the gate drive IC through the second sensing signal transmission line; And
And a second detection signal transmitter which generates a second detection signal indicating that the overcurrent has occurred when the overcurrent is transmitted through the gate line, the gate drive IC, and the second detection signal transmission line, and transmits the second detection signal to the control unit. , Organic light emitting display device. Supplying power to the display area of the panel on which the gate lines and data lines are formed, to the formed power lines, to drive pixel circuits formed in the panel;
Detecting a panel abnormality in the display area by using a detection signal collected through a detection line electrically connected to the gate line; And
And when the panel abnormality is detected, cutting off the power supplied to the power lines,
The sensing line is electrically connected to at least one of the gate lines through a gate drive IC for supplying a scan signal to the gate line, and at least a portion of the sensing line is disposed in a non-display area of the panel,
The step of detecting an abnormality in the panel in the display area,
A method of driving an organic light emitting display device, wherein the panel abnormality is detected using a current generated by a gate high voltage or a gate low voltage constituting the scan signal. The method of claim 17,
Driving the pixel circuits,
Generating a gate voltage used to generate the scan signal supplied to the gate line, and supplying the gate voltage to the gate lines; And
And generating the power using the gate voltage and supplying the power to the power lines. The method of claim 18,
The step of detecting the panel error,
A method of driving an organic light emitting display device, wherein the panel abnormality is detected using a current induced through the sensing line that is electrically connected to the gate line. The method of claim 18,
The step of turning off the power,
When a detection signal is transmitted indicating that the panel error has occurred, the method of driving the organic light emitting display device to stop driving of the power supply unit for generating the power. According to claim 1,
When a short circuit occurs between the power lines or between the gate lines and the power lines, the panel detects an abnormality in the panel in the display area through the sensing line electrically connected to at least one of the gate lines. Light emitting display device.

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