KR20210082702A - Display device, driving circuit and driving method - Google Patents

Abstract

Embodiments of the present invention relate to a display device, a driving circuit and a driving method. Provided are a display device, a driving circuit and a driving method, wherein when driving frequency of the display device is reduced, the data voltage is updated according to a change in the pixel current flowing through a monitoring subpixel, thereby improving flicker caused by the reduction in the driving frequency. The display device includes: a display panel in which a plurality of gate lines, a plurality of data lines, and a plurality of sub-pixels are disposed; a gate driving circuit for driving the plurality of sub-pixels through the plurality of gate lines; a data driving circuit for supplying a data voltage to the plurality of sub-pixels through the plurality of data lines; a data voltage control circuit sensing a pixel current flowing through the monitoring subpixel among the plurality of subpixels to generate a flag signal for updating the data voltage; and a timing controller controlling the data driving circuit to update the data voltage according to the flag signal.

Description

Display device, driving circuit and driving method

Embodiments of the present invention relate to a display device, a driving circuit, and a driving method.

As the information society develops, the demand for a display device that displays an image is increasing, and various types of display devices such as a liquid crystal display device and an organic light emitting display device are utilized.

Among these display devices, the organic light emitting display device provides advantages in response speed, contrast ratio, luminous efficiency, luminance, and viewing angle by using an organic light emitting diode that emits light by itself.

Such an organic light emitting display device may display an image by controlling the luminance of each subpixel by emitting light by controlling the current flowing through the organic light emitting diode disposed in each subpixel of the display panel.

In this case, the current flowing through the organic light emitting diode during the period in which the organic light emitting diode emits light may decrease due to leakage current in the sub-pixel, etc., and due to the decrease in the amount of current driving the organic light emitting diode, the organic light emitting diode The luminance indicated by may decrease.

In particular, when a still image is displayed for a long time, the display device is driven at a low driving frequency to reduce power consumption, etc., but the degree of decrease in luminance may increase due to the driving current reduced during the light emission period due to leakage current. Also, there is a problem that such a decrease in luminance may be recognized as flicker.

Embodiments of the present invention may provide a display device, a driving circuit, and a driving method capable of reducing power consumption by reducing the driving frequency of the display device and improving flicker due to the reduced driving frequency.

Embodiments of the present invention provide a display device capable of improving flicker due to a reduction in driving frequency by updating a data voltage according to a change in pixel current flowing through a monitoring sub-pixel when the driving frequency of the display device is reduced, and a driving circuit, and A driving method may be provided.

In one aspect, embodiments of the present invention include a display panel in which a plurality of gate lines, a plurality of data lines, and a plurality of sub-pixels are disposed, and a gate driving circuit for driving a plurality of sub-pixels through the plurality of gate lines; , a data driving circuit for supplying a data voltage to a plurality of sub-pixels through a plurality of data lines, and sensing a pixel current flowing in a monitoring sub-pixel among the plurality of sub-pixels to generate a flag signal for updating the data voltage Provided is a display device comprising: a data voltage control circuit for controlling a data voltage; and a timing controller for controlling a data driving circuit to update a data voltage according to a flag signal.

In one aspect, a monitoring sub-pixel provides a display device in which all or a part of a sub-pixel is disposed in a display area where an image is displayed.

In one aspect, a subpixel disposed in the display area includes a light emitting device, a driving transistor for driving the light emitting device, a switching transistor electrically connected between a gate node and a data line of the driving transistor, a gate node of the driving transistor, and a source A storage capacitor electrically connected between a node or a drain node, and a sensing transistor electrically connected between a source node or a drain node of the driving transistor and an anode electrode of the light emitting device to sense a pixel current flowing through the driving transistor A display device is provided.

In one aspect, the monitoring subpixel provides a display device in which all or part of the subpixel is disposed in a dummy area where no image is displayed.

In one aspect, the subpixel disposed in the dummy region includes a driving transistor, a switching transistor electrically connected between a gate node of the driving transistor and a data line, a gate node of the driving transistor, and a source node or a drain node electrically connected to each other. Provided is a display device including a storage capacitor, a sensing transistor electrically connected to a source node or a drain node of the driving transistor to sense a pixel current flowing through the driving transistor, and a light emitting device electrically shorted from the driving transistor do.

In one aspect, the data voltage control circuit provides a display device operated in a period in which the display panel is driven in a low power mode.

In one aspect, the data voltage control circuit includes a look-up table for storing a reference value of the pixel current, a current-voltage conversion circuit for converting the sensed pixel current into a voltage, and a current-to-voltage conversion circuit for converting an output voltage of the voltage conversion circuit to a digital voltage Provided is a display device comprising: an analog-to-digital conversion circuit; and a comparison circuit that compares a digital voltage with a reference value stored in the lookup table and outputs a flag signal according to a comparison result.

In one aspect, the reference value provides a display device that is changed according to an operating temperature or a set luminance.

In one aspect, the data driving circuit and the data voltage control circuit provide a display device configured as one integrated circuit.

In another aspect, embodiments of the present invention provide a gate driving circuit for driving a plurality of sub-pixels through a plurality of gate lines connected to a display panel, and a plurality of sub-pixels through a plurality of data lines connected to the display panel. a data driving circuit for supplying a data voltage; and a data voltage control circuit for sensing a pixel current flowing through a monitoring subpixel among a plurality of subpixels, and controlling to update a data voltage for a subpixel having a sensed pixel current equal to or less than a reference value; A driving circuit comprising:

In another aspect, in the embodiments of the present invention, a plurality of data lines and a plurality of gate lines are disposed, and a plurality of sub-subordinates are arranged in a region where the plurality of data lines and the gate lines intersect to emit light through a driving transistor. A method of driving a display device comprising a display panel on which pixels are disposed, a data driving circuit driving a plurality of data lines, and a gate driving circuit driving a plurality of gate lines, wherein a scan signal is applied through the gate lines to turn on a switching transistor constituting the subpixel; and supplying a data voltage (Vdata) to the driving transistor constituting the subpixel through the turned-on switching transistor to turn on the driving transistor; , turning on a sensing transistor connected to the driving transistor to sense a pixel current flowing through the turned-on driving transistor, comparing the sensed pixel current with a reference value, and controlling the data voltage to be updated according to the comparison result It provides a driving method comprising a.

According to embodiments of the present invention, it is possible to provide a display device, a driving circuit, and a driving method capable of reducing power consumption by reducing the driving frequency of the display device and improving flicker caused by the driving frequency reduction.

In addition, according to embodiments of the present invention, when the driving frequency of the display device is reduced, the data voltage is updated according to the change in the pixel current flowing in the monitoring subpixel, thereby improving the display capable of improving flicker due to the reduction in the driving frequency. An apparatus, a driving circuit, and a driving method can be provided.

1 is a view showing a schematic configuration of a display device according to embodiments of the present invention.
2 is a diagram illustrating a circuit structure of sub-pixels SP arranged in a display device.
3 is a diagram illustrating changes in pixel current and pixel luminance flowing through a sub-pixel in a low-power mode of a display device.
4 is a diagram illustrating a circuit structure of a sub-pixel SP arranged in a display device according to embodiments of the present invention.
5 is a diagram illustrating a configuration of a data voltage control circuit that controls to update a data voltage applied to a sub-pixel using a sensing current in a display device according to embodiments of the present invention.
6 is a signal flow diagram illustrating a process of updating a data voltage applied to a sub-pixel using a sensing current in a display device according to embodiments of the present invention.
7A to 7C are diagrams illustrating a case in which pixel current is sensed in a display area in a display device according to embodiments of the present invention.
8 is a block diagram illustrating a configuration of a display apparatus according to embodiments of the present invention.
9 is a diagram illustrating a process of sensing a pixel current in a sub-pixel located in a display area in a driving method according to embodiments of the present invention.
10 is a diagram illustrating a signal flow diagram of a process of sensing a pixel current in a sub-pixel positioned in a display area in a driving method according to embodiments of the present invention.
11 is a diagram illustrating a signal flow diagram of a process of sensing a pixel current in some subpixels of a display area in a driving method according to embodiments of the present invention.
12A and 12B are diagrams illustrating a case in which a pixel current is sensed in a dummy area of a display panel in a display device according to embodiments of the present invention.
13 is a block diagram illustrating a configuration for sensing a pixel current through a subpixel of a dummy region in a display device according to embodiments of the present invention.
14 is a diagram illustrating a process of sensing a pixel current in a subpixel disposed in a dummy region in a driving method according to embodiments of the present invention.
15 is a diagram illustrating a signal flow diagram of a process of sensing a pixel current in a subpixel disposed in a dummy area in a driving method according to embodiments of the present invention.
16 is a block diagram illustrating a configuration in which a data voltage control circuit is located outside a driving circuit in a display device according to embodiments of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, some embodiments of the present invention will be described in detail with reference to exemplary drawings. In adding reference numerals to components of each drawing, the same components may have the same reference numerals as much as possible even though they are indicated in different drawings. In addition, in describing the present invention, if it is determined that a detailed description of a related known configuration or function may obscure the gist of the present invention, the detailed description may be omitted. When "includes", "having", "consisting of", etc. mentioned in this specification are used, other parts may be added unless "only" is used. When a component is expressed in a singular, it may include a case in which the plural is included unless otherwise explicitly stated.

In addition, in describing the components of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used. These terms are only for distinguishing the elements from other elements, and the essence, order, order, or number of the elements are not limited by the terms.

In the description of the positional relationship of the components, when two or more components are described as being "connected", "coupled" or "connected", the two or more components are directly "connected", "coupled" or "connected" ", but it will be understood that two or more components and other components may be further "interposed" and "connected," "coupled," or "connected." Here, other components may be included in one or more of two or more components that are “connected”, “coupled” or “connected” to each other.

In the description of the temporal flow relation related to the components, the operation method, the manufacturing method, etc., for example, a temporal precedence relationship such as "after", "after", "after", "before", etc. Or, when a flow precedence relationship is described, it may include a case where it is not continuous unless "immediately" or "directly" is used.

On the other hand, when numerical values or corresponding information (eg, level, etc.) for a component are mentioned, even if there is no explicit description, the numerical value or the corresponding information is based on various factors (eg, process factors, internal or external shock, Noise, etc.) may be interpreted as including an error range that may occur.

1 is a view showing a schematic configuration of a display device according to embodiments of the present invention.

Referring to FIG. 1 , a display device 100 according to embodiments of the present invention includes a display panel 110 , a gate driving circuit 120 , a data driving circuit 130 , and a timing controller T-CON 140 . may include.

The display panel 110 receives the scan signal SCAN transmitted from the gate driving circuit 120 through the gate line GL and the data voltage Vdata transmitted from the data driving circuit 130 through the data line DL. based on the image.

Display panel 110 includes a liquid crystal layer formed between two substrates, TN (Twisted Nematic) mode, VA (Vertical Alignment) mode, IPS (In Plane Switching) mode, FFS (Fringe Field Switching) mode, etc. It may be operated in any mode.

A plurality of sub-pixels SP constituting the display panel 110 may be defined by a plurality of data lines DL and a plurality of gate lines GL. One sub-pixel SP is a thin film transistor (TFT) formed in a region where one data line DL and one gate line GL intersect, and an organic light emitting diode charging the data voltage Vdata. It may include a light emitting device such as (OLED), a storage capacitor (Cst) electrically connected to the light emitting device to maintain a voltage, and the like.

For example, in the case of the display apparatus 100 having a resolution of 2,160 X 3,840, 2,160 gate lines GL and 3,840 data lines DL may be provided, and these gate lines GL and data lines ( Subpixels SP will be respectively disposed at points where DLs intersect.

The timing controller 140 controls the gate driving circuit 120 and the data driving circuit 130 . The timing controller 140 receives timing signals such as a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE, and a main clock MCLK from a host system (not shown). and the data voltage Vdata of the image signal.

The timing controller 140 is a gate driving circuit based on scan timing control signals, such as a gate start pulse (GSP), a gate shift clock (Gate Shift Clock), and a gate output enable signal (GOE). (120) is controlled. In addition, the timing controller 140 is based on data timing control signals such as a source sampling clock (Source Sampling Clock, SSC), a polarity control signal (Polarity, POL), and a source output enable signal (SOE). The data driving circuit 130 is controlled.

The gate driving circuit 120 sequentially drives the plurality of gate lines GL by sequentially supplying the scan signal SCAN to the display panel 110 through the plurality of gate lines GL. Here, the gate driving circuit 120 is also referred to as a scan driving circuit or a gate driving integrated circuit (GDIC).

The gate driving circuit 120 may include one or more gate driver integrated circuits (GDICs), and may be located on only one side or both sides of the display panel 110 depending on the driving method. have. Alternatively, the gate driving circuit 120 may be built in a bezel region of the display panel 110 to be implemented in the form of a gate in panel (GIP).

The gate driving circuit 120 sequentially supplies the scan signal SCAN of an on voltage or an off voltage to the plurality of gate lines GL under the control of the timing controller 140 . To this end, the gate driving circuit 120 may include a shift register, a level shifter, or the like.

The data driving circuit 130 receives the data voltage Vdata from the timing controller 140 and supplies it to the plurality of data lines DL, thereby driving the plurality of data lines DL. Here, the data driving circuit 130 is also referred to as a source driving circuit or a source driver integrated circuit (SDIC).

The data driving circuit 130 may include one or more source driving integrated circuits (SDICs), and the source driving integrated circuits (SDICs) may be configured to use a Tape Automated Bonding (TAB) method or a Chip On Glass (COG) method for the display panel 110 . ) may be connected to a bonding pad or directly disposed on the display panel 110 . In some cases, each source driving integrated circuit SDIC may be integrated and disposed on the display panel 110 . In addition, each source driving integrated circuit (SDIC) may be implemented in a COF (Chip On Film) method. In this case, each source driving integrated circuit (SDIC) is mounted on a circuit film, and the display panel is passed through the circuit film. It may be electrically connected to the data line DL of 110 .

When a specific gate line GL is turned on by the gate driving circuit 120 , the data driving circuit 130 converts the data voltage Vdata received from the timing controller 140 into an analog image data voltage. It is supplied to a plurality of data lines DL.

The data driving circuit 130 may be located only above or below the display panel 110 , or may be located at both the top and bottom of the display panel 110 according to a driving method or a design method.

The data driving circuit 130 may include a shift register, a latch circuit, a digital to analog converter (DAC), an output buffer, and the like. Here, the digital-to-analog converter DAC is configured to convert the data voltage Vdata received from the timing controller 140 into an analog image data voltage to supply it to the data line DL.

Meanwhile, the display apparatus 100 may further include a memory MEM. The memory MEM may temporarily store the data voltage Vdata output from the timing controller 140 , and may output the data voltage Vdata to the data driving circuit 130 at a specified timing. The memory MEM may be disposed inside or outside the data driving circuit 130 , and when disposed outside the data driving circuit 130 , it is disposed between the timing controller 140 and the data driving circuit 130 . can be In addition, the memory MEM may further include a buffer memory that stores the externally received data voltage Vdata and supplies the stored data voltage Vdata to the timing controller 140 .

In addition, the display apparatus 100 may include an interface for signal input/output or communication with other external electronic devices or electronic components. The interface may include, for example, one or more of a Low-Voltage Differential Signaling (LVDS) interface, a Mobile Industry Processor Interface (MIPI), and a serial interface.

The display device 100 may be various types of devices such as a liquid crystal display device, an organic light emitting display device, and a plasma display device.

2 is a diagram illustrating a circuit structure of sub-pixels SP arranged in a display device.

Referring to FIG. 2 , a subpixel SP disposed in the display device 100 may include one or more transistors and capacitors, and an organic light emitting diode (OLED) may be disposed as a light emitting device.

For example, the subpixel SP may include a driving transistor DRT, a switching transistor SWT, a storage capacitor Cst, and a light emitting device OLED.

The driving transistor DRT has a first node N1 , a second node N2 , and a third node N3 . The first node N1 of the driving transistor DRT may be a gate node to which the data voltage Vdata is applied through the data line DL when the switching transistor SWT is turned on. The second node N2 of the driving transistor DRT may be electrically connected to an anode electrode of the light emitting device OLED, and may be a source node or a drain node. The third node N3 of the driving transistor DRT is electrically connected to a driving voltage line to which the driving voltage VDD is applied, and may be a drain node or a source node.

Here, during the display driving period, the driving voltage VDD necessary for driving the display may be supplied to the driving voltage line. For example, the driving voltage VDD necessary for driving the display may be 27V.

The switching transistor SWT is electrically connected between the first node N1 of the driving transistor DRT and the data line DL, and the gate line GL is connected to the gate node and supplied through the gate line GL. It operates according to the scan signal SCAN. In addition, when the switching transistor SWT is turned on, the operation of the driving transistor DRT is controlled by transferring the data voltage Vdata supplied through the data line DL to the gate node of the driving transistor DRT. will do

That is, by controlling the switching transistor SWT, voltages of the first node N1 and the second node N2 of the driving transistor DRT are controlled, and thus the pixel current for driving the light emitting device OLED is controlled. (Ipxl) can be supplied.

Meanwhile, the transistor disposed in the sub-pixel SP may be formed of an n-type transistor as well as a p-type transistor. Here, the case of the p-type transistor is exemplified.

The storage capacitor Cst is electrically connected between the first node N1 and the third node N3 of the driving transistor DRT, and maintains the data voltage Vdata for one frame.

The storage capacitor Cst may be connected between the first node N1 and the second node N2 of the driving transistor DRT depending on the type of the driving transistor DRT.

The anode electrode of the light emitting device OLED may be electrically connected to the second node N2 of the driving transistor DRT, and a ground voltage VSS may be applied to the cathode electrode of the light emitting device OLED. . Here, the base voltage VSS may be a ground voltage or a voltage higher or lower than the ground voltage. Also, the base voltage VSS may vary according to a driving state.

3 is a diagram illustrating changes in pixel current and pixel luminance flowing through a sub-pixel in a low power mode of a display device by way of example.

Referring to FIG. 3 , after the vertical synchronization signal Vsync is applied, the data driving circuit 130 of the display apparatus 100 applies the data voltage Vdata of a constant frequency to the designated subpixel SP for one frame. By doing so, an image is displayed on the display panel 110 .

For example, when the driving frequency is 60 Hz, the data driving circuit 130 applies the data voltage Vdata to the subpixels SP of the display panel 110 once every 1/60 of a second.

At this time, when the image displayed through the display panel 110 is a still image, since the data voltage Vdata applied to the sub-pixel SP is the same, the driving frequency is reduced to reduce power consumption by 1 The number of times the data voltage Vdata is applied to the sub-pixel SP during the frame is reduced.

If a still image is displayed for a long time, if the driving frequency is reduced to 1 Hz, the data voltage Vdata is applied to the sub-pixel SP only once during one frame.

In this case, after the data voltage Vdata is applied within one frame, the pixel current Ipxl flowing in the subpixel SP is maintained by the voltage charged in the storage capacitor Cst for the remaining time, and the leakage current Accordingly, the pixel current Ipxl decreases, and accordingly, the pixel luminance Lpxl of the sub-pixel SP also decreases.

In this case, when the pixel current Ipxl falls below a predetermined threshold, flicker occurs in the display panel 110 due to a luminance deviation of the sub-pixels SP.

When the driving frequency is reduced for low-power driving, the display device 100 according to embodiments of the present invention monitors the size of the pixel current Ipxl for the sub-pixel SP to be monitored to thereby monitor the pixel current ( When Ipxl) falls below the reference value, flicker can be improved by updating the data voltage Vdata in the corresponding subpixel SP.

4 is a diagram illustrating a circuit structure of a sub-pixel SP arranged in a display device according to embodiments of the present invention.

Referring to FIG. 4 , a subpixel SP disposed in the display device 100 according to embodiments of the present invention includes a driving transistor DRT, a switching transistor SWT, a storage capacitor Cst, and a light emitting device (Cst). OLED) may further include a sensing transistor SENT for detecting the magnitude of the pixel current Ipxl flowing through the driving transistor DRT.

Since the configuration of the driving transistor DRT, the switching transistor SWT, the storage capacitor Cst, and the light emitting device OLED is the same as described above, additional descriptions thereof will be omitted.

A source node or a drain node of the sensing transistor SENT is electrically connected to the second node N2 of the driving transistor DRT, and operates according to a read signal READ supplied to the gate node.

Accordingly, in a state in which the sensing transistor SENT is turned off, all of the pixel current Ipxl flowing through the driving transistor DRT flows through the light emitting device OLED, but at an arbitrary point in time, the sensing transistor SENT leads When the signal READ is turned on, the pixel current Ipxl flowing through the driving transistor DRT flows through the sensing transistor SENT. At this time, the sensing current Isen flowing through the sensing transistor SENT. By detecting , the magnitude of the pixel current Ipxl can be determined.

The display apparatus 100 of the present invention compares the magnitude of the sensing current Isen detected through the sensing transistor SENT with a reference value, and then, when the sensing current Isen is equal to or less than the reference value, the sub-pixel SP is displayed. The applied data voltage Vdata may be updated again.

5 is a diagram illustrating a configuration of a data voltage control circuit that controls to update a data voltage applied to a sub-pixel using a sensing current in a display device according to embodiments of the present invention.

Referring to FIG. 5 , the data voltage control circuit 200 in the display device 100 according to embodiments of the present invention converts the sensing current Isen detected through the sensing transistor SENT into a voltage-current-voltage A conversion circuit (I2V, 210), an analog-to-digital conversion circuit (ADC, 220) that converts an analog voltage to a digital voltage, compares the digital voltage with a reference value stored in a lookup table (LUT, 240), and the data voltage according to the comparison result The comparison circuit 230 for transmitting the flag signal Fout for updating (Vdata) to the timing controller 140 may be included.

The lookup table 240 stores a reference value of the pixel current Ipxl or the sensing current Isen for updating the data voltage Vdata applied to the subpixel SP. At this time, the lookup table 240 stores The reference value may be changed according to an environment such as a temperature at which the display apparatus 100 operates, or may be changed according to an operating condition such as a luminance value set by a user.

6 is a signal flow diagram illustrating a process of updating a data voltage applied to a sub-pixel using a sensing current in a display device according to embodiments of the present invention.

Referring to FIG. 6 , in the display apparatus 100 according to embodiments of the present invention, the data voltage Vdata applied to the sub-pixel SP within one frame for an image with little change, such as a still image, is Power consumption can be reduced by reducing the period (frequency).

That is, when a still image is displayed for a certain period of time, the display apparatus 100 may reduce the number of times the data voltage Vdata is applied to the sub-pixel SP during one frame, for example, a still image continuously. In this case, by reducing the driving frequency to 1 Hz, the data voltage Vdata may be applied to the subpixel SP only once during one frame.

At this time, after the data voltage Vdata is applied to the subpixel SP within one frame, the data voltage Vdata is not applied for the remaining time within one frame, so power consumption is reduced, but due to the leakage current, the data voltage Vdata is not applied. The pixel current Ipxl flowing through the driving transistor DRT in the subpixel SP gradually decreases, and the pixel luminance Lpxl also decreases.

The display device 100 of the present invention turns on the sensing transistor SENT connected to the driving transistor DRT in the sub-pixel SP at a predetermined time to correspond to the turn-on timing of the sensing transistor SENT. The resulting pixel current Ipxl may be detected as the sensing current Isen.

At this time, the sensing current Isen detected through the sensing transistor SENT is compared with a reference value stored in the lookup table 240, and when the sensing current Isen falls below the reference value, a flag signal Fout is generated. , the timing controller 140 may be controlled to update the data voltage Vdata in the subpixel SP.

As a result, even when the power consumption is reduced by reducing the driving frequency of the display apparatus 100, the pixel current Ipxl flowing in the monitoring sub-pixel SP does not fall below the reference value, thereby improving image quality deterioration due to flicker. .

Meanwhile, the display panel 110 constituting the display apparatus 100 of the present invention may be divided into a display area AA that displays an image and a non-display area that does not display an image.

In the subpixel SP located in the display area AA, since the driving transistor DRT and the light emitting device OLED are electrically connected, the light emitting device (DRT) is electrically connected to the light emitting device by the pixel current Ipxl flowing through the driving transistor DRT. OLED) will emit light.

On the other hand, in the sub-pixel SP located in the non-display area, since the driving transistor DRT and the light emitting device OLED are electrically short-circuited, the pixel current Ipxl flowing through the driving transistor DRT is reduced to the light emitting device ( It is not transmitted to OLED), so the image is not displayed.

Since the pixel current Ipxl flows through the driving transistor DRT in both the display area AA and the non-display area, the driving method of the present invention can be applied to both the display area AA and the non-display area.

7A to 7C are diagrams illustrating a case in which pixel current is sensed in a display area in a display device according to embodiments of the present invention.

FIG. 7A shows a case in which an image displayed in the display area AA is controlled to be updated by sensing the pixel current Ipxl for all sub-pixels SP belonging to the display area AA. FIG. 7B shows the display By sensing the pixel current Ipxl by selecting a sub-pixel SP connected thereto as a monitoring sub-pixel SP for a part of the gate line GL in the area AA, a part of the gate line GL It shows a case of controlling to update the image only for the sub-pixels (SP) connected to . Also, FIG. 7C shows a specific subpixel SP by sensing the pixel current Ipxl only for a specific subpixel SP where a specific gate line GL and a specific data line DL intersect within the display area AA. ) shows the case of controlling to update the image only.

As such, the area sensing the pixel current Ipxl may not only target the entire display area AA, but may also be limited to an arbitrary area, which may include the purpose of the display apparatus 100 and the display apparatus 100 . ) may vary depending on the type of image displayed.

8 is a block diagram illustrating a configuration of a display apparatus according to embodiments of the present invention.

Referring to FIG. 8 , the display apparatus 100 according to embodiments of the present invention includes a display panel 110 , a gate driving circuit 120 , a data driving circuit 130 , and a timing controller T-CON 140 . may include.

At this time, in the gate driving circuit 120 , the pixel current of the sub-pixel SP is applied to the monitoring sub-pixel SP other than the gate line GL that supplies the scan signal SCAN signal to the display panel 110 . Ipxl), a signal line for supplying the read signal READ to the sensing transistor SENT may be additionally disposed.

In addition, the data driving circuit 130 may include a data voltage control circuit 200 that generates a flag signal Fout for controlling whether to update the data voltage Vdata according to the size of the pixel current Ipxl. In this case, the data driving circuit 130 and the data voltage control circuit 200 may be configured as one integrated circuit.

That is, a signal line for receiving the sensing current Isen is disposed in the subpixel SP in parallel with the data line DL to which the data voltage Vdata is supplied, and the signal line is positioned inside the data driving circuit 130 . The pixel current Ipxl may be sensed by selecting an arbitrary sub-pixel SP disposed on the display panel 110 as the monitoring sub-pixel SP by connecting to the data voltage control circuit 200 .

The timing controller 140 updates the data voltage Vdata supplied to the sub-pixels SP of the display panel 110 according to the flag signal Fout output from the data voltage control circuit 200 to update the data driving circuit 130 . ) to control

9 is a diagram illustrating a process of sensing a pixel current in a subpixel located in a display area in a driving method according to embodiments of the present invention, and FIG. 10 is a diagram illustrating a method of sensing a pixel current in a subpixel located in the display area. It is a diagram showing a signal flow diagram of the process.

9 and 10 , in the driving method according to embodiments of the present invention, a programming step (FIG. 9(a)), a light-emitting step (FIG. 9(b)), and a sensing step (FIG. 9(c)).

In the programming step, the switching transistor SWT is turned on by the scan signal SCAN, and the data voltage Vdata provided through the data line DL is the first node N1 , which is the gate node of the driving transistor DRT. ) is an approved process.

In the programming stage, since the driving transistor DRT is not turned on yet, the pixel current Ipxl does not flow through the driving transistor DRT, and as a result, the data voltage control circuit 200 is transmitted to the data voltage control circuit 200 through the sensing transistor SENT. The transmitted sensing current Isen has not yet occurred.

In the programming step, the read signal READ applied to the gate node of the sensing transistor SENT may be a low level signal or a high level signal.

The light emitting step is a process in which the driving transistor DRT is turned on by the data voltage Vdata provided through the switching transistor SWT in the programming step to supply the pixel current Ipxl to the light emitting device OLED.

Since the sensing transistor SENT is in a turned-off state in the light emission stage, all of the pixel current Ipxl flowing through the driving transistor DRT is supplied to the light emitting device OLED, and the data voltage is controlled through the sensing transistor SENT. The sensing current Isen applied to the circuit 200 will have a value of zero.

In the sensing step, the sensing transistor SENT is turned on while the pixel current Ipxl is supplied through the driving transistor DRT, so that the pixel current Ipxl is transferred to the data voltage circuit 200 through the sensing transistor SENT. ) to be supplied.

Accordingly, in the sensing step, since the pixel current Ipxl is supplied to the data voltage control circuit 200 through the sensing transistor SENT, the sensing current Isen has the same value as the pixel current Ipxl.

Accordingly, by measuring the value of the sensing current Isen supplied to the data voltage control circuit 200 through the sensing transistor SENT in the sensing step, the pixel current flowing through the subpixel SP through the driving transistor DRT ( Ipxl) can be detected.

The sensing step may be repeated any number of times in the middle of the light emission step in which the subpixel SP displays an image.

In this way, by sensing the pixel current Ipxl an arbitrary number of times in the light emission step of displaying an image on the display panel 110 in one frame section, it can be checked whether the pixel current Ipxl is reduced to a reference value or less. do.

Accordingly, when the driving frequency is reduced in order to reduce power consumption while the display apparatus 100 displays an image with little change, such as a still image, when the pixel current Ipxl falls below the reference value due to leakage current In this case, the data voltage control circuit 200 detects this and updates the data voltage Vdata in the corresponding sub-pixel SP, thereby preventing the flicker phenomenon caused by the reduction of the pixel current Ipxl.

As described above, the display apparatus 100 of the present invention may sense the pixel current Ipxl for all sub-pixels SP belonging to the display area AA, and some sub-pixels within the display area AA. The pixel current Ipxl may be sensed by using SP as the monitoring subpixel SP.

11 is a diagram illustrating a signal flow diagram of a process of sensing a pixel current in some subpixels of a display area in a driving method according to embodiments of the present invention.

Referring to FIG. 11 , by applying the read signal READ only to the subpixels SP located in an arbitrary row in the display device 100 including the n gate lines GL, the read signal READ is The pixel current Ipxl may be sensed using the sub-pixel SP of the supplied row as the monitoring sub-pixel SP. Here, a case in which ten read signals READ[1], ?? , READ[10] are applied to ten rows is illustrated.

For example, in the method of applying the read signal READ only to the upper ten lines of the display area AA, the image of the remaining area is continuously changed, but the upper image of the display area AA displays a still image. It will be effective in many cases.

Accordingly, the sensing transistor SENT to which the ten read signals READ[1], ?? , and READ[10] is applied detects the pixel current Ipxl in the sensing step to drive the data driving the sensing current Isen. The data voltage control circuit 200 located inside the circuit 130 receives the data. The data voltage control circuit 200 compares the magnitude of the sensing current Isen with a reference value (threshold) and generates a flag signal Fout when the magnitude of the sensing current Isen falls below the reference value, thereby generating a timing controller ( 140) to generate the scan signal SCAN to update the data voltage Vdata of the corresponding sub-pixel SP.

12A and 12B are diagrams illustrating a case in which a pixel current is sensed in a dummy area of a display panel in a display device according to embodiments of the present invention.

12A shows a dummy subpixel SP located in an upper dummy area among dummy areas located outside the display area AA as a monitoring subpixel SP to sense the pixel current Ipxl, and based on this, the pixel current Ipxl is sensed. shows a case in which an image displayed in the display area AA is controlled to be updated, and FIG. 12B is a monitoring subpixel SP of a dummy subpixel SP in an edge portion spaced apart from the display area AA among the lower dummy areas. ) to sense the pixel current Ipxl and control to update the image displayed in the display area AA based on this.

As described above, in the display area AA in which an image is displayed in the display panel 110 , the driving transistor DRT and the light emitting device OLED are electrically connected, but the dummy area located outside the display area AA is Since the driving transistor DRT and the light emitting device OLED are electrically cut off, the pixel current Ipxl flowing through the driving transistor DRT is not supplied to the light emitting device OLED, so that no light is emitted.

At this time, since the pixel current Ipxl is not supplied to the light emitting device OLED, but the pixel current Ipxl flows through the sensing transistor SENT, a pixel current is applied to the dummy subpixel SP disposed in the dummy region. (Ipxl) can be sensed.

13 is a block diagram illustrating a configuration for sensing a pixel current through a subpixel of a dummy region in a display device according to embodiments of the present invention.

Referring to FIG. 13 , the display apparatus 100 according to embodiments of the present invention may include a display panel 110 , a gate driving circuit 120 , a data driving circuit 130 , and a timing controller 140 . have.

In this case, the gate driving circuit 120 monitors the subpixels SP located in the dummy area in addition to the gate line GL that supplies the scan signal SCAN_A signal to the display area AA of the display panel 110 . A read signal READ_D is applied to the sensing transistor SENT and a dummy gate line that supplies the scan signal SCAN_D to the sub-pixel SP of the dummy region in order to select the sub-pixel SP and sense the pixel current Ipxl. A signal line for supplying may be additionally disposed.

In addition, the data driving circuit 130 includes the data voltage control circuit 200 that generates the flag signal Fout for controlling whether the data voltage Vdata is updated according to the size of the pixel current Ipxl. 130) may be included in the interior.

In this case, the data driving circuit 130 includes a dummy data line for supplying the data voltage Vdata_D to the dummy region and a dummy region in addition to the data line DL for supplying the data voltage Vdata_A to the display area AA. A signal line for receiving the sensing current Isen_D from the sub-pixel SP of may be further included.

In this case, the data voltage Vdata_D supplied to the dummy area may have a fixed value, and an arbitrary value among the values of the data voltage Vdata_A supplied to the display area AA, for example, a maximum value, a minimum value, Or it may have an average value or the like.

Accordingly, the data voltage control circuit 200 located inside the data driving circuit 130 selects an arbitrary sub-pixel SP disposed in the dummy area of the display panel 110 as the monitoring sub-pixel SP. The pixel current Ipxl may be sensed.

Also, the timing controller 140 is a data driving circuit to update the data voltage Vdata supplied to the subpixels SP of the display panel 110 according to the flag signal Fout output from the data voltage control circuit 200 . 130 can be controlled.

In this case, the dummy data line connected to the dummy area and the signal line receiving the sensing current Isen may be individually connected by separating each subpixel SP disposed in the dummy area, and all subpixels in the dummy area. (SP) may be connected with one line.

14 is a diagram illustrating a process of sensing a pixel current in a subpixel disposed in a dummy area in a driving method according to embodiments of the present invention, and FIG. 15 is a diagram illustrating a method of sensing a pixel current in a subpixel disposed in the dummy area It is a diagram showing a signal flow diagram of the process.

14 and 15 , in the driving method according to embodiments of the present invention, the pixel current Ipxl is disposed in the dummy region in the same manner as the sensing subpixel SP of the monitoring subpixel SP of the display area AA. A programming step (FIG. 9(a)), a light-emitting step (FIG. 9(b)), and a sensing step (FIG. 9(c)) are included to sense the pixel current Ipxl flowing in the monitoring subpixel SP being can do.

In the subpixel SP disposed in the dummy region, since the driving transistor DRT and the light emitting device OLED are electrically blocked, the pixel current Ipxl flowing through the driving transistor DRT is supplied to the light emitting device OLED. , so there is no luminescence.

In the programming step, the switching transistor SWT is turned on by the scan signal SCAN_D, and the data voltage Vdata_D supplied to the subpixel SP of the dummy area through the data line DL is transferred to the driving transistor DRT. It is a process applied to the first node N1, which is the gate node of

In the programming stage, since the driving transistor DRT is not turned on yet, the pixel current Ipxl does not flow through the driving transistor DRT, and as a result, the data voltage control circuit 200 is transmitted to the data voltage control circuit 200 through the sensing transistor SENT. The transmitted sensing current Isen has not yet occurred.

In the programming step, the read signal READ_D applied to the gate node of the sensing transistor SENT may be a low level signal or a high level signal.

In the light emitting step, the driving transistor DRT is turned on by the data voltage Vdata_D provided through the switching transistor SWT in the programming step, and the pixel current Ipxl is generated through the source node and the drain node of the driving transistor DRT. will flow

At this time, since the sensing transistor SENT is in a turned-off state and the driving transistor DRT and the light emitting device OLED are blocked, the pixel current Ipxl flowing through the driving transistor DRT disappears in a short time. and the sensing current Isen applied to the data voltage control circuit 200 through the sensing transistor SENT will have a value of zero.

In the sensing step, the sensing transistor SENT is turned on while the pixel current Ipxl is supplied through the driving transistor DRT, so that the pixel current Ipxl is transferred to the data voltage circuit 200 through the sensing transistor SENT. ) to be supplied.

Accordingly, by measuring the value of the sensing current Isen supplied to the data voltage control circuit 200 through the sensing transistor SENT in the sensing step, the pixel current flowing through the subpixel SP through the driving transistor DRT ( Ipxl) can be detected.

The sensing step may be repeated an arbitrary number of times within one frame in which the sub-pixel SP displays an image.

As described above, by sensing the pixel current Ipxl an arbitrary number of times in the middle of displaying an image on the display panel 110 during one frame period, it is possible to check whether the pixel current Ipxl is reduced to a reference value or less.

Accordingly, in the process of the display apparatus 100 displaying a still image, when the driving frequency is reduced to reduce power consumption and the pixel current Ipxl falls below the reference value due to leakage current, the data voltage control circuit ( 200) detects this and updates the data voltage Vdata_D in the corresponding sub-pixel SP, thereby preventing the flickering phenomenon caused by the decrease in the pixel current Ipxl.

On the other hand, the data voltage control circuit 200 that senses the pixel current Ipxl in the display device 100 of the present invention and determines whether to update the data voltage Vdata by comparing it with a reference value is the gate driving circuit 120 . Alternatively, it may be disposed inside the data driving circuit 130 or may be separately located outside the driving circuit.

16 is a block diagram illustrating a configuration in which a data voltage control circuit is located outside a driving circuit in a display device according to embodiments of the present invention.

Referring to FIG. 16 , the display device 100 according to embodiments of the present invention includes a display panel 110 , a gate driving circuit 120 , a data driving circuit 130 , a timing controller T-CON 140 , and a data voltage control circuit 200 .

The gate driving circuit 120 senses the pixel current Ipxl for the monitoring subpixel SP other than the gate line GL that supplies the scan signal SCAN signal to the display panel 110 , the sensing transistor ( A signal line for supplying the read signal READ to SENT may be additionally disposed.

When a specific gate line GL is turned on by the gate driving circuit 120 , the data driving circuit 130 converts the data voltage Vdata received from the timing controller 140 into an analog image data voltage. It is supplied to a plurality of data lines DL.

The data voltage control circuit 200 targets the sub-pixel SP disposed in the display area AA or the dummy area of the display panel 110 through the sensing transistor SENT included in the sub-pixel SP. The timing controller 140 receives the sensing current Isen corresponding to the current Ipxl, and generates a flag signal Fout for controlling whether the data voltage Vdata is updated according to the magnitude of the sensing current Isen. forward to

The timing controller 140 updates the data voltage Vdata supplied to the sub-pixels SP of the display panel 110 according to the flag signal Fout output from the data voltage control circuit 200 to update the data driving circuit 130 . ) to control

When the data voltage control circuit 200 is separately disposed outside the driving circuit, the sub-pixel SP for sensing the pixel current Ipxl targets the sub-pixel SP disposed in the display area AA. Alternatively, the sub-pixel SP disposed in the dummy area may be targeted.

The above description is merely illustrative of the technical spirit of the present invention, and various modifications and variations will be possible without departing from the essential characteristics of the present invention by those skilled in the art to which the present invention pertains. In addition, the embodiments disclosed in the present invention are not intended to limit the technical spirit of the present invention, but to explain, so the scope of the technical spirit of the present invention is not limited by these embodiments. The protection scope of the present invention should be construed by the following claims, and all technical ideas within the equivalent range should be construed as being included in the scope of the present invention.

100: display device 110: display panel
120: gate driving circuit 130: data driving circuit
140: timing controller 200: data voltage control circuit
210: current-voltage conversion circuit 220: analog-digital conversion circuit
230: comparison circuit 240: lookup table

Claims (14)

a display panel in which a plurality of gate lines, a plurality of data lines, and a plurality of sub-pixels are disposed;
a gate driving circuit for driving the plurality of sub-pixels through the plurality of gate lines;
a data driving circuit for supplying a data voltage to the plurality of sub-pixels through the plurality of data lines;
a data voltage control circuit sensing a pixel current flowing in a monitoring subpixel among the plurality of subpixels and generating a flag signal for updating the data voltage; and
and a timing controller configured to control the data driving circuit to update the data voltage according to the flag signal.
According to claim 1,
The monitoring subpixel is
A display device that is all or part of subpixels disposed in a display area where an image is displayed.
3. The method of claim 2,
The sub-pixels disposed in the display area are
light emitting element;
a driving transistor for driving the light emitting device;
a switching transistor electrically connected between a gate node of the driving transistor and the data line;
a storage capacitor electrically connected between a gate node of the driving transistor and a source node or a drain node; and
and a sensing transistor electrically connected between a source node or a drain node of the driving transistor and an anode electrode of the light emitting device to sense a pixel current flowing through the driving transistor.
According to claim 1,
The monitoring subpixel is
A display device that is all or part of sub-pixels disposed in a dummy area on which an image is not displayed.
5. The method of claim 4,
The sub-pixels disposed in the dummy area
driving transistor;
a switching transistor electrically connected between a gate node of the driving transistor and the data line;
a storage capacitor electrically connected between a gate node of the driving transistor and a source node or a drain node;
a sensing transistor electrically connected to a source node or a drain node of the driving transistor to sense a pixel current flowing through the driving transistor; and
and a light emitting device electrically shorted from the driving transistor.
According to claim 1,
The data voltage control circuit is
A display device operated in a period in which the display panel is driven in a low power mode.
According to claim 1,
The data voltage control circuit is
a lookup table for storing a reference value of the pixel current;
a current-voltage conversion circuit converting the sensed pixel current into voltage;
an analog-to-digital conversion circuit for converting an output voltage of the current-voltage conversion circuit into a digital voltage; and
and a comparison circuit that compares the digital voltage with a reference value stored in the lookup table and outputs the flag signal according to a comparison result.
8. The method of claim 7,
The reference value is changed according to an operating temperature or a set luminance.
According to claim 1,
The data driving circuit and the data voltage control circuit are configured as one integrated circuit.
a gate driving circuit for driving a plurality of sub-pixels through a plurality of gate lines connected to the display panel;
a data driving circuit for supplying a data voltage to the plurality of sub-pixels through a plurality of data lines connected to the display panel; and
and a data voltage control circuit configured to sense a pixel current flowing through a monitoring subpixel among the plurality of subpixels and update the data voltage for a subpixel having the sensed pixel current equal to or less than a reference value.
11. The method of claim 10,
The data voltage control circuit is
A driving circuit operated in a period in which the display panel is driven in a low power mode.
11. The method of claim 10,
The data voltage control circuit is
a lookup table for storing a reference value of the pixel current;
a current-voltage conversion circuit converting the sensed pixel current into voltage;
an analog-to-digital conversion circuit for converting an output voltage of the current-voltage conversion circuit into a digital voltage; and
and a comparison circuit comparing the digital voltage with a reference value stored in the lookup table and outputting a flag signal for updating the data voltage according to a comparison result.
a display panel in which a plurality of data lines and a plurality of gate lines are disposed, and a plurality of sub-pixels arranged in a region where the plurality of data lines and the gate lines intersect to emit light through a driving transistor are disposed; A method of driving a display device comprising: a data driving circuit for driving a plurality of data lines; and a gate driving circuit for driving the plurality of gate lines, the method comprising:
turning on a switching transistor constituting the subpixel by applying a scan signal through the gate line;
turning on the driving transistor by supplying a data voltage (Vdata) to a driving transistor constituting the subpixel through the turned-on switching transistor;
turning on a sensing transistor connected to the driving transistor to sense a pixel current flowing through the turned-on driving transistor; and
and comparing the sensed pixel current with a reference value and controlling the data voltage to be updated according to the comparison result.
14. The method of claim 13,
The steps are
A driving method operated in a section in which the display panel is driven in a low power mode.

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