KR20160055324A - Organic light emitting display device and organic light emitting display panel - Google Patents

Abstract

Embodiments of the present invention relate to an organic light emitting display device and an organic light emitting display panel which can prevent or minimize performance degradation and lifetime shortening of a driving transistor while preventing deterioration of black visibility properties. The organic light emitting display device comprises: an organic light emitting display panel; a data drive unit; a gate drive unit; and a timing controller.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an organic light emitting diode (OLED) display panel,

The present embodiments relate to an organic light emitting display and an organic light emitting display panel.

2. Description of the Related Art In recent years, an organic light emitting diode (OLED) display device that has been spotlighted as a display device has advantages of high response speed, high luminous efficiency, high luminance and wide viewing angle by using an organic light emitting diode (OLED)

Such an organic light emitting display device arranges subpixels including organic light emitting diodes in a matrix form and controls the brightness of subpixels selected by the scan signals according to the gradation of data.

In each subpixel disposed in the organic light emitting display panel, a driving transistor for driving the organic light emitting diode is disposed. The driving transistor has a characteristic value such as a threshold voltage.

The driving transistor in each sub-pixel has a characteristic value such as a threshold voltage (Vth).

The threshold voltage may be different for each driving transistor, and accordingly, a luminance deviation may occur between the subpixels.

Further, as the drive time of the drive transistor becomes longer, the degradation of the drive transistor progresses, and the threshold voltage of the drive transistor can be changed.

The extent of the change in the threshold voltage may be different for each driving transistor, and such a threshold voltage deviation between the driving transistors can increase the luminance deviation between the subpixels.

The luminance deviation between subpixels due to the threshold voltage deviation between the driving transistors may be a major factor that deteriorates the image quality. For example, due to a threshold voltage deviation between the driving transistors, a black image may not be displayed and an image with a slightly brighter than black may be displayed, resulting in a phenomenon that the black image sensing characteristic is degraded.

It is an object of the present embodiments to provide an organic light emitting display device and an organic light emitting display panel which prevent the deterioration of the black display characteristic.

Another object of the present invention is to provide an organic light emitting display device and an organic light emitting display panel capable of preventing or minimizing the performance degradation and the life shortening of the driving transistor while preventing the deterioration of the black visual characteristic.

One embodiment includes an organic light emitting display panel in which data lines and gate lines are arranged and in which subpixels are arranged, a data driver driving data lines arranged in the organic light emitting display panel, A gate driver for driving the lines, a timing controller for controlling the data driver and the gate driver, and the like.

In such an organic light emitting display, each sub pixel includes an organic light emitting diode and a driving transistor for driving the organic light emitting diode. Here, the driving transistor has a first node to which a data voltage is applied, a second node electrically connected to the first electrode of the organic light emitting diode, and a third node electrically connected to the driving voltage line.

In this organic light emitting display, in each of at least one subpixel representing a black image among the subpixels, at the light emitting time point of the organic light emitting diode, the voltage of the first node of the driving transistor is set to a voltage The black data voltage may be equal to or greater than the voltage of the black data voltage.

Another embodiment provides an OLED display panel including data lines arranged in a first direction, gate lines arranged in a second direction intersecting the first direction, and subpixels arranged in a matrix type .

In such an organic light emitting display panel, each sub pixel includes an organic light emitting diode and a driving transistor for driving the organic light emitting diode. Here, the driving transistor has a first node to which a data voltage is applied, a second node electrically connected to the first electrode of the organic light emitting diode, and a third node electrically connected to the driving voltage line.

In this organic light emitting display panel, in each of the at least one subpixel representing a black image among the subpixels, at the light emitting time point of the organic light emitting diode, the voltage of the first node of the driving transistor is set to the second node The black data voltage may be equal to or greater than the voltage of the black data voltage.

According to the exemplary embodiments of the present invention described above, it is possible to provide an organic light emitting display device and an organic light emitting display panel that can prevent the deterioration of the black display characteristic.

In addition, according to the embodiments, it is possible to provide an organic light emitting display device and an organic light emitting display panel capable of preventing or minimizing the performance degradation and the life span of the driving transistor while preventing the deterioration of the black luminance characteristic.

1 is a system configuration diagram of an organic light emitting display according to the present embodiments.
2 is a simplified equivalent circuit diagram of subpixels of an organic light emitting display according to the present embodiments.
3 is a graph illustrating a phenomenon in which the black display characteristic of the organic light emitting display according to the present invention is degraded.
4 is a diagram illustrating a sub-pixel driving method for preventing the degradation of the black display characteristic of the organic light emitting display according to the present embodiments.
5 is a view for explaining the effect of sub-pixel driving on the driving transistor for preventing the deterioration of the black display characteristics of the organic light emitting display according to the present embodiments.
6 and 7 are views for explaining a driving method for minimizing the influence on the driving transistor while preventing the deterioration of the black display characteristic of the OLED display according to the present embodiments.
8 is a diagram illustrating an equivalent circuit diagram of subpixels of the organic light emitting diode display according to the present embodiments.
9 is a diagram illustrating a sensing and compensating structure of a subpixel of an OLED display according to an exemplary embodiment of the present invention.

Hereinafter, some embodiments of the present invention will be described in detail with reference to exemplary drawings. In the drawings, like reference numerals are used to denote like elements throughout the drawings, even if they are shown on different drawings. In the following description of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear.

In describing the components of the present invention, terms such as first, second, A, B, (a), and (b) may be used. These terms are intended to distinguish the components from other components, and the terms do not limit the nature, order, order, or number of the components. When a component is described as being "connected", "coupled", or "connected" to another component, the component may be directly connected or connected to the other component, Quot; intervening "or that each component may be" connected, "" coupled, "or " connected" through other components.

FIG. 1 is a system configuration diagram of an organic light emitting diode display 100 according to the present embodiments.

1, the OLED display 100 includes an OLED display panel 110, a data driver 120, a gate driver 130, a timing controller 140, and the like .

A plurality of data lines DL are arranged in a first direction and a plurality of gate lines GL are arranged in a second direction intersecting the first direction in the organic light emitting display panel 110 , And a plurality of sub pixels (SP: Sub Pixel) are arranged in a matrix type.

The data driver 120 supplies the data voltages to the data lines to drive the data lines.

The gate driver 130 sequentially supplies the scan signals to the gate lines to sequentially drive the gate lines.

The timing controller 140 supplies control signals to the data driver 120 and the gate driver 130 to control the data driver 120 and the gate driver 130.

The timing controller 140 starts scanning in accordance with the timing implemented in each frame and switches the image data Data input from the host system 160 according to the data signal format used by the data driver 120, And outputs the image data (Data ') and controls the data driving at a proper time according to the scan.

The gate driver 130 sequentially supplies the scan signals of the On voltage or the Off voltage to the gate lines sequentially according to the control of the timing controller 140 to sequentially drive the gate lines.

1, the gate driver 130 may be located on either side of the organic light emitting display panel 110, or may be located only on one side depending on a sub-pixel structure, a panel structure, and the like .

The gate driver 130 includes a plurality of gate driver ICs GDIC # 1, ..., GDIC #N, GDIC # 1 ', ..., GDIC #N' (GDIC # 1, ..., GDIC #N, GDIC # 1 ', ..., GDIC #N') may include a tape automated bonding (Gate In Panel) type and connected to a bonding pad of the organic light emitting display panel 110 by a Tape AuTrmated Bonding method or a chip on glass (COG) And may be integrated and disposed in the organic light emitting display panel 110, as the case may be.

Each of the plurality of gate driver ICs GDIC # 1, ..., GDIC #N, GDIC # 1 ', ..., GDIC #N' described above includes a shift register, a level shifter ), And the like.

When the specific gate line is opened, the data driver 120 converts the video data Data 'received from the timing controller 140 into analog data voltages Vdata and supplies the data voltages to the data lines, thereby driving the data lines do.

The data driver 120 includes a plurality of source driver ICs (also referred to as a data driver IC, SDIC # 1, ..., SDIC #M, M: one or more natural numbers) The source driver ICs SDIC # 1, ..., and SDIC #M are connected to the organic light emitting display (OLED) through a tape automated bonding The organic light emitting display panel 110 may be connected to a bonding pad of the panel 110 or may be directly disposed on the organic light emitting display panel 110 and may be integrated and disposed on the organic light emitting display panel 110 as occasion demands.

Each of the above-mentioned source driver integrated circuits (SDIC # 1, ..., SDIC #M) includes a shift register, a latch, a digital analog converter (DAC) (Output Buffer), and further includes an analog-to-digital converter (ADC) that senses an analog voltage value for subpixel compensation and converts it into a digital value and generates and outputs sensing data .

A plurality of source driver integrated circuits (SDIC # 1, ..., SDIC #M) can be implemented by a chip on film (COF) method. In each of the plurality of source driver integrated circuits (SDIC # 1, ..., SDIC #M), one end is bonded to at least one source printed circuit board and the other end is bonded to the organic light emitting display panel 110).

The host system 160 may include a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, an input data enable (DE) signal, a clock signal (CLK), and the like to the timing controller 140. [

The timing controller 140 may switch the image data Data input from the host system 160 according to the data signal format used by the data driver 120 and output the converted image data Data ' In order to control the data driver 120 and the gate driver 130, a timing signal such as a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, an input DE signal, and a clock signal is input to generate various control signals And outputs it to the data driver 120 and the gate driver 130.

For example, in order to control the gate driver 130, the timing controller 140 generates a gate start pulse (GSP), a gate shift clock (GSC), a gate output enable signal GOE : Gate Output Enable) and the like. The gate start pulse GSP is applied to the gate driver ICs GDIC # 1, ..., GDIC #N, GDIC # 1 ', ..., GDIC #N' Timing. The gate shift clock GSC is a clock signal commonly input to the gate driver integrated circuits GDIC # 1, ..., GDIC #N, GDIC # 1 ', ..., GDIC #N' (Gate pulse). The gate output enable signal GOE specifies timing information of the gate driver integrated circuits GDIC # 1, ..., GDIC #N, GDIC # 1 ', ..., GDIC #N'.

The timing controller 140 controls the data driver 120 such that a source start pulse SSP, a source sampling clock SSC, a source output enable signal SOE, (DCSs: Data Control Signals). The source start pulse SSP controls the data sampling start timing of the source driver integrated circuits SDIC # 1, ..., SDIC #M constituting the data driver 120. The source sampling clock SSC is a clock signal for controlling the sampling timing of data in each of the source driver integrated circuits (SDIC # 1, ..., SDIC #M). The source output enable signal SOE controls the output timing of the data driver 120. The polarity control signal POL may be further included in the data control signals DCSs in order to control the polarity of the data voltage of the data driver 120. [ The source start pulse SSP and the source sampling clock SSC may be omitted if the video data Data 'input to the data driver 120 is transmitted according to the mini LVDS interface standard.

1, an organic light emitting display 100 includes a light emitting diode (OLED) display panel 110, a data driver 120, a gate driver 130, and the like. The OLED display 100 controls various voltages or currents And a power controller 150 for controlling the power supply.

The power controller 150 is also referred to as a power management IC (PMIC).

2 is a simplified equivalent circuit diagram of subpixels of the organic light emitting diode display 100 according to the present embodiments.

2, an organic light emitting diode (OLED) and a driving circuit for driving the organic light emitting diode (OLED) are disposed in each subpixel SP formed on the organic light emitting display panel 110 .

Referring to FIG. 2, in each subpixel, the driving circuit for driving the organic light emitting diode OLED basically includes a driving transistor DRT (Driving Transistor).

2, the driving transistor DRT includes a first node N1 to which a data voltage (Data Voltage, Vdata) is applied, a first electrode (e.g., an anode electrode or a cathode electrode) of the organic light emitting diode OLED, And a third node N3 electrically connected to the second node N2 and the driving voltage line DVL and to which the driving voltage EVDD is applied.

For example, the first node N1 may be a gate node, the second node N2 may be a source node or a drain node, and the third node N3 may be a drain node or a source node.

On the other hand, the driving transistor DRT in each sub-pixel has a characteristic value such as a threshold voltage Vth.

The threshold voltage may be different for each driving transistor DRT, and accordingly, a luminance deviation may occur between the subpixels.

In addition, as the drive time of the drive transistor DRT becomes longer, the degradation of the drive transistor DRT proceeds and the threshold voltage of the drive transistor DRT can be changed.

The degree of variation of the threshold voltage may be different for each driving transistor DRT, and the threshold voltage deviation between such driving transistors DRT can intensify the luminance deviation between the subpixels. The luminance deviation between each subpixel may be a major factor that deteriorates the image quality.

FIG. 3 is a graph illustrating a phenomenon in which the black display characteristic of the organic light emitting diode display 100 according to the exemplary embodiments of the present invention is degraded.

Referring to Fig. 3, the threshold voltage deviation between the driving transistors DRT in each subpixel can degrade the black visual perception characteristic in the display panel 110. Fig.

Referring to FIG. 3, when a black image is to be displayed, due to a threshold voltage deviation between the driving transistors DRT in each subpixel, a black image is not displayed in a certain region 300, And the phenomenon that the black visual characteristic is deteriorated may occur. This phenomenon of degradation of the black visual characteristic is referred to as "black floating phenomenon ".

4 is a view illustrating a sub-pixel driving method for preventing the degradation of the black display characteristic of the OLED display 100 according to the present embodiments.

4, a black data voltage corresponding to a negative voltage is forcibly applied to the first node N1 of the driving transistor DRT in order to prevent the black display characteristic from being degraded. .

Here, the voltage of the first node N1 of the driving transistor DRT is referred to as a negative voltage. The voltage of the first node N1 of the driving transistor DRT is the second voltage of the driving transistor DRT, (E.g., Vref) applied to the node N2, e.g., a source node or a drain node.

When the black data voltage corresponding to the negative voltage is forcibly applied to the first node N1 of the driving transistor DRT as described above, the driving transistor DRT is turned on On does not occur and no current flows to the organic light emitting diode OLED. Accordingly, the black mooring phenomenon is prevented.

5 is a graph for explaining the effect of sub-pixel driving on the driving transistor DRT for preventing the degradation of the black display characteristic of the OLED display 100 according to the present embodiments.

5, if a black data voltage corresponding to a negative voltage is forcibly applied to the first node N1 of the driving transistor DRT in order to prevent black mobility, The lifetime of the driving transistor DRT may be shortened or the performance of the driving transistor DRT may be deteriorated.

In other words, a negative voltage which is forcibly applied to the first node N1 of the driving transistor DRT may act as a stress factor for the driving transistor DRT, in order to prevent black mobility .

The stress acting on the driving transistor DRT shortens the lifetime of the driving transistor DRT or deteriorates the performance of the driving transistor DRT.

FIGS. 6 and 7 are views for explaining a driving method for minimizing the influence on the driving transistor DRT while preventing the deterioration of the black display characteristic of the OLED display 100 according to the present embodiments.

6 and 7, the organic light emitting diode display 100 according to the present invention can be applied to a driving method (hereinafter referred to as a driving method) that can prevent the degradation of the black display characteristic, Can be provided.

6 and 7, in each of at least one subpixel SP representing a black image among subpixels, at the light emission time point of the organic light emitting diode OLED, the first node N1 of the driving transistor DRT N1 is the same as the voltage of the second node of the driving transistor DRT but a high black data voltage.

That is, for each of at least one subpixel SP representing a black image among the subpixels, the data driver 120 may be configured such that, at the light emitting point of the organic light emitting diode OLED, So that the black data voltage is applied to the first node N1 of the driving transistor DRT.

For this purpose, the timing controller 140 controls, for each of the at least one sub-pixel SP representing the black image among the sub-pixels, the first The voltage of the node N1 is changed to be equal to or more than the voltage of the second node of the driving transistor DRT so that the changed data is transferred to the data driver 120, Can be controlled.

The voltage of the first node N1 of the driving transistor DRT is equal to or greater than the voltage of the second node of the driving transistor DRT at the time of emission of the organic light emitting diode OLED, It may mean that the black data voltage applied to the first node N1 may be a positive voltage.

As described above, in order to prevent black mobility, a black data voltage is applied to the first node N1 of the driving transistor DRT. By applying a black data voltage that can be a positive voltage, It is possible to prevent the lifetime shortening and the performance deterioration of the driving transistor DRT according to the second embodiment.

6 and 7, the voltage of the first node N1 of the driving transistor DRT is lower than the threshold voltage Vth of the driving transistor DRT in each subpixel SP representing a black image, ≪ / RTI >

For example, when the threshold voltage of the driving transistor DRT of the first sub-pixel is different from the threshold voltage of the driving transistor DRT of the second sub-pixel, the driving transistor DRT of the first sub- The black data voltage applied to the first node N1 of the first sub pixel and the black data voltage applied to the first node N1 of the driving transistor DRT of the second sub pixel may be different from each other.

7, the voltage at the first node N1 of the driving transistor DRT is equal to the threshold voltage Vth of the driving transistor DRT in each sub-pixel representing the black image, And may be the sum of the set constant voltage (Vconst).

Here, the constant voltage Vconst is a voltage at which the voltage at the first node N1 of the driving transistor DRT becomes a positive voltage in consideration of the voltage at the second node N2 of the driving transistor DRT at the light- The size of the OLED display panel 110 may be different from the OLED display panel 110 as a predetermined offset voltage.

As described above, different black data voltages (Vconst + Vth) are applied to the first node (N1) of the driving transistor (DRT) according to the threshold voltage of the driving transistor (DRT) in each subpixel, It is possible to express a black image of higher quality by reflecting the luminance deviation characteristic of each subpixel.

The threshold voltage of the driving transistor DRT may be first measured (sensed) and stored in a memory (not shown), or may be updated every time a sensing event occurs after being measured for the first time.

The driving circuit for driving the organic light emitting diode OLED in each subpixel SP of the OLED display 100 may include two or more transistors and one or more capacitors.

If the threshold voltage of the driving transistor DRT is measured (sensed) for the first time and stored in a memory (not shown), each subpixel may have a simple structure including only two transistors and one capacitor have.

Otherwise, if the threshold voltage of the driving transistor DRT is updated at every sensing event, it should further include a sub-pixel structure capable of sensing a threshold voltage of the driving transistor DRT, and a sensing configuration.

In the following, a subpixel structure and a sensing structure capable of sensing the threshold voltage of the driving transistor DRT in the subpixel will be exemplified.

8 is a diagram illustrating an equivalent circuit diagram of a subpixel SP of the OLED display 100 according to the present embodiments. 9 is a diagram illustrating a sensing and compensation structure of a subpixel of the OLED display 100 according to the present embodiments.

Referring to FIG. 8, each subpixel SP of the organic light emitting diode display 100 includes an organic light emitting diode (OLED) and a driving circuit for driving the organic light emitting diode (OLED).

Referring to FIG. 8, an organic light emitting diode (OLED) and a driving circuit for driving the same include three transistors (DRT, T1, and T2) and one capacitor (Cstg).

As illustrated in FIG. 8, each sub-pixel of the OLED display 100 may have a 3T (transistor) 1C (Capacitor) structure.

8, the driving transistor DRT includes a first node N1 to which a data voltage Vdata is applied, and a second node N1 to which the first electrode N1 of the organic light emitting diode OLED, e.g., the anode electrode or the cathode electrode, And a third node N3 which is electrically connected to a driving voltage line DVL and to which a driving voltage EVDD is applied.

Referring to FIG. 8, a first transistor T1 is electrically connected between a data line DLi for supplying a data voltage Vdata and a first node N1 of a driving transistor DRT.

The gate node of the first transistor T1 receives a scan signal through the first gate line GLj. A drain node or a source node of the first transistor T1 receives the data voltage Vdata from the data line DLi. The source node or the drain node of the first transistor T1 is electrically connected to the first node N1 of the driving transistor DRT.

When the first transistor T1 is turned on by a scan signal applied to the gate node, the data voltage Vdata supplied to the drain node or the source node of the first transistor T1 is applied to the first transistor T1 T1 to the first node N1 of the driving transistor DRT electrically connected to the source node or the drain node.

8, the second transistor T2 is electrically connected between a reference voltage line RVL for supplying a reference voltage Vref and a second node N2 of the driving transistor DRT. do.

The gate node of the second transistor T2 receives a sense signal corresponding to a kind of scan signal through the second gate line GLj '. The drain node or the source node of the second transistor T2 is supplied with the reference voltage Vref from the electrically connected reference voltage line RVL. The source node or the drain node of the second transistor T2 is electrically connected to the second node N2 of the driving transistor DRT.

When the second transistor T2 is turned on by the sense signal Sense signal applied to the gate node, the reference voltage Vref supplied to the drain node or the source node of the second transistor T2 is applied to the second transistor T2 T2 to the second node N2 of the driving transistor DRT electrically connected to the source node or the drain node.

Referring to FIG. 8, the storage capacitor Cstg is electrically connected between the first node N1 and the second node N2 of the driving transistor DRT.

The scan signal applied to the gate node of the first transistor T1 and the sense signal applied to the gate node of the second transistor T2 may be different signals or the same signal.

That is, the first gate line GLj for supplying the scan signal to the gate node of the first transistor T1 and the second gate line GLj 'for supplying the sense signal to the gate node of the second transistor T2, And may be the same or different.

The sub-pixel structure of 3T1C shown in FIG. 8 is a structure capable of sensing and compensating for sub-pixels.

As described above, when the sub-pixel structure capable of threshold voltage sensing is used, the performance of the driving transistor DRT and the lifetime shortening can be improved while preventing black mobility.

Hereinafter, the sensing operation of the subpixel will be briefly described.

First, the data voltage Vdata is applied to the first node N1 of the driving transistor DRT and the reference voltage Vref is applied to the second node N2 of the driving transistor DRT.

Then, the second node N2 of the driving transistor DRT is floated to boost the voltage of the second node N2 of the driving transistor DRT.

The voltage rise of the second node N2 of the driving transistor DRT is the same as the voltage Vdata applied to the first node N1 of the driving transistor DRT starting from the reference voltage Vref, Vth).

That is, the saturated voltage of the second node N2 of the driving transistor DRT becomes "Vdata-Vth". Here, the data voltage (Vdata) is a known value.

Therefore, when the saturated voltage of the second node N2 of the driving transistor DRT is sensed (measured), the threshold voltage can be obtained. The black data voltage (Vconst + Vth) in FIG. 7 can be set with the threshold voltage thus obtained.

9, a structure for sensing the saturated voltage of the second node N2 of the driving transistor DRT is electrically connected to the reference voltage line RVL via the switch SW, And an analog-to-digital converter (ADC) for sensing the voltage of the second node N2 of the first and second transistors DRT and DRT.

Such an analog-to-digital converter (ADC) may be electrically connected to a plurality of reference voltage lines (RVL) and included one for each source driver IC (SDIC K, K = 1, 2, ..., M) .

Using the above-described analog-to-digital converter (ADC), the threshold voltage of the driving transistor DRT in the sub-pixel can be efficiently and accurately sensed.

9, the analog-to-digital converter (ADC) senses the voltage of the second node N2 of the driving transistor DRT, converts the sensed voltage Vsen into a digital value, And transmits the sensing data Dsen including the values to the timing controller 140. [

Referring to FIG. 9, the timing controller 140 receives the sensing data Dsen and compensates data for each of the subpixels based on the received sensing data Dsen.

For example, referring to FIG. 9, the timing controller 140 calculates the data compensation amount? Data for each of the subpixels based on the sensing data Dsen, stores it in a memory (not shown) (Data ' Data + DELTA Data) obtained by adding the data compensation amount [Delta] Data to the data Data for the corresponding subpixel at the timing to drive the pixels, ).

According to the above description, the threshold voltage deviation between the driving transistors DRT can be compensated through data compensation, thereby reducing or eliminating the luminance deviation between the subpixels, thereby improving the image quality.

First, a constant voltage (Vdata, Vref) is applied to the first node N1 and the second node N2 of the driving transistor DRT, respectively. do.

Then, both the first node N1 and the second node N2 of the driving transistor DRT are floated to boost the voltage.

The voltages of the first node N1 and the second node N2 of the driving transistor DRT are boosted so that the voltage of the second node N2 of the driving transistor DRT is lower than the threshold voltage of the organic light emitting diode OLED (EVSS), the organic light emitting diode (OELD) starts to emit light.

According to the embodiments described above, it is possible to provide the organic light emitting display 100 and the organic light emitting display panel 110 that can prevent the degradation of the black display characteristic.

According to the embodiments, it is possible to provide the organic light emitting display 100 and the organic light emitting display panel 110 which can prevent or reduce the performance degradation and the life shortening of the driving transistor while preventing the deterioration of the black visual characteristics have.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the inventions. , Separation, substitution, and alteration of the invention will be apparent to those skilled in the art. Therefore, the embodiments disclosed in the present invention are intended to illustrate rather than limit the scope of the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments. The scope of protection of the present invention should be construed according to the following claims, and all technical ideas within the scope of equivalents should be construed as falling within the scope of the present invention.

100: organic light emitting display
110: organic light emitting display panel
120: Data driver
130: Gate driver
140: Timing controller

Claims (7)

An organic light emitting display panel in which data lines and gate lines are arranged and in which subpixels are arranged;
A data driver driving the data lines;
A gate driver for driving the gate lines; And
And a timing controller for controlling the data driver and the gate driver,
Each of the sub-
Organic light emitting diodes; And
A driving transistor having a first node to which a data voltage is applied, a second node electrically connected to the first electrode of the organic light emitting diode, and a third node electrically connected to the driving voltage line,
Wherein the voltage of the first node of the driving transistor at the time of light emission of the organic light emitting diode in each of the at least one subpixel representing the black image among the subpixels is set to be equal to or higher than the voltage of the second node of the driving transistor, Wherein the organic light emitting display device is a liquid crystal display device. The method according to claim 1,
Wherein the voltage of the first node of the driving transistor
And the threshold voltage of the driving transistor in each sub-pixel representing the black image. 3. The method of claim 2,
Wherein the voltage of the first node of the driving transistor
Wherein a sum of a threshold voltage of a driving transistor in each sub-pixel representing the black image and a preset constant voltage. The method according to claim 1,
Each of the sub-
A first transistor controlled by a scan signal applied to a gate node and electrically connected between a data line supplying the data voltage and a first node of the driving transistor,
A second transistor which is controlled by a sense signal applied to a gate node and is electrically connected between a reference voltage line and a second node of the driving transistor,
And a storage capacitor connected between a first node and a second node of the driving transistor. 5. The method of claim 4,
Further comprising an analog digital converter electrically connected to the reference voltage line through a switch and sensing a voltage of a second node of the driving transistor. 6. The method of claim 5,
The analog-to-digital converter senses a voltage at a second node of the driving transistor, converts the voltage into a digital value, transmits sensing data to the timing controller,
The timing controller includes:
And compensates data for each of the subpixels based on the sensing data. Data lines arranged in a first direction;
Gate lines arranged in a second direction intersecting the first direction; And
Includes subpixels arranged in a matrix type,
Each of the sub-
Organic light emitting diodes; And
A driving transistor having a first node to which a data voltage is applied, a second node electrically connected to the first electrode of the organic light emitting diode, and a third node electrically connected to the driving voltage line,
Wherein the voltage of the first node of the driving transistor at the time of light emission of the organic light emitting diode in each of the at least one subpixel representing the black image among the subpixels is set to be equal to or higher than the voltage of the second node of the driving transistor, Voltage display panel.

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