KR102063348B1 - Gate drivier, organic light emitting display device using the same and method of driving the organic light emitting display device - Google Patents

Abstract

The present invention relates to a gate driver, and more particularly, to latch a waveform of input scan signals using an output latch signal, and output a sensing scan pulse using the latched input scan signals and an output selection signal. An object of the present invention is to provide an organic light emitting display device and a driving method thereof. To this end, the organic light emitting display device according to the present invention, the panel for outputting an image; A gate driver for outputting a driving scan pulse for driving the panel or a sensing scan pulse for sensing a characteristic of the panel to the panel; A data driver for supplying a data voltage to the panel while the driving scan pulse is supplied to the panel; And a timing controller configured to control the data driver by using the sensing signal sensed according to the sensing scan pulse so that the data driver corrects the data voltage. Latching a plurality of input scan signals including an input scan signal according to an output latch signal, the sensing scan pulse corresponding to the driving scan pulse included in the latched input scan signals, Characterized in that the output according to the output selection signal.

Description

GATE DRIVIER, ORGANIC LIGHT EMITTING DISPLAY DEVICE USING THE SAME AND METHOD OF DRIVING THE ORGANIC LIGHT EMITTING DISPLAY DEVICE}

The present invention relates to a gate driver, and more particularly, to a gate driver applied to an external compensation method, an organic light emitting display device using the same, and a driving method thereof.

Flat panel displays (FPDs) are used in various types of electronic products, including mobile phones, tablet PCs, and notebook computers. The flat panel display includes a liquid crystal display (LCD), a plasma display panel (PDP), an organic light emitting display (OLED), and more recently, an electrophoretic display. (EPD: ELECTROPHORETIC DISPLAY) is also widely used.

Among flat panel displays, an organic light emitting display device has attracted attention as a next-generation display device because it has a high response speed of 1 ms or less and low power consumption.

The organic light emitting display device includes a gate driver that sequentially supplies scan pulses to a plurality of gate lines.

The gate driver may be configured as an integrated circuit (IC) and mounted on a panel of the display device. In recent years, a gate driver in panel (GIP) type gate driver in which the thin film transistors and various elements constituting the gate driver are formed in the panel has been widely used.

Hereinafter, a gate driver composed of an integrated circuit (IC) is simply referred to as an integrated circuit gate driver, and the gate driver of the panel type as the gate driver is simply referred to as an embedded gate driver.

The light emitting diode applied to the organic light emitting diode display is easily deteriorated, and thus the characteristics of the organic light emitting diode are easily changed. Since the change in the characteristics of the organic light emitting diode may cause a deterioration of the quality of the organic light emitting display, the organic light emitting display generally uses an external compensation method or an internal compensation method to change the characteristics of the organic light emitting diode. Minimizing.

First, in the internal compensation method, the input image data voltage Vdata and the threshold voltage Vth of the driving transistor D-TFT are added in the pixel of the organic light emitting panel constituting the organic light emitting display device. It is applied to the driving transistor (D-TFT). Accordingly, the current of the driving transistor flows to the organic light emitting diode OLED, and the organic light emitting diode emits light. In the internal compensation method, since driving and sensing are performed at almost the same time, only one scan pulse waveform is used.

Second, in the external compensation scheme, characteristics of a driving transistor (D-TFT) or a pixel of the organic light emitting panel are measured, and a timing controller (T-con) calculates the measured result to the organic light emitting panel. The size of the input signals can be controlled.

For example, in the organic light emitting display device using the external compensation method, the timing controller determines the input image data voltage Vdata by using a result of measuring a driving transistor (D-TFT), a characteristic of a pixel, or the like. Calculate The driving voltage generated by the calculation is applied to the driving transistor D-TFT to drive the organic light emitting diode. In the organic light emitting diode display using the calculation method, for example, the driver driver IC outputs a voltage obtained by adding the image data voltage Vdata and the threshold voltage Vth of the driving transistor D-TFT to output the voltage. Supply to the drive transistor.

The organic light emitting display device using the external compensation method measures a characteristic of the driving transistor (D-TFT) at the time of sensing, and applies a compensation voltage by calculating the sensed result at the time of driving. In the organic light emitting display device using the external compensation method, since the waveforms of the sensing scan pulse and the driving scan pulse are different, two or more scan pulses are used.

In addition, the organic light emitting display device using the external compensation scheme senses a characteristic change of the driving transistor (D-TFT) generated during driving and compensates for a plurality of lines or pixels during a blanking time. You have to sense it. However, since the cycles of the driving scan pulse repeated in units of frames and the sensing scan pulse repeated in a long period of several tens of seconds differ, it is difficult to implement the external compensation scheme in the conventional organic light emitting display device.

As described above, in the organic light emitting display device using the internal compensation method, since sensing and driving proceed almost simultaneously, only one waveform of the scan pulse exists, but the organic light emitting display device using the external compensation method. Since sensing and driving are done separately, two or more scan pulses should be used.

In addition, in order to compensate for deterioration occurring during driving of the organic light emitting display device using the external compensation method, the organic light emitting display device must sense a portion of the organic light emitting panel during driving. In order to apply such a method, since a scan pulse for driving and a scan pulse for sensing must exist at the same time, it is difficult to implement the conventional gate driver.

FIG. 1 is an exemplary view showing a configuration of a gate driver applied to a conventional display device using an external compensation method, and in particular, an exemplary diagram illustrating a configuration of a gate driver configured of an integrated circuit (IC). FIG. 2 is a diagram illustrating waveforms of signals input and output to and from a gate driver of FIG. 1. FIG. 3 is an exemplary view showing a configuration of a gate driver applied to a conventional display device using an external compensation method, and in particular, an exemplary view showing a configuration of a gate driver configured of an embedded gate driver (GIP). 4 is an exemplary diagram illustrating waveforms of signals input and output to and from a gate driver of FIG. 3.

The IC driver, applied to an organic light emitting display (AMOLED) using an internal compensation scheme, has an output for driving a shift register and a scan line that sequentially transmit scan pulses according to a start signal and a clock. It can be configured as a buffer. In the integrated gate driver, scan pulses are sequentially shifted in accordance with the clock. However, in the integrated gate driver, only scan pulses which are sequentially shifted can be generated.

Therefore, when the integrated circuit gate driver is applied to the organic light emitting display device to which the external compensation scheme is applied, the integrated gate driver does not easily generate another scan pulse that can be sensed during the blanking period.

In order to solve this problem, an integrated circuit gate driver as shown in FIG. 1 has been proposed. That is, the integrated circuit gate driver shown in FIG. 1 is configured in such a manner that two or more shift registers 11 and 12 are used to make one scan pulse. Waveforms of signals input and output to the integrated circuit gate driver shown in FIG. 1 are shown in FIG. 2. Referring to FIG. 1, the first shift register 11 performs a function of generating a driving scan pulse, and the second shift register 12 performs a function of generating a sensing scan pulse. Clocks of different frequencies (Start1, Clock1, Start Clock2) are input to each of the first shift register 11 and the second shift register 12. The selector 13 constituting the integrated gate driver selects one of the scan pulses output from the two shift registers 11 and 12 according to an output selection signal Out_Select. That is, in FIG. 1, the scan pulses Scan # 1 to Scan # n output through the selector 13 and the output buffer 14 may be driving scan pulses or sensing scan pulses.

For example, in order to sense one line per vertical blanking time, the sensing scan pulse is shifted by one line per frame, and the driving scan pulse is one horizontal time. One line per shift.

In order to output the scan pulse as described above, the conventional integrated gate driver outputs the sensing scan pulse by changing the output select signal Out_Select during the vertical blanking period, as shown in FIG. During the video output period, the driving scan pulses are output.

In the conventional integrated circuit gate driver using the scheme described with reference to FIGS. 1 and 2, the sequential sensing scheme is easy to implement. However, in the conventional integrated gate driver using the method described with reference to FIGS. 1 and 2, a method of dividing the sensing order into several blocks or randomly selecting the sensing line so that the sensing line is not visible is complicated to implement.

Also, when the method used in the integrated circuit gate driver described with reference to FIGS. 1 and 2 is applied to an embedded gate driver using multiple clocks, as shown in FIGS. 3 and 4, the embedded type The control signal of the gate driver is doubled. Therefore, the scheme used in the integrated gate driver described with reference to FIGS. 1 and 2 is practically difficult to apply to the embedded gate driver.

For example, FIG. 3 shows an embedded gate driver using the scheme described with reference to FIGS. 1 and 2, which shows an embedded gate driver comprised of shift registers 12, 12 using four clocks. That is, the built-in gate driver GIP illustrated in FIG. 3 includes a first shift register 11, a second shift register 12, a selector 13, and an output buffer 14. The first shift register 11 uses four clocks GCLK1_1, GCLK1_2, GCLK1_3, and GCLK1_4 and a first start signal Start1, and the second shift register 12 has four other clocks. (GCLK2_1, GCLK2_2, GCLK2_3, GCLK2_4) and the second start signal Start2 are used.

Therefore, as shown in FIG. 3, in the embedded gate driver using the method applied to the integrated circuit gate driver described with reference to FIGS. 1 and 2, in order to generate the driving scan pulse and the sensing scan pulse, Since eight clocks are needed, the circuit design can be complicated.

In detail, a conventional gate driver capable of external compensation may be implemented in an integrated circuit type or an embedded type, but requires a large number of control signals such as a clock. Therefore, it is difficult to substantially implement a conventional gate driver capable of external compensation.

The present invention has been proposed to solve the above problems, and latches the waveform of the input scan signals using the output latch signal, and outputs the sensing scan pulse using the latched input scan signals and the output selection signal, It is a technical object of the present invention to provide a gate driver, an organic light emitting display device using the same, and a driving method thereof.

According to an aspect of the present invention, there is provided an organic light emitting display device including: a panel configured to output an image; A gate driver for outputting a driving scan pulse for driving the panel or a sensing scan pulse for sensing a characteristic of the panel to the panel; A data driver for supplying a data voltage to the panel while the driving scan pulse is supplied to the panel; And a timing controller configured to control the data driver by using the sensing signal sensed according to the sensing scan pulse so that the data driver corrects the data voltage. Latching a plurality of input scan signals including an input scan signal according to an output latch signal, the sensing scan pulse corresponding to the driving scan pulse included in the latched input scan signals, Characterized in that the output according to the output selection signal.

According to an aspect of the present invention, there is provided a method of driving an organic light emitting display device, the method comprising: outputting a driving scan pulse for driving the panel or a sensing scan pulse for sensing a characteristic of the panel to the panel; step; Supplying a data voltage to the panel while the driving scan pulse is supplied to the panel; And correcting the data voltage by using the sensing signal sensed according to the sensing scan pulse, and outputting the driving scan pulse or the sensing scan pulse includes: Latching a plurality of input scan signals including an input scan signal according to an output latch signal, the sensing scan pulse corresponding to the driving scan pulse included in the latched input scan signals, Characterized in that the output according to the output selection signal.

According to an aspect of the present invention, there is provided a gate driver, including: a shift register configured to output input scan signals sequentially including driving scan pulses; An output latch unit for latching the input scan signals transmitted from the shift register according to an output latch signal; According to the output selection signal, the driving scan pulse transmitted from the output latch unit is selected and outputted, or corresponding to the driving scan pulse included in the input scan signals latched in the output latch unit. A selection unit for outputting sensing scan pulses; And an output buffer for outputting the driving scan pulse or the sensing scan pulse transmitted from the selection unit to the panel according to an output enable signal.

According to the present invention, the control signal for external compensation can be minimized.

In addition, according to the present invention, the sensing scan pulse for detecting the characteristic change of the driving transistor generated during the driving of the organic light emitting display device can be easily output.

In addition, according to the present invention, the sensing order of the gate lines may be variously changed.

1 is an exemplary view showing a configuration of a gate driver applied to a conventional display device using an external compensation method.
FIG. 2 is an exemplary view illustrating waveforms of signals input and output to and from a gate driver shown in FIG. 1. FIG.
3 is an exemplary view showing a configuration of a gate driver applied to a conventional display device using an external compensation method.
4 is an exemplary view illustrating waveforms of signals input and output to and from a gate driver shown in FIG. 3.
5 is a configuration diagram of an organic light emitting display device according to an embodiment of the present invention.
6 is an exemplary view showing a configuration of a gate driver applied to an organic light emitting display device according to a first embodiment of the present invention.
7 is an exemplary view illustrating waveforms of signals input and output to a gate driver applied to an organic light emitting display device according to a first embodiment of the present invention.
8 is an exemplary view illustrating a configuration of a gate driver applied to an organic light emitting display device according to a second embodiment of the present invention.
9 is an exemplary diagram illustrating waveforms of signals input and output to a gate driver applied to an organic light emitting display device according to a second exemplary embodiment of the present invention.

Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of the present invention.

5 is a configuration diagram of an organic light emitting display device according to an exemplary embodiment of the present invention.

In the organic light emitting diode display according to the present invention, as shown in FIG. 5, a pixel is formed at each intersection of the gate lines GL1 to GLg and the data lines DL1 to DLd, and outputs an image. 100, driving scan pulses are sequentially output to the gate lines GL1 to GLg formed in the panel 100, or sensing scan pulses for sensing characteristics of the panel 100 are output. A data driver 300 for supplying a data voltage to the data lines DL1 to DLd formed in the panel 100 while the gate driver 200 and the driving scan pulse are supplied to the panel. And controlling the functions of the gate driver 200 and the data driver 300 and using the sensed signal sensed according to the sensing scan pulse so that the data driver 300 corrects the data voltage. And a timing controller for controlling the data driver 300.

In particular, the gate driver 200 latches a plurality of input scan signals including an input scan signal including the driving scan pulse according to an output latch signal, and is included in the latched input scan signals. And outputs the sensing scan pulse corresponding to the driving scan pulse to the panel 100 according to an output selection signal.

The organic light emitting diode display according to the present invention includes a sensing operation of sensing the threshold voltage Vth of the driving transistor formed for each pixel of the panel 100 and a display operation of emitting each pixel according to a compensation data voltage. Do this.

The sensing operation is performed by the sensing scan pulses output from the gate driver 200 to gate lines formed in the panel, and the display operation is performed by the gate driver 200. By the driving scan pulses which are sequentially output.

The present invention relates to the sensing operation during the sensing operation and the display operation as described above. In particular, the gate driver and the gate driver for outputting the sensing scan pulse to the gate lines for the sensing operation. It is about a method.

A method of sensing the threshold voltage (Vth) of the driving transistor using the sensing scan pulse during the sensing operation, and generating the compensation data voltage using the sensing signal received by the sensing operation; In the display operation, a method of displaying an image using the compensation data voltage is disclosed in Korean Patent Application Publication Nos. 10-2012-0045252, 10-2013-0037081, 10-2013-0039551, and 10 It is described in detail in -2013-0044567, 10-2013-0066449, 10-2013-0066450 and 10-2013-0074147 and the like, the detailed description thereof will be omitted.

Therefore, in the following, the structure, function and characteristics of the gate driver for generating the sensing scan pulse and the driving scan pulse and outputting them to the gate line lines, and the driving method of the gate driver will be described. The invention is described.

Definitions of terms to be described below are as follows.

The scan signal is a signal output from the gate driver 200 to drive each pixel, and light may or may not be output from the pixel by the scan signal. The scan signal may include a driving scan pulse for turning on a switching transistor formed in the pixel to output light from the pixel, a turn-off signal for turning off the switching transistor, and sensing of a threshold voltage of the driving transistor. It includes a scan pulse for sensing that is output to the pixel.

The driving scan pulse is a signal for turning on the switching transistor, and means the scan pulse. The driving scan pulse is output once for each gate line in one frame period, and the turn-off signal is output to the gate line during the remaining period of the one frame period.

The sensing scan pulse is a signal output to the pixel in order to sense the threshold voltage Vth of the driving transistor during the sensing operation. The sensing scan pulse is output to the gate line while the driving scan pulse is not output. The sensing scan pulse may be output one time or two or more times based on one time output during one frame period. The sensing scan pulses may be sequentially output to the gate lines in consecutive frames, or may be randomly output. Hereinafter, for convenience of description, the present invention will be described with an example in which the sensing scan pulse is output once during one frame period and sequentially output to the gate lines in successive frames.

The input scan signal refers to a signal generated in the process of outputting the scan signal inside the gate driver 200. The input scan signal may include the driving scan pulse and the turn off signal.

First, in the panel 100, pixels are formed in regions where a plurality of gate lines GL and data lines DL cross each other.

Each of the pixels may be connected to an organic light emitting diode OLED, a data line DL, and a gate line GL to include the driving transistor and a storage capacitor for controlling the organic light emitting diode OLED. Can be.

The anode electrode of the organic light emitting diode OLED is connected to a first power source, and the cathode electrode is connected to a second power source. The organic light emitting diode OLED generates light having a predetermined luminance in response to a current supplied from the driving transistor.

The various circuits formed in the pixel correspond to a data voltage supplied to the data line DL when a driving scan pulse is supplied to the gate line GL and supplied to the organic light emitting diode OLED. To control.

To this end, the pixel includes the driving transistor connected between the first power supply and the organic light emitting diode.

In addition, a plurality of thin film transistors, a plurality of capacitors, and a plurality of resistors may be formed in each of the pixels to detect the threshold voltage of the driving transistor. However, as described above, the present invention is not characterized in detecting the threshold voltage of the driving transistor, and various configurations of the pixels for the detection of the threshold voltage are described in the above-described Patent Publications. It is. Therefore, a detailed description of the configuration of the pixels for detecting the threshold voltage is omitted.

Next, the timing controller 400 uses a gate control signal GCS and the data driver to control the gate driver 200 using a vertical / horizontal synchronization signal and a clock signal supplied from an external system (not shown). A data control signal DCS for controlling 300 is output.

In addition, the timing controller samples the input image data input from the external system and rearranges the input image data, and supplies the rearranged digital image data to the data driver 300.

That is, the timing controller 400 rearranges input image data supplied from the external system, transmits the rearranged digital image data to the data driver 300, and horizontally matches a clock signal supplied from the external system. The gate control signal GCS for controlling the gate driver 200 and the data for controlling the data driver 300 using the synchronization signal, the vertical synchronization signal VSYNC, and the data enable signal DE. The control signal DCS is generated and transmitted to the gate driver 200 and the data driver 300.

In particular, in order to achieve the above object, the timing controller 400, the receiving unit for receiving the input image data and the various signals as described above from the external system, the input of the signals received from the receiving unit An image data processor for generating the rearranged digital image data by rearranging the image data according to the panel, and for controlling the gate driver 200 and the data driver 300 using the signals received from the receiver. A control signal generator for generating the gate control signal GCS and the data control signals DCS, and the image data and the control signals generated by the image data processor, the data driver 300 or the gate driver. It may be configured to include a transmitter for output to the 200).

In addition, the timing controller 400 analyzes the sensing signal received using the sensing scan pulse, corrects the image data, and outputs the data to the data driver 300, or the data driver 300 The data driver 300 may be controlled to output the corrected data voltage. Such a function is also described in detail in the above-described publications, so a detailed description thereof is omitted.

In addition, the timing controller 400 may generate and transmit various signals used in the gate driver 200 to the gate driver 200. For example, the timing controller 400 may include the start signal Start, the clock, the output latch signal Out_Latch, the output select signal Out_Select, and the output enable signal OE shown in FIG. 6. The first start signal Start1, the first clock GCLK1_1, the second clock GCLK1_2, the third clock GCLK1_3, the fourth clock GCLK1_4 and the output latch shown in FIG. 8 can be transmitted to the gate driver. A signal Out_Latch, an output select signal Out_Select, and an output enable signal OE may be transmitted to the gate driver. These signals may be included in the gate control signal.

Next, the data driver 300 converts the image data input from the timing controller 400 into an analog data voltage so that one horizontal line corresponds to one horizontal line every one of the horizontal periods when the driving scan pulse is supplied to the gate line. A data voltage is supplied to the data lines. That is, the data driver 300 converts the image data into a data voltage and outputs the data lines using gamma voltages supplied from a gamma voltage generator (not shown).

The data driver 300 generates a sampling signal by shifting a source start pulse SSP from the timing controller 400 according to a source shift clock SSC. The data driver 300 latches the pixel data RGB (image data) input according to the source shift clock SSC according to a sampling signal, changes the data data to a data voltage, and then enables the source output. The data voltage is supplied to the data lines in units of horizontal lines in response to a Source Output Enable (SOE) signal.

To this end, the data driver 300 may include a shift register unit, a latch unit, a digital analog converter, an output buffer, and the like.

The shift register unit outputs a sampling signal by using data control signals SSC and SSP received from the timing controller 400.

The latch unit latches the digital image data Data sequentially received from the timing controller 400, and simultaneously outputs the digital image data to the digital analog converter DAC.

The digital-to-analog converter converts the image data transmitted from the latch unit into positive or negative data voltages and outputs the same. That is, the digital-to-analog converter is configured to correct the image data according to the polarity control signal POL transmitted from the timing controller 400 using the gamma voltage supplied from the gamma voltage generator (not shown). The data voltage is converted into a polarity or a negative data voltage and output to the data lines.

The output buffer includes the data line DL of the panel according to the source output enable signal SOE transmitted from the timing controller 400 to the positive or negative data voltage transmitted from the digital analog converter. Will print

The data driver 300 may convert the image data transmitted in the state corrected by the timing controller 400 into the data voltage and output the data data to the data lines formed in the panel. The timing controller According to the data control signal transmitted from 400, the data voltage may be corrected and output to the data lines.

Finally, the gate driver 200 sequentially supplies driving scan pulses to the gate lines GL1 to GLg of the panel 100 in response to the gate control signal input from the timing controller 400. do. Accordingly, the switching transistors TFTs formed in each pixel of the corresponding horizontal line to which the driving scan pulse is input may be turned on to output an image to each pixel.

That is, the gate driver 200 shifts a gate start pulse (GSP) transmitted from the timing controller 400 according to a gate shift clock (GSC), and sequentially shifts the gate lines. The driving scan pulses having the gate-on voltage Von are supplied to GL1 to GLg.

In addition, the gate driver 200 has the turn-off signal having a gate-off voltage Voff for turning off the switching transistor for the remaining period during which the driving scan pulse of the gate-on voltage Von is not supplied. Is output to the gate line.

The gate driver 200 may be configured as an integrated circuit (IC) and mounted on a panel of the display device. In addition, the gate driver may be formed as a gate driver in panel (GIP) type in which the thin film transistor and various elements constituting the gate driver are formed in the panel.

Hereinafter, a gate driver composed of an integrated circuit (IC) is simply referred to as an integrated circuit gate driver, and the gate driver of the panel type as the gate driver is simply referred to as an embedded gate driver.

Specific functions and operation methods of the gate driver 200 will be described in detail with reference to FIGS. 6 to 9.

FIG. 6 is an exemplary view showing a configuration of a gate driver applied to an organic light emitting display device according to a first embodiment of the present invention. In particular, FIG. 7 is an exemplary diagram illustrating waveforms of signals input and output to a gate driver applied to an organic light emitting display device according to a first embodiment of the present invention.

The organic light emitting display device according to the first embodiment of the present invention, as described above, detects the panel 100 for outputting an image, a driving pulse for driving the panel 100, or a characteristic of the panel. The data to supply the data voltage to the panel while the gate driver 200 outputting the sensing scan pulse to the panel 100 and the driving scan pulse are supplied to the panel 100. And a timing controller for controlling the data driver by using the sensed signal sensed according to the sensing scan pulse so that the driver 300 and the data driver 300 correct the data voltage.

Here, the gate driver 200 latches a plurality of input scan signals including an input scan signal including the driving scan pulse according to an output latch signal, and is included in the latched input scan signals. And outputs the sensing scan pulse corresponding to the driving scan pulse according to an output selection signal.

To this end, the gate driver 200, as shown in FIG. 6, the shift register 210 for outputting the input scan signals sequentially including the driving scan pulse, and the output latch signal Out_Latch. The output scan unit 220 latching the input scan signals transmitted from the shift register 210 and the driving scan pulse transmitted from the output latch unit 220 according to the output selection signal Out_Select. Selector 230 for outputting or outputting a sensing scan pulse corresponding to the driving scan pulse included in the input scan signals latched by the output latch unit 220; An output buffer 240 for outputting the driving scan pulse or the sensing scan pulse transmitted from the selector 230 to the panel 100 according to an output enable signal OE. It should.

First, the shift register generates a driving scan pulse to be output to the gate lines using a start signal and a clock, and outputs the driving pulse to the output latch unit 220.

As described above, the driving scan pulse is output to the gate line only during a period corresponding to one horizontal period during which the data voltage is output to the panel during one frame period, and during the remaining period of the one horizontal period. The turn off signal is output.

That is, the shift register outputs the driving scan pulse and the turn off signal to the output latch unit 220. The driving scan pulse and the turn-off signal output from the shift register 210 are collectively referred to as an input scan signal.

In this case, since the input scan signal is output for each of the gate lines, the shift register 210 outputs the plurality of input scan signals to the output latch unit 220.

At any one time point, only one input scan signal of the input scan signals becomes the driving scan pulse, and the other input scan signals become the turn off signal.

Next, the output latch unit 220 latches a waveform of each of the input scan signals at the time when the output latch signal Out_Latch is input, and selects the information about the latched waveform. To send. To this end, the selection unit 230 may be formed of various types of memory.

Next, when the output select signal Out_Select is input, the selector 230 senses a signal corresponding to the driving scan pulse included in the input scan signals transmitted from the output latch unit 220. Output the scan pulse.

That is, the selector 230 outputs the sensing scan pulse by using the output selection signal Out_Selec and the input scan signals transmitted from the output latch unit 220.

To this end, the selection unit 230 may be composed of various types of mux.

Finally, the output buffer 240 outputs the driving scan pulse or the sensing scan pulse transmitted from the selection unit 230 to the panel 100 according to the output enable signal OE. It performs the function.

Hereinafter, the organic light emitting display device using the gate driver 200 configured as described above may include the scan signals Scan # 1 to Scan # g including the driving scan pulse or the sensing scan pulse. A method of driving an organic light emitting display device is described.

In the method of driving an organic light emitting display device according to the present invention, a driving scan pulse for driving the panel 100 or a sensing scan pulse for sensing a characteristic of the panel 100 is output to the panel 100. And supplying a data voltage to the panel 100 while the driving scan pulse is supplied to the panel 100 and using the sensing signal sensed according to the sensing scan pulse. Compensating for.

The step of supplying the data voltage to the panel 100 and the step of correcting the data voltage by using the sensed signal sensed according to the sensing scan pulse are described in detail in the above-mentioned Patent Documents. Hereinafter, the step of outputting the drive yaw scan pulse or the sensing scan pulse will be described in detail.

The outputting of the driving scan pulse or the sensing scan pulse may include latching a plurality of input scan signals including an input scan signal including the driving scan pulse according to an output latch signal Out_Latch. The sensing scan pulse corresponding to the driving scan pulse included in the input scan signals may be output according to an output selection signal Out_Selec.

The operation of outputting the driving scan pulse or the sensing scan pulse will be described in more detail as follows.

First, the shift register 210 outputs the input scan signals including the driving scan pulse to the output latch unit 220 in sequence.

That is, the shift register 210 uses the vertical synchronization signal VSYNC, the data enable signal DEN, the start signal Start, and the clock in the image display period. The input scan signal including the driving scan pulse or the turn-off signal to be output as lines is generated by the number corresponding to the number of gate lines and output to the output latch unit 220. In FIG. 7, signals marked as scan are the scan signals output from the gate driver 200. However, among the scan signals, a pulse having a low level may be understood as a driving scan pulse generated from the shift register 210 and input to the output latch unit 220. In this case, the driving pulse The signal including the scan pulse may be understood as the input scan signal.

Second, the output latch unit 220 latches the input scan signals transmitted from the shift register 210 to the output latch signal. In this case, the output latch unit 220 latches a waveform of each of the input scan signals at the time when the output latch signal is input.

That is, as shown in FIG. 7, when the output latch signal Out_Latch is at a high level, the output latch unit 220 latches each waveform of the input scan signals.

For example, when the first output latch signal Out_Latch is output in FIG. 7, the first input scan signal to be output to the first gate line is the driving scan pulse having a low level, and the second gate line to the second gate line. The second input scan signals to the g th input scan signals to be output to the g-th gate lines are signals having a high level. Accordingly, the output latch 220 latches a signal corresponding to a low level in a memory corresponding to the first gate line, and has a high level in a memory corresponding to the second to g-th gate lines. Latch the corresponding signal.

Third, the selector 230 selects and outputs the driving scan pulse included in the input scan signals according to the output selection signal Out_Selcec, or latches the input scan signals. The sensing scan pulse corresponding to the driving scan pulse included in the output is output.

That is, when the output selection signal is input, the selector 230 outputs a sensing scan pulse corresponding to the driving scan pulse included in the input scan signals.

For example, the output selection signal is not input to the selection unit 230 during the image display time. Accordingly, the selector 230 is generated from the shift register 210 and outputs the input scan signals transmitted through the output latch 220 to the output buffer 240 as they are.

In this case, the output buffer 240 outputs the scan signals including the driving scan pulses to the gate lines. Therefore, the driving scan pulse is sequentially output to the gate lines.

When the blanking time arrives after the display time elapses, the timing controller 400 transmits the output selection signal to the selection unit 230.

When the output selection signal is transmitted, the selection unit 230 outputs the sensing scan pulse by using the input scan signals and the output selection signal stored in the output latch unit 220. .

For example, in the example shown in FIG. 7, when the first output latch signal is output, only the first input scan signal output to the first gate line has a low level, and the remaining input scan signals are high level. Since the selector 230 generates the sensing scan pulse by using the first input scan signal having the low level, the selector 230 may output the sensing pulse to the first gate line.

In the present invention, as described above, since the output latch unit 220 only needs to store information on the input scan signals during one frame period, the information stored in the output latch unit 220 is sufficient. Are less likely to be lost or damaged. Therefore, according to the present invention, the sensing scan pulse can be output to the gate line more accurately and stably.

In addition, according to the present invention, by forming the output latch signal Out_Latch in various forms, a gate line to which the sensing scan pulse is output may be selected. Therefore, according to the present invention, the sensing scan pulse may be randomly output to the gate lines. That is, according to the present invention, a method of dividing the sensing order into several blocks or a method of randomly selecting the sensing lines may be implemented such that the sensing lines are not visible.

Fourth, the output buffer 240 receives the scan signals Scan # 1 to Scan # g including the driving scan pulse and the turn-off signals transmitted from the selector 230 during the image output period. Output to the gate lines. In this case, the scan pulses are sequentially supplied to the gate lines, and an image is output through the panel.

In addition, the output buffer 240 outputs the sensing scan pulse transmitted from the selector 230 to a gate line corresponding to the sensing scan pulse during the blanking period. The sensing signal sensed by the sensing scan pulse is transmitted to the timing controller 400. The timing controller 400 may correct values of the data voltages output to the data lines by using the sensing signal.

The arrow shown in FIG. 7 illustrates the order in which the sensing scan pulses are output. For example, in FIG. 7, when the output latch signal Out_Latch is output, information about the driving scan pulse and the turn-off signals are latched, and the output selection signal with the output selection signal Out_Select is output. The sensing scan pulse is output using the signal and the latched driving scan pulse.

FIG. 8 is an exemplary view showing a configuration of a gate driver applied to an organic light emitting display device according to a second embodiment of the present invention. In particular, FIG. 9 is an exemplary diagram illustrating waveforms of signals input and output to a gate driver applied to an organic light emitting display device according to a second embodiment of the present invention. In the following description, the same or similar contents as those described with reference to FIGS. 6 and 7 will be omitted or simply described.

In the organic light emitting display device according to the second embodiment of the present invention, as described above, the panel 100 for outputting an image, a driving scan pulse for driving the panel 100, or a characteristic of the panel is sensed. The data to supply the data voltage to the panel while the gate driver 200 outputting the sensing scan pulse to the panel 100 and the driving scan pulse are supplied to the panel 100. And a timing controller for controlling the data driver by using the sensed signal sensed according to the sensing scan pulse so that the driver 300 and the data driver 300 correct the data voltage.

Here, the gate driver 200 latches a plurality of input scan signals including an input scan signal including the driving scan pulse according to an output latch signal, and is included in the latched input scan signals. And outputs the sensing scan pulse corresponding to the driving scan pulse according to an output selection signal.

To this end, the gate driver 200, as shown in FIG. 8, the shift register 210 for outputting the input scan signals sequentially including the driving scan pulse, and the output latch signal Out_Latch. The output scan unit 220 latching the input scan signals transmitted from the shift register 210 and the driving scan pulse transmitted from the output latch unit 220 according to the output selection signal Out_Select. Selector 230 for outputting or outputting a sensing scan pulse corresponding to the driving scan pulse included in the input scan signals latched by the output latch unit 220; An output buffer 240 for outputting the driving scan pulse or the sensing scan pulse transmitted from the selector 230 to the panel 100 according to an output enable signal OE. It should.

First, the shift register uses the first start signal Start1, the first clock GCLK1_1, the second clock GCLK1_2, the third clock GCLK1_3, and the fourth clock GCLK1_4. The driving scan pulse to be output is generated and output to the output latch unit 220.

The driving scan pulse is output to the gate line only during a period corresponding to one horizontal period during which the data voltage is output to the panel during one frame period, and the turn-off signal is output during the remaining period of the one horizontal period. Is output.

As described above, the shift register 210 outputs the input scan signals using at least two clocks, and at least one of the clocks is configured to generate the sensing scan pulse. It can be used in the selection unit. For example, as shown in FIG. 9, each of the first clocks GCLK1_1 to the fourth clocks GCLK1_1 includes a signal corresponding to the output selection signal Out_Select. Therefore, the first to fourth clocks may be used for output of the scan pulse for sensing. That is, according to the present invention, additional clocks are not required for the output of the sensing scan pulse, and clocks used for the output of the driving scan pulse may also be used for the output of the sensing scan pulse. Therefore, since the number of clocks of the embedded gate driver 200 can be reduced, the embedded gate driver 200 can be easily manufactured.

Next, the output latch unit 220 latches a waveform of each of the input scan signals at the time when the output latch signal Out_Latch is input, and selects the information about the latched waveform. To send. To this end, the selection unit 230 may be formed of various types of memory.

Next, when the output select signal Out_Select is input, the selector 230 senses a signal corresponding to the driving scan pulse included in the input scan signals transmitted from the output latch unit 220. Output the scan pulse.

That is, the selector 230 outputs the sensing scan pulse by using the output selection signal Out_Selec and the input scan signals transmitted from the output latch unit 220.

To this end, the selection unit 230 may be composed of various types of mux.

Finally, the output buffer 240 outputs the driving scan pulse or the sensing scan pulse transmitted from the selection unit 230 to the panel 100 according to the output enable signal OE. It performs the function.

Hereinafter, the organic light emitting display device using the gate driver 200 configured as described above may include the scan signals Scan # 1 to Scan # g including the driving scan pulse or the sensing scan pulse. A method of driving an organic light emitting display device is described.

In the method of driving an organic light emitting display device according to the present invention, a driving scan pulse for driving the panel 100 or a sensing scan pulse for sensing a characteristic of the panel 100 is output to the panel 100. And supplying a data voltage to the panel 100 while the driving scan pulse is supplied to the panel 100 and using the sensing signal sensed according to the sensing scan pulse. Compensating for.

The outputting of the driving scan pulse or the sensing scan pulse may include latching a plurality of input scan signals including an input scan signal including the driving scan pulse according to an output latch signal Out_Latch. The sensing scan pulse corresponding to the driving scan pulse included in the input scan signals may be output according to an output selection signal Out_Selec.

The operation of outputting the driving scan pulse or the sensing scan pulse will be described in more detail as follows.

First, the shift register 210 outputs the input scan signals including the driving scan pulse to the output latch unit 220 in sequence.

That is, the shift register 210 includes a vertical synchronization signal VSYNC, a data enable signal DEN, a first start signal Start1, and the clocks GLCK1_1 to GCLK1_4 during an image output period. The output latch unit 220 generates the input scan signal including the driving scan pulse or the turn-off signal to be output to the gate lines by a number corresponding to the number of the gate lines. Will output In FIG. 9, signals marked as scan are the scan signals output from the gate driver 200. However, among the scan signals, a pulse having a low level may be understood as a driving scan pulse generated from the shift register 210 and input to the output latch unit 220. In this case, the driving pulse The signal including the scan pulse may be understood as the input scan signal. In addition, although the shift register 210 using the four clocks is illustrated in FIGS. 8 and 9, the shift register 210 may be variously configured using at least two clocks.

Second, the output latch unit 220 latches the input scan signals transmitted from the shift register 210 to the output latch signal. In this case, the output latch unit 220 latches a waveform of each of the input scan signals at the time when the output latch signal is input.

Third, the selector 230 selects and outputs the driving scan pulse included in the input scan signals according to the output selection signal Out_Selcec, or latches the input scan signals. The sensing scan pulse corresponding to the driving scan pulse included in the output is output.

Fourth, the output buffer 240 receives the scan signals Scan # 1 to Scan # g including the driving scan pulse and the turn-off signals transmitted from the selector 230 during the image output period. Output to the gate lines. In this case, the scan pulses are sequentially supplied to the gate lines, and an image is output through the panel.

In addition, the output buffer 240 outputs the sensing scan pulse transmitted from the selector 230 to a gate line corresponding to the sensing scan pulse during the blanking period. The sensing signal sensed by the sensing scan pulse is transmitted to the timing controller 400. The timing controller 400 may correct values of the data voltages output to the data lines by using the sensing signal.

The arrow shown in FIG. 9 illustrates the order in which the sensing scan pulses are output. For example, in FIG. 9, when the output latch signal Out_Latch is output, information about the driving scan pulse and the turn-off signals is latched, and the output selection signal with the output selection signal Out_Select is output. The sensing scan pulse is output using the signal and the latched driving scan pulse.

Briefly summarized the present invention as described above is as follows.

The gate driver 200 uses the output latch signal using the output latch signal at the time of driving the gate line to be sensed in the next vertical blanking period while sequentially driving the entire panel during the image output period. These output waveforms are stored in the output latch unit 220.

The gate driver 200 changes the output selection signal to perform a sensing operation in the vertical blanking period. When the output selection signal is changed, the sensing scan pulse is output to the gate line selected in the image output period.

For example, in order to sense the 100th gate line, the output latch signal is supplied to the output latch unit 220 when the 100th gate line is driven during the image output period.

FIG. 6 illustrates a gate driver 200 applied to the first embodiment of the present invention. In particular, FIG. 6 illustrates an integrated circuit gate driver 200. The integrated circuit gate driver 200 may include a shift register 210 for generating a driving scan pulse, the output latch unit 220 and the shift register including one or more memories to store the driving scan pulse. A selection unit 230 for selecting the driving scan pulse or the sensing scan pulse to be output to the gate lines among the signals output from the output latch unit 210 and the output latch unit 220 and the driving scan pulse or the driving pulse; And an output buffer 240 for outputting a sensing scan pulse to the gate line.

7 illustrates waveforms of signals input and output to the gate driver 200 applied to the first embodiment of the present invention. Referring to FIG. 7, in each frame, when a gate line to be sensed is driven in a next vertical blanking period in a display time, the driving scan pulse is latched using the output latch signal. Stored in the unit 220, the sensing scan pulse is output by changing the output selection signal in the vertical blanking period.

8 and 9 illustrate the gate driver 200 applied to the second embodiment of the present invention, and particularly, the built-in gate driver 200. The built-in gate driver, for example, uses four clocks, but may be configured to use at least two clocks. In addition, each of the four clocks may be mixed with two waveforms for performing a sensing operation and a display operation.

Those skilled in the art to which the present invention pertains will understand that the present invention can be implemented in other specific forms without changing the technical spirit or essential features. Therefore, it is to be understood that the embodiments described above are exemplary in all respects and not restrictive. The scope of the present invention is shown by the following claims rather than the above description, and all changes or modifications derived from the meaning and scope of the claims and their equivalent concepts should be construed as being included in the scope of the present invention. do.

100: panel 200: gate driver
300: data driver 400: timing controller
210: shift register 220: output latch
230: selection unit 240: output buffer

Claims (11)

A panel for outputting an image;
A gate driver for outputting a driving scan pulse for driving the panel or a sensing scan pulse for sensing a characteristic of the panel to the panel;
A data driver for supplying a data voltage to the panel while the driving scan pulse is supplied to the panel; And
A timing controller configured to control the data driver by using the sensing signal sensed according to the sensing scan pulse so that the data driver corrects the data voltage;
The gate driver,
Latching a plurality of input scan signals including an input scan signal including the driving scan pulse according to an output latch signal, and corresponding to the driving scan pulses included in the latched input scan signals An organic light emitting display device which outputs a sensing scan pulse according to an output selection signal. The method of claim 1,
The gate driver,
A shift register configured to output the input scan signals in which the driving scan pulses are sequentially included;
An output latch unit for latching the input scan signals transmitted from the shift register according to the output latch signal;
The driving scan pulse transmitted from the output latch unit is selected and output according to the output selection signal, or the driving scan pulse included in the input scan signals latched in the output latch unit is output. A selection unit for outputting corresponding sensing scan pulses; And
And an output buffer configured to output the driving scan pulse or the sensing scan pulse transmitted from the selection unit to the panel according to an output enable signal. The method of claim 2,
The shift register outputs the input scan signals using at least two clocks,
At least one of the clocks is used in the selection unit to generate the sensing scan pulse. The method of claim 2,
The output latch unit,
And a waveform of each of the input scan signals is latched and transmitted to the selector when the output latch signal is input. The method of claim 2,
The selection unit,
And the sensing scan pulse corresponding to the driving scan pulse included in the input scan signals transmitted from the output latch unit when the output selection signal is input. The method of claim 1,
The gate driver,
An organic light emitting display device comprising: an integrated circuit gate driver formed of an integrated circuit and mounted on the panel, or an embedded gate driver embedded in the panel. Outputting a driving scan pulse for driving a panel or a sensing scan pulse for sensing a characteristic of the panel to the panel;
Supplying a data voltage to the panel while the driving scan pulse is supplied to the panel; And
Correcting the data voltage using the sensed signal detected according to the sensing scan pulse;
The outputting of the driving scan pulse or the sensing scan pulse,
Latching a plurality of input scan signals including an input scan signal including the driving scan pulse according to an output latch signal, and corresponding to the driving scan pulses included in the latched input scan signals A method of driving an organic light emitting display device, characterized by outputting a sensing scan pulse in accordance with an output selection signal. The method of claim 7, wherein
The outputting of the driving scan pulse or the sensing scan pulse to the panel,
Outputting the input scan signals in which the driving scan pulse is sequentially included;
Latching the input scan signals according to the output latch signal;
According to the output selection signal, the driving scan pulses included in the input scan signals are selected and output, or sensing corresponding to the driving scan pulses included in the latched input scan signals. Outputting a scan pulse; And
And outputting the driving scan pulse or the sensing scan pulse to the panel according to an output enable signal. The method of claim 8,
The latching of the input scan signals may include:
And latching a waveform of each of the input scan signals when the output latch signal is input. The method of claim 8,
The step of outputting the sensing scan pulse,
And outputting a sensing scan pulse corresponding to the driving scan pulse included in the input scan signals when the output selection signal is input. A shift register for outputting input scan signals sequentially including a driving scan pulse;
An output latch unit for latching the input scan signals transmitted from the shift register according to an output latch signal;
According to the output selection signal, the driving scan pulse transmitted from the output latch unit is selected and outputted, or corresponding to the driving scan pulse included in the input scan signals latched in the output latch unit. A selection unit for outputting sensing scan pulses; And
And an output buffer configured to output the driving scan pulse or the sensing scan pulse transmitted from the selection unit to a panel according to an output enable signal.

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