KR20120003154A - Organic light emitting diode display device and method for driving the same - Google Patents

Abstract

PURPOSE: An organic light emitting diode display device and a driving method thereof are provided to prevent the variation of an OLED driving current by excluding interference of a second power voltage line at a threshold voltage storage period of a driving switching device. CONSTITUTION: A first switching device(T1) is turned on or off by a gate signal from a gate line. A compensation voltage supply line is connected to a first node when the first switching device is turned on. A third switching device(T3) is turned on or off according to a light emission control voltage from a light emission control line of a prior stage. The first node is connected to a second node when the third switching device is turned on. A fourth switching device(T4) is turned on or off according to a light emission control voltage from the light emission control line. A second power voltage supply line is connected to a third node when the fourth switching device is turned on. A driving switching device(DT) controls an amount of light emitted from an organic light emitting diode by controlling an amount of currents supplied to the organic light emitting diode according to the signal state of the first node.

Description

ORGANIC LIGHT EMITTING DIODE DISPLAY DEVICE AND METHOD FOR DRIVING THE SAME}

The present invention relates to an OLED display device capable of compensating a threshold voltage of a driving switching element and preventing a change in driving current of an organic light emitting diode (OLED) due to interference of a low potential supply line. It relates to a driving method.

In the OLED display, a plurality of pixels are arranged in a matrix to display an image. Each pixel of the organic light emitting diode display includes an OLED and a pixel driver that independently drives the OLED.

The OLED is composed of a cathode connected to the pixel driver and an anode connected to a power supply line, and an organic layer formed between the anode and the cathode.

The pixel driver is configured in each pixel region defined by a gate line for supplying a scan signal, a data line for supplying a data signal, and a power supply line for supplying a power signal together with each OLED. Each of the pixel drivers includes at least one switching element, a driving switching element, and at least one storage capacitor connected between each gate line, data line, and power supply line to drive the OLED.

The OLED display configured as described above is driven by being divided into a non-light emitting period and a light emitting period, and the non-light emitting period is largely divided into a reset, initialization, sampling, and address light emitting period. The OLED display device drives an OLED by storing a threshold voltage in a sampling period after receiving a reset and initialization period, receiving a data voltage in an address period, and compensating for the threshold voltage.

However, the OLED display device according to the related art has a problem that it is difficult to compensate for the negative threshold voltage. In addition, the OLED display according to the prior art has a problem that the luminance of the OLED is uneven due to the change in the OLED driving current due to the interference of the resistance of the low potential voltage supply line.

The present invention is to solve the above problems, and to compensate for the threshold voltage of the driving switching element and to prevent the change of the OLED driving current due to the interference of the low potential supply line and an OLED display device and a driving method thereof. The purpose is to provide.

In order to achieve the above object, an OLED display device according to an exemplary embodiment of the present invention includes a display panel in which a pixel driver is formed in each pixel area; A gate driver for driving gate lines and emission control lines of the display panel; A data driver for driving data lines of the display panel; A power supply unit supplying first and second power voltages and a compensation voltage to power lines of the display panel; And a timing controller for aligning the image data with the driving of the display panel to supply the data driver to the data driver and generating a gate and data control signal to control the gate and the data driver. The pixel driver may be turned on or off according to a gate signal provided from the gate line, and a first switching element connecting the compensation voltage supply line and the first node to each other when the pixel driver is turned on; A second switching element turned on or off according to a gate signal provided from the gate line and connecting the data line and a second node when turned on; A third switching element which is turned on or off according to the emission control voltage provided from the previous emission control line, and which connects the first node and the second node when turned on; A fourth switching element which is turned on or off in accordance with an emission control voltage provided from the emission control line and connects the second power supply voltage supply line and a third node when the emission control line is turned on; A storage capacitor coupled between the second node and the third node; And a driving switching element for controlling the amount of light emitted from the organic light emitting diode by controlling the amount of current supplied to the organic light emitting diode according to the signal state of the first node.

The gate driver may sequentially generate the gate signals having a high or low logic according to the gate control signal and sequentially supply the gate signals to the gate lines.

The organic light emitting diode includes a first electrode connected to the first power voltage supply line; A second electrode connected to the drain electrode of the drive switching element; And an organic layer formed between the first electrode and the second electrode.

The data driver generates a data voltage based on the data control signal from the image data provided from the timing controller, and supplies a compensation data voltage whose data voltage is compensated by the compensation voltage to the data lines. .

In addition, in order to achieve the above object, the OLED display device driving method according to the embodiment of the present invention, the pixel driver is turned on or off in accordance with the gate signal provided from the gate line, the compensation voltage at the time of turn-on A first switching element connecting the supply line and the first node to each other; A second switching element which is turned on or off in accordance with the gate signal provided from the gate line, and which connects the data line and the second node when turned on; A third switching element which is turned on or off according to the emission control voltage provided from the previous emission control line, and which connects the first node and the second node when turned on; A fourth switching element which is turned on or turned off according to the emission control voltage provided from the emission control line and connects the second power supply voltage supply line and the third node when the emission control line is turned on; A storage capacitor coupled between the second node and the third node; An organic light emitting diode display device having a display panel formed in each pixel area including a driving switching element for controlling an amount of light emitted from the organic light emitting diode by controlling an amount of current supplied to the organic light emitting diode according to a signal state of the first node In the driving method of the pixel driving unit, each pixel driving unit is divided into a voltage addressing period, a threshold voltage storage period of the driving switching element, a buffer period, and a light emission period.

In the voltage addressing period, the gate signal and the light emission control signal are supplied in a high logic state, and the light emission control signal from the previous stage is supplied in a low logic state to provide the first, second, and fourth switching elements and the The driving switching device is turned on, and the third switching device is turned off.

The gate signal is supplied in a high logic state during the threshold voltage storage period of the driving switching element, and the light emission control signal and the light emission control signal from the previous stage are supplied in a low logic state to provide the first and second switching elements. And the driving switching device are turned on, and the third and fourth switching devices are turned off.

In the buffer period, the light emission control signal from the previous stage is supplied in a high logic state, the gate signal and the light emission control signal are supplied in a low logic state, and the third switching element and the driving switching element DT ) Is turned on, and the first, second, and fourth switching elements are turned off.

In the light emission period, the light emission control signal and the light emission control signal from the previous stage are supplied in a high logic state, and the gate signal is supplied in a low logic state, so that the third and fourth switching elements and the drive switching are performed. The device is turned on, and the first and second switching devices are turned off.

The data line may be supplied with a compensation data voltage whose data voltage is compensated by the compensation voltage.

In the OLED display according to the present invention, even if the characteristics of the driving switching element change, the threshold voltage of the changed driving switching element is compensated. Therefore, it is possible to prevent the luminance unevenness caused by the OLED driving current is changed in accordance with the characteristic deviation of the drive switching element. In addition, interference of the second power supply voltage line is excluded in the threshold voltage storage period of the driving switching element. Therefore, the change of the OLED driving current, which may be caused by factors such as resistance of the second power supply voltage line, is prevented.

1 is a block diagram showing an OLED display according to an embodiment of the present invention.
FIG. 2 is an equivalent circuit diagram illustrating one sub-pixel of the display panel shown in FIG. 1. FIG.
3 is a drive waveform diagram of the equivalent circuit diagram shown in FIG. 2;
4 is an equivalent circuit diagram for explaining a method of driving a pixel driver during a data voltage addressing period.
FIG. 5 is an equivalent circuit diagram illustrating a method of driving a pixel driver in a threshold voltage storage period of a driving switching device. FIG.
6 is an equivalent circuit diagram illustrating a method of driving a pixel driver during an OLED emission period.
7A and 7B are views showing comparisons between OLED driving current characteristics of the prior art and the present invention.

Hereinafter, an OLED display device and a driving method thereof according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram illustrating an OLED display according to an exemplary embodiment of the present invention. 2 is an equivalent circuit diagram illustrating one sub-pixel of the display panel illustrated in FIG. 1.

In the OLED display illustrated in FIG. 1, the display panel 2 having the pixel driver P in each pixel area, the gate lines GL1 to GLn and the emission control lines EL1 to ELn of the display panel 2 are illustrated. First and second power supplies to the gate driver 4 driving the gates, the data driver 6 driving the data lines DL1 to DLm of the display panel 2, and the power lines of the display panel 2. The power supply unit 8 for supplying the voltages VDD and VSS and the compensation voltage Vref, and the image data RGB from the outside are aligned with the driving of the display panel 2 and supplied to the data driver 6. In addition, the timing controller 10 generates gate and data driving control signals DCS and GCS to control the gate and data driving units 4 and 6.

In the display panel 2, a plurality of sub-pixels PXL are arranged in a matrix form in each pixel area to display an image, and each sub-pixel PXL is an OLED and a pixel driver P driving the OLEDs independently. It is provided. Specifically, each sub-pixel PXL as shown in FIG. 2 is a pixel driver connected to gate lines GL1 to GLn, data lines DL1 to DLm, and emission control lines EL1 to ELn, respectively. (P) and an OLED connected between the pixel driver P and the second power supply voltage VSS line, equivalently represented by a diode.

The pixel driver P includes the first to fourth switching elements T1 to T4, the driving switching element DT, and the storage capacitor C. FIG. Here, the first to fourth switching elements T1 to T4 and the driving switching element DT may be constituted by an NMOS transistor or a PMOS transistor. Hereinafter, the first to fourth switching elements T1 to T4 and the driving switching element DT may be driven. An example in which the switching element DT is made of an NMOS transistor will be described.

The first switching element T1 is turned on or off according to the gate signal Gs provided from the gate line GL, and connects the compensation voltage Vref line and the second node N2 to each other at turn-on. do.

The second switching element T2 is turned on or off according to the gate signal Gs provided from the gate line GLn, and connects the data line DL and the third node N3 at turn-on.

The third switching element T3 is turned on or turned off in accordance with the emission control voltage Em-1 provided from the emission control line ELn-1 of the previous stage, and is turned on with the second node N2 at turn-on. The third node N3 is connected.

The fourth switching element T4 is turned on or turned off according to the emission control voltage Em provided from the emission control line ELn, and at turn-on, the fourth power supply voltage VSS line and the fourth node N4 are turned on. ).

The storage capacitor C is connected between the third node N3 and the fourth node N4.

The driving switching element DT controls the amount of light emitted by the OLED by controlling the amount of current I supplied to the OLED according to the signal state of the second node N2.

The OLED is composed of an anode electrode connected to the first power supply voltage VDD line, a cathode electrode connected to the pixel driver P, and an organic layer formed between the anode electrode and the cathode electrode. The amount of emitted light of the OLED is adjusted according to the driving switching element DT of the pixel driver P. The OLED may be configured of an inverted OLED in which a cathode electrode is connected to a lower substrate.

The gate driver 4 responds to the gate control signal GCS from the timing controller 10, for example, the gate signal in response to a gate start pulse GSP and a gate shift clock GSC. Gs) (eg, a high logic gate voltage) is sequentially generated, and the pulse width of the gate signal Gs is controlled according to a gate output enable (GOE) signal. The gate signal Gs is sequentially supplied to the gate lines GL1 to GLn. Here, a gate off voltage (eg, a low logic gate voltage) is supplied to a period when the gate signal Gs is not supplied to the gate lines GL1 to GLn.

In addition, the gate driver 2 sequentially generates emission control voltages Em having a high or low logic, and sequentially supplies the emission control voltages Em to ELn. Here, the emission control voltage Em sequentially outputs the period in which the current flows to the OLED, that is, the period during which the image is displayed.

The data driver 6 uses the source start pulse SSP, the source shift clock SSC, and the like among the data control signals DCS from the timing controller 10. Image data (Data) input from the digital signal is converted into an analog voltage, that is, an analog data voltage. In this case, the data driver 6 converts the image data Data into the data voltage VData using a gamma voltage set divided to correspond to the grayscale values of the image data. The data voltage VData generates a compensation data voltage VData + Vref whose compensation is equal to the compensation voltage Vref. The compensating data voltage VData + Vref is supplied to each data line DL1 to DLm in response to a Source Output Enable (SOE) signal.

The timing controller 10 supplies the data driver 6 with image data Data in which RGB data RGB input from the outside is aligned according to the size and resolution of the display panel 2. The timing controller 10 may include a gate using a synchronization signal input from the outside, for example, a dot clock DCLK, a data enable signal DE, a horizontal synchronization signal Hsync, a vertical synchronization signal Vsync, or the like. And generate data control signals GCS and DCS and supply them to the gate driver 4 and the data driver 6, respectively.

3 is a driving waveform diagram of the equivalent circuit diagram shown in FIG. 2.

Referring to FIG. 3, an OLED display according to the present invention is largely divided into a data voltage addressing period t1, a threshold voltage storage period t2 of a driving switching element, a buffer period t3, and an OLED emission period t4. do.

4 is an equivalent circuit diagram for describing a method of driving a pixel driver during a data voltage addressing period.

3 and 4, in the data voltage addressing period t1, the gate signal Gs and the emission control signal Em are supplied in a high logic state, and the emission control signal Em-1 from the front end is low. It is supplied in a logic state. Accordingly, the first, second, and fourth switching elements T1, T2, and T4 and the driving switching element DTr are turned on, and the third switching element T3 is turned off.

Accordingly, the compensation voltage Vref is supplied to the second node N2 through the first switching element T1. In addition, the compensation data voltage VData + Vref is supplied to the third node through the second switching element T2. The second power supply voltage VSS is supplied to the fourth node N4 through the fourth switching device T4. Then, the storage capacitor C stores the difference voltage VData + Vref-VSS between the compensation data voltage VData + Vref and the second power supply voltage VSS.

5 is an equivalent circuit diagram illustrating a method of driving a pixel driver in a threshold voltage storage period of a driving switching device.

3 and 5, the gate signal Gs is supplied in a high logic state in the threshold voltage storage period t2 of the driving switching element, and the emission control signal Em and the emission control signal Em- 1) is supplied in a low logic state. Accordingly, the first and second switching elements T1 and T2 and the driving switching element DTr are turned on, and the third and fourth switching elements T3 and T4 are turned off.

Accordingly, the voltage level of the second node N2 is maintained at the compensation voltage Vref, and the voltage level of the third node N3 is maintained at the compensation data voltage VData + Vref. Meanwhile, as the fourth switching device T4 is turned off, the voltage level of the fourth node N4 is equal to the difference voltage Vref− between the compensation voltage Vref and the threshold voltage Vth of the driving switching device DT. VSS). Then, in the storage capacitor C, the sum (VData + Vth) of the data voltage VData, which is the difference voltage between the third node N3 and the fourth node N4, and the threshold voltage Vth of the driving switching element DT. Is stored.

The threshold voltage storage period t2 of the driving switching device is the second power source because the fourth switching device T4 is turned off when the threshold voltage Vth of the driving switching device DT is stored in the storage capacitor C. Interference from the voltage VSS line is excluded. Therefore, a change in the OLED driving current, which may be caused by factors such as resistance of the second power supply voltage VSS line, is prevented.

Referring to FIG. 3, in the buffer period t3, the emission control signal Em-1 from the front end is supplied in a high logic state, the gate signal Gs and the emission control signal Em are supplied in a low logic state. do. Accordingly, the third switching element T3 and the driving switching element DT are turned on, and the first, second, and fourth switching elements T1, T2, and T4 are turned off.

6 is an equivalent circuit diagram for describing a method of driving a pixel driver during an OLED emission period.

3 and 6, in the OLED emission period t4, the emission control signal Em and the emission control signal Em-1 from the front end are supplied in a high logic state, and the gate signal Gs is low. It is supplied in a logic state. Accordingly, the third and fourth switching elements T3 and T4 and the driving switching element DT are turned on, and the first and second switching elements T1 and T2 are turned off.

In the OLED emission period t4, the second power supply voltage VSS is supplied to the fourth node N4 through the fourth switching element T4. Then, as the second switching device T2 is turned off, the third node N3 adds the sum of the data voltage VData stored in the storage capacitor C and the threshold voltage Vth of the driving switching device DT. (VData + Vth) is supplied, and the second power supply voltage VSS supplied from the fourth node N4 through the storage capacitor C is additionally supplied. Therefore, the voltage level of the third node N3 is equal to the sum of the data voltage VData, the threshold voltage Vth of the driving switching element DT, and the second power supply voltage VSS (VData + Vth + VSS). do. The voltage VData + Vth + VSS of the third node N3 is supplied to the second node N2 through the third switching element T3. Then, the data voltage VData + Vth + VSS whose own threshold voltage Vth is compensated is supplied to the gate terminal of the driving switching element DT. Accordingly, the OLED emits light corresponding to the levels of the threshold voltage Vth and the data voltage VData of the driving switching element DT.

As such, in the OLED display according to the exemplary embodiment, even when the characteristics of the driving switching element DT change, the threshold voltage Vth of the changed driving switching element DT is compensated again. Therefore, the voltage Vgs, which is a voltage between the gate electrode and the source electrode of the driving switching element DT, is always maintained at the voltage stored in the storage capacitor C, that is, the data voltage VData + Vth in which the threshold voltage Vth is compensated. Accordingly, it is possible to prevent luminance unevenness caused by the OLED driving current being changed according to the characteristic variation of the driving switching element DT.

In addition, interference of the second power supply voltage VSS line is excluded in the threshold voltage storage period t2 of the driving switching element DT. Therefore, a change in the OLED driving current, which may be caused by factors such as resistance of the second power supply voltage VSS line, is prevented.

7A and 7B illustrate the OLED driving current characteristics of the prior art and the present invention. Specifically, FIG. 7A is a diagram simulating the OLED driving current of the threshold voltage compensation circuit according to the prior art, and FIG. 7B is a diagram simulating the OLED driving current according to the present invention.

Referring to FIG. 7A, it can be seen that the threshold voltage compensation circuit according to the related art compensates for the positive threshold voltage (+ Vth), but does not compensate for the negative threshold voltage (-Vth). have. That is, it can be seen that the amount of change in the OLED driving current is large according to the change of the threshold voltage (-Vth) in the negative region. In addition, the threshold voltage compensation circuit according to the related art can see a large change in the OLED driving current due to interference caused by resistance of the second power supply voltage VSS line.

On the other hand, the OLED display according to the present invention as shown in Figure 7b, it can be seen that the threshold voltage (Vth) in both the positive (positive) and negative (negative) region is compensated for almost no change in the OLED driving current have. In addition, since interference of the second power supply voltage VSS line is excluded, it can be seen that there is little change in the OLED driving current that may be caused by factors such as resistance of the second power supply voltage VSS line. Accordingly, the OLED display device according to the present invention has an amorphous silicon transistor (a-Si TFT) or a polycrystalline silicon transistor (N-Si TFT) having a negative threshold voltage (Vth) or a threshold voltage (Vth) shift may occur. Poly TFT), microcrystalline Si TFT, organic transistor, oxide transistor, or the like. The cathode may also be applied to an inverted OLED connected to a lower substrate.

The present invention described above is not limited to the above-described embodiment and the accompanying drawings, and it is common in the art that various substitutions, modifications, and changes can be made without departing from the technical spirit of the present invention. It will be evident to those who have knowledge of.

2: display panel 4: gate driver
6: data driver 8: data driver
10: timing control unit

Claims (10)

A display panel in which the pixel driver is formed in each pixel area;
A gate driver for driving gate lines and emission control lines of the display panel;
A data driver for driving data lines of the display panel;
A power supply unit supplying first and second power voltages and a compensation voltage to power lines of the display panel; And
A timing controller for aligning the image data with the driving of the display panel to supply the data driver to the data driver and generating a gate and data control signal to control the gate and the data driver;
The pixel driver may be turned on or off according to a gate signal provided from the gate line, and a first switching element connecting the compensation voltage supply line and the first node to each other when the pixel driver is turned on;
A second switching element turned on or off according to a gate signal provided from the gate line and connecting the data line and a second node when turned on;
A third switching element which is turned on or off according to the emission control voltage provided from the previous emission control line, and which connects the first node and the second node when turned on;
A fourth switching element which is turned on or off in accordance with an emission control voltage provided from the emission control line and connects the second power supply voltage supply line and a third node when the emission control line is turned on;
A storage capacitor coupled between the second node and the third node;
And a driving switching element which controls the amount of light emitted from the organic light emitting diode by controlling the amount of current supplied to the organic light emitting diode according to the signal state of the first node. The method of claim 1,
The gate driver
And sequentially generating the gate signals having a high or low logic according to the gate control signal and sequentially supplying the gate signals to the gate lines. The method of claim 1,
The organic light emitting diode
A first electrode connected to the first power voltage supply line;
A second electrode connected to the drain electrode of the drive switching element; And
And an organic layer formed between the first electrode and the second electrode. The method of claim 1,
The data driver
Generating a data voltage according to the data control signal from the image data provided from the timing controller;
And supplying compensation data voltages whose data voltages are compensated by the compensation voltages to the data lines. A first switching element in which the pixel driver is turned on or off according to a gate signal provided from the gate line, and connects a compensation voltage supply line and a first node to each other at turn-on; A second switching element which is turned on or off in accordance with the gate signal provided from the gate line, and which connects the data line and the second node when turned on; A third switching element which is turned on or off according to the emission control voltage provided from the previous emission control line, and which connects the first node and the second node when turned on; A fourth switching element which is turned on or turned off according to the emission control voltage provided from the emission control line and connects the second power supply voltage supply line and the third node when the emission control line is turned on; A storage capacitor coupled between the second node and the third node; An organic light emitting diode display device having a display panel formed in each pixel area including a driving switching element for controlling an amount of light emitted from the organic light emitting diode by controlling an amount of current supplied to the organic light emitting diode according to a signal state of the first node In the driving method of,
And the pixel driver is driven in one of: a voltage addressing period, a threshold voltage storing period of a driving switching element, a buffer period, and a light emitting period. The method of claim 5, wherein
In the voltage addressing period
The gate signal and the light emission control signal are supplied in a high logic state, and the light emission control signal from the previous stage is supplied in a low logic state,
And the first, second, and fourth switching elements and the driving switching element are turned on, and the third switching element is turned off. The method according to claim 6,
In the threshold voltage storage period of the driving switching element
The gate signal is supplied in a high logic state, the light emission control signal and the light emission control signal from the previous stage are supplied in a low logic state,
And the first and second switching elements and the driving switching element are turned on, and the third and fourth switching elements are turned off. The method of claim 7, wherein
In the buffer period
The light emission control signal from the previous stage is supplied in a high logic state, the gate signal and the light emission control signal are supplied in a low logic state,
And the third switching element and the driving switching element are turned on, and the first, second and fourth switching elements are turned off. The method of claim 8,
In the light emitting period
The light emission control signal and the light emission control signal from the previous stage are supplied in a high logic state, and the gate signal is supplied in a low logic state,
And the third and fourth switching elements and the driving switching element are turned on, and the first and second switching elements are turned off. The method of claim 5, wherein
And a compensation data voltage whose data voltage is compensated as much as the compensation voltage is supplied to the data line.

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