CN112185267B - Circuit substrate, display panel and display device - Google Patents
Circuit substrate, display panel and display device Download PDFInfo
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- CN112185267B CN112185267B CN201910506754.7A CN201910506754A CN112185267B CN 112185267 B CN112185267 B CN 112185267B CN 201910506754 A CN201910506754 A CN 201910506754A CN 112185267 B CN112185267 B CN 112185267B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0421—Structural details of the set of electrodes
- G09G2300/0426—Layout of electrodes and connections
Abstract
The invention discloses a circuit substrate, a display panel and a display device. The circuit substrate is used for controlling the display panel to display, and is provided with a first area, the first area corresponds to a display area of the display panel to be controlled, the circuit substrate comprises a driving lead layer and an electrode layer which are arranged in an insulating mode, the driving lead layer comprises a plurality of driving leads, and the driving leads can be electrically connected with an external driving chip; the electrode layer comprises row electrode leads, column electrode leads and a first electrode and a second electrode which are arranged in pairs and used for binding an external device, and the driving leads of the driving lead layer are located in the first area. According to the circuit substrate disclosed by the invention, the driving lead is arranged on the back side of one side of the electrode layer, which can be bound with an external device, and an external driving chip can be bound on the back side of the electrode layer, so that the driving chip is prevented from occupying the frame space, and the size of the frame can be reduced.
Description
Technical Field
The invention belongs to the technical field of display, and particularly relates to a circuit substrate, a display panel and a display device.
Background
The Micro light emitting diode (Micro LED) technology is a technology of integrating a high-density Micro-sized LED array on a substrate, and since the Micro LED display is a self-luminous display, compared with an OLED, the Micro LED display has the advantages of better material stability, longer service life and the like, and has greater application potential.
Generally, in order to realize large-size and ultra-large-size display, a plurality of Micro LED display panels need to be spliced, but due to the existence of a frame on the Micro LED display panels, the display effect of a picture at the spliced position is poor.
Therefore, how to reduce the frame of the Micro LED display panel becomes an urgent problem to be solved.
Disclosure of Invention
The embodiment of the invention provides a circuit substrate, a display panel and a display device, and aims to reduce the frame of a micro-luminous display panel.
In a first aspect, the present invention provides a circuit substrate, where the circuit substrate is used for controlling a display panel to display, and the circuit substrate has a first area, and the first area corresponds to a display area of the display panel to be controlled, and the circuit substrate includes: the driving lead layer comprises a plurality of driving leads, and the driving leads can be electrically connected with an external driving chip; the electrode layer is arranged on the driving lead layer in a laminated mode and is insulated from the driving lead layer, the electrode layer comprises row electrode leads, column electrode leads and first electrodes and second electrodes which are arranged in pairs and used for binding external devices, the first electrodes are electrically connected with the corresponding driving leads through the row electrode leads, and the second electrodes are electrically connected with the corresponding driving leads through the column electrode leads; the driving lead of the driving lead layer is located in the first area.
According to an aspect of the present invention, the electrode layer includes a first electrode layer and a second electrode layer provided to be insulated from each other, the first electrode layer being provided close to the driving lead layer with respect to the second electrode layer; the row electrode lead comprises a plurality of lead sections and a plurality of bridging lines, and the plurality of lead sections are distributed at intervals and connected through the bridging lines; the first electrode is electrically connected with the corresponding driving lead through the row electrode lead, the second electrode is electrically connected with the corresponding driving lead through the column electrode lead, the first electrode, the second electrode, the lead segment and the column electrode lead are arranged on the same layer and are positioned on the first electrode layer, and the bridging line is positioned on the second electrode layer.
According to an aspect of the present invention, the first electrode layer further includes auxiliary leads disposed at one side of the first electrode and the second electrode, the auxiliary leads being located in the first region, one end of each of the auxiliary leads being electrically connected to a corresponding one of the driving leads, and the other end of each of the auxiliary leads being electrically connected to a corresponding one of the row electrode leads. Preferably, the auxiliary leads are positioned at one side of the column electrode leads and are disposed in parallel with the electrode leads.
According to one aspect of the invention, the circuit substrate further comprises a pin layer, the pin layer is arranged on one side of the driving lead layer, which is far away from the electrode layer, and is insulated from the driving lead layer, the pin layer comprises a plurality of metal pins for binding an external driving chip, the plurality of metal pins are electrically connected with corresponding driving leads, and the driving leads are electrically connected with the external chip through the metal pins.
According to one aspect of the invention, a first insulating layer is arranged between the driving lead layer and the pin layer, the first insulating layer is provided with a plurality of first through holes, and the driving lead is electrically connected with the metal pin through the first through holes; and/or a second insulating layer is arranged between the driving lead layer and the electrode layer, the second insulating layer is provided with a plurality of second through holes, and the row electrode leads and the column electrode leads are respectively and electrically connected with the corresponding driving leads through the second through holes; and/or a third insulating layer is arranged between the first electrode layer and the second electrode layer, the third insulating layer is provided with a plurality of third through holes, the third through holes of the first part in the plurality of third through holes are arranged corresponding to the bridging lines, the third through holes of the second part are arranged corresponding to the first electrodes and the second electrodes, the bridging lines are electrically connected with the corresponding auxiliary leads through the third through holes of the first part, and the first electrodes and the second electrodes can be electrically connected with an external device through the third through holes of the second part.
According to an aspect of the present invention, the circuit substrate has two regions symmetrically distributed in a row direction; a plurality of metal pins in the pin layer are arranged at intervals in the same row direction and are symmetrically arranged in the two areas; a plurality of column electrode leads in the electrode layer are arranged at intervals in the row direction and are uniformly distributed corresponding to the two areas, a plurality of row electrode leads are arranged at intervals in the column direction, and an auxiliary lead extending in the column direction is arranged corresponding to each column electrode lead; each column electrode lead in each area is electrically connected with a corresponding metal pin in the same area through a corresponding driving lead, and the auxiliary lead is electrically connected with a corresponding metal pin through a corresponding driving lead; each auxiliary lead in one of the two areas is electrically connected to the row electrode lead of the odd-numbered row corresponding to the auxiliary lead, and each auxiliary lead in the other area is electrically connected to the row electrode lead of the even-numbered row corresponding to the auxiliary lead; preferably, the drive leads are symmetrically arranged in the row direction.
According to an aspect of the present invention, the circuit substrate further includes a pad layer disposed on a side of the first electrode layer facing away from the driving lead layer and insulated from the first electrode layer, the pad layer includes a plurality of pads electrically connected to the corresponding first and second electrodes, and the external device is electrically connected to the first and second electrodes through the pads.
According to an aspect of the invention, the circuit substrate further comprises a substrate located at a side of the driving lead layer facing away from the electrode layer.
In a second aspect, the present invention provides a display panel, including the circuit substrate of any one of the above embodiments; an external device bonded to the first electrode and the second electrode arranged in pair; preferably, the external device is a micro light emitting diode.
In a third aspect, the present invention provides a display device including the display panel of the above embodiment.
In the embodiment of the invention, the driving lead layer and the electrode layer are sequentially stacked, so that the driving lead is arranged on the back side of one side, capable of being bound with an external device, of the electrode layer, and the driving chip can be bound on the back side to control the external device bound with the electrode layer through the driving lead. In this embodiment, each drive lead is located under the electrode layer, and each drive lead is located the first region that corresponds with the display area of the display panel that treats control of circuit substrate to can bind outside driver chip at the back of electrode layer, avoid drive lead and driver chip to occupy the frame space, can reduce the frame size.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments of the present invention will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained based on the drawings without inventive efforts, wherein the drawings are not drawn to actual scale.
Fig. 1 is a schematic structural diagram of a circuit substrate according to an embodiment of the invention;
FIG. 2a is a perspective view of a pin layer of a circuit substrate according to an embodiment of the invention;
FIG. 2b is a perspective view of the pin layer and the driving lead layer of the circuit substrate according to the embodiment of the invention;
FIG. 2c is a perspective view of the lead layer, the driving lead layer and the first electrode layer of the circuit substrate according to the embodiment of the invention;
FIG. 2d is a perspective view of the lead layer, the driving lead layer, the first electrode layer and the second electrode layer of the circuit substrate according to the embodiment of the invention;
FIG. 3a is a cross-sectional view A-A of FIG. 2 a;
FIG. 3B is a cross-sectional view B-B of FIG. 2B;
FIG. 3C is a cross-sectional view C-C of FIG. 2C;
FIG. 3D is a cross-sectional view D-D of FIG. 2D;
FIG. 3E is a cross-sectional view E-E of FIG. 1;
FIG. 4 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 5 is a sectional view F-F of fig. 4.
In the figure: 10-a circuit substrate; 11-a pin layer; 111-metal pins; 12-a drive lead layer; 121-drive leads; 13-an electrode layer; 13 a-a first electrode layer; 13 b-a second electrode layer; 131-row electrode leads; 131 a-lead segment; 131 b-bridging lines; 132-column electrode leads; 133-a first electrode; 134-a second electrode; 135-auxiliary leads; 14-a pad layer; 141-pad; 15-a first insulating layer; 16-a second insulating layer; 17-a third insulating layer; 20-external device.
Detailed Description
Features and exemplary embodiments of various aspects of the present invention will be described in detail below, and in order to make objects, technical solutions and advantages of the present invention more apparent, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not to be construed as limiting the invention. It will be apparent to one skilled in the art that the present invention may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present invention by illustrating examples of the present invention.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
It will be understood that when a layer, region or layer is referred to as being "on" or "over" another layer, region or layer in describing the structure of the component, it can be directly on the other layer, region or layer or intervening layers or regions may also be present. Also, if the component is turned over, one layer or region may be "under" or "beneath" another layer or region.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The embodiments will be described in detail below with reference to the accompanying drawings.
The circuit substrate, the display panel motherboard and the display panel according to the embodiment of the invention are described in detail with reference to fig. 1 to 5. It is to be understood that some of the structures in the figures are shown hidden or transparently in order to facilitate the implementation of the structures of the parts of the embodiments of the present invention.
Please refer to fig. 1, fig. 2a to fig. 2d, and fig. 3a to fig. 3 e. A first aspect of the present invention provides a circuit substrate 10, where the circuit substrate 10 is used for controlling a display panel to display, and can drive a light emitting device of the display panel. The light emitting device may be a device capable of emitting light by electric driving, such as a micro light emitting diode. The circuit substrate 10 of the present embodiment has a first area, and the first area of the circuit substrate 10 corresponds to a display area of a display panel controlled by the first area.
The circuit board 10 of the present embodiment includes at least a driving lead layer 12 and an electrode layer 13 stacked on each other. Wherein the driving lead layer 12 and the electrode layer 13 are disposed to be insulated from each other.
In this embodiment, the driving lead layer 12 includes a plurality of driving leads 121, and each of the driving leads 121 can be electrically connected to an external driving chip.
The electrode layer 13 includes a row electrode lead 131, a column electrode lead 132, and a first electrode 133 and a second electrode 134 disposed in pairs for binding the external device 20. An external driving chip can transmit an electrical signal to the row electrode lead 131 and the column electrode lead 132 through the driving wire 121 to control the external device 20 bound to the pair of the first electrode 133 and the second electrode 134 to emit light.
In this embodiment, the projection of the electrode layer 13 on the surface of the circuit substrate 10 can cover the projection of the plurality of driving leads 121 on the surface of the circuit substrate 10, the driving leads 121 are located in the first area of the circuit substrate 10, that is, the circuit substrate 10 is used for a display panel, and the driving leads 121 are correspondingly located in the display area of the display panel. The driving lead 121 is disposed below the electrode layer 13, and can be electrically connected to an external driving chip through the driving lead 121 below the electrode layer 13, and the external device 20 can be bound above the electrode layer 13.
In the circuit board 10 according to the embodiment of the present invention, the driving lead layer 12 and the electrode layer 13 are sequentially stacked, so that the driving lead 121 is disposed on the back side of the electrode layer 13 on which the external device 20 can be bonded, and an external driving chip can be bonded on the back side to control the external device 20 bonded by the electrode layer 13 through the driving lead 121. In this embodiment, each driving lead 121 is located right below the electrode layer 13, each driving lead 121 is located in a first region of the circuit substrate 10 corresponding to a display region of the display panel to be controlled, and an external driving chip can be bound to the back surface of the electrode layer 13, so that the driving leads 121 and the external driving chip are prevented from occupying a frame space, and the frame size can be reduced.
It is understood that the first electrode 133 and the second electrode 134 are two electrodes for binding the external device 20, the first electrode 133 is one of an anode or a cathode, and the second electrode 134 is the other of the anode or the cathode. The row electrode leads 131 may extend in the row direction X, a plurality of the row electrode leads 131 may be spaced apart from each other in the column direction Y, the column electrode leads 132 may extend in the column direction Y, and a plurality of the column electrode leads 132 may be spaced apart from each other in the row direction X. A plurality of row electrode leads 131 are provided across a plurality of column electrode leads 132 to divide the circuit substrate 10 into a plurality of cells.
In this embodiment, the manner of binding the driving lead 121 with the external driving chip is not limited, as long as the external chip is electrically connected to the driving lead 121, and the external device 20 bound to the other side of the electrode layer is controlled by the driving lead 121.
In some alternative embodiments, the driving wires 121 are electrically connected with an external driving chip through the metal pins 111. The circuit substrate 10 of the present embodiment further includes a pin layer 11, wherein the pin layer 11 is disposed on a side of the driving lead layer 12 away from the electrode layer 13, and is insulated from the driving lead layer 12. The lead layer 11 includes a plurality of metal leads 111 for binding an external driving chip, and the plurality of metal leads 111 are electrically connected to corresponding driving leads 121, so that the driving leads 121 are electrically connected to the external chip through the metal leads 111. In this embodiment, the metal pins 111 are also disposed in the first region of the circuit substrate 10, that is, the circuit substrate 10 is used for a display panel, and the metal pins 111 are correspondingly disposed in a display region of the display panel.
In some alternative embodiments, the electrode layer 13 includes a first electrode layer 13a and a second electrode layer 13b disposed in insulation with each other, wherein the first electrode layer 13a is disposed close to the driving lead layer 12 with respect to the second electrode layer 13 b. The row electrode lead 131 includes a plurality of lead segments 131a and a plurality of bridge wires 131b, and the plurality of lead segments 131a are spaced apart and connected by the bridge wires 131 b. In this embodiment, the first electrodes 133 are electrically connected to the corresponding driving wires 121 through the row electrode wires 131, and the second electrodes 134 are electrically connected to the corresponding driving wires 121 through the column electrode wires 132. The first electrode 133, the second electrode 134, the lead segment 131a and the column electrode lead 132 are disposed on the same layer, and are all disposed on the first electrode layer 13a, the bridging line 131b is disposed on the second electrode layer 13b, and the bridging line 131b and the column electrode lead 132 are disposed in a cross-insulated manner.
In this embodiment, the first electrode 133 and the second electrode 134 are disposed on the same layer, so as to ensure that the heights of the two electrodes of the external device 20 are consistent when the external device 20 is bonded; the first electrode 133, the second electrode 134, the lead segment 131a of the row electrode lead 131, and the column electrode lead 132 are disposed on the same layer, so that an electrical connection structure between the first electrode 133 and the lead segment 131a and an electrical connection structure between the second electrode 134 and the column electrode lead 132 are formed through a patterning process in a manufacturing process, and the manufacturing process can be simplified. The bridging line 131b is provided so as to intersect the column electrode lead 132, and the bridging line 131b is provided in the second electrode layer 13b insulated from the first electrode layer 13a, whereby the row electrode lead 131 and the column electrode lead 132 are insulated from each other.
Further, the first electrode layer 13a further includes auxiliary leads 135 disposed on one side of the first electrode 133 and the second electrode 134, the auxiliary leads 135 are located in the first region of the circuit substrate 10, that is, the circuit substrate 10 is used for a display panel, the auxiliary leads 135 are correspondingly located in a display region of the display panel, one end of each auxiliary lead 135 is electrically connected to a corresponding driving lead 121, and the other end is electrically connected to a corresponding row electrode lead 131. Optionally, the auxiliary lead 135 is located at one side of the column electrode lead 132 and is disposed parallel to the column electrode lead 132.
In this embodiment, the auxiliary lead 135 may be electrically connected to the lead segment 131a of the row electrode lead 131, or may be electrically connected to the bridging line 131 b. In this embodiment, the auxiliary lead 135 is disposed on one side of the column electrode lead 132, the auxiliary lead 135 is disposed corresponding to the display region of the display panel, and two ends of the auxiliary lead 135 are electrically connected to the corresponding bridge wire 131b and the driving lead 121, respectively, so that the driving lead 121 is electrically connected to the row electrode lead 131 through the auxiliary lead 135. Since the auxiliary leads 135 are disposed at one side of the column electrode leads 132, it is no longer necessary to dispose all the auxiliary leads for connecting the row electrode leads 131 and the driving leads 121 in the frame region on the peripheral side of the display region, which results in a large occupied frame region of the frame region, and the frame can be reduced or even eliminated.
In some optional embodiments, the circuit substrate 10 may further include a pad layer 14, and the pad layer 14 is disposed on a side of the first electrode layer 13a facing away from the driving lead layer 12 and is insulated from the first electrode layer 13 a. The pad layer 14 includes a plurality of pads 141, the pads 141 are electrically connected to the corresponding first and second electrodes 133 and 134, and the external device 20 can be electrically connected to the first and second electrodes 133 and 134 through the pads 141.
In the above embodiments, the insulation between the adjacent metal layers may be achieved by providing an insulating layer between the layer structures of the respective adjacent metals. The invention is not limited with respect to the specific structure of the insulating layer. For example, the insulating layer may have a layered structure in which the entire layer is laid, or may have an island-like layered structure provided only between metal lines included in two adjacent metal layer structures. So long as the insulation between the metal lines included in the metal layer structures of the two adjacent layers can be realized. The following describes an embodiment of the present invention with reference to the drawings, taking a layer structure in which insulating layers are tiled as a whole and with reference to a process of forming a circuit substrate.
In some alternative embodiments, referring to fig. 2a, 2b, 3a, and 3b, fig. 2a is a perspective view of a pin layer of a circuit substrate according to an embodiment of the invention; FIG. 3a is a cross-sectional view A-A of FIG. 2 a; FIG. 2b is a perspective view of a lead layer and a driving lead layer of a circuit substrate according to an embodiment of the invention; fig. 3B is a cross-sectional view B-B of fig. 2B. A first insulating layer 15 is disposed between the driving lead layer 12 and the pin layer 11 to realize the mutually insulating arrangement of the driving lead layer 12 and the pin layer 11. The first insulating layer 15 has a plurality of first via holes, and the driving wires 121 are electrically connected to the corresponding metal pins 111 through the first via holes.
In some alternative embodiments, referring to fig. 2c, 2d, 3c and 3d, fig. 2c is a perspective view of a pin layer, a driving lead layer and a first electrode layer of a circuit substrate according to an embodiment of the invention; FIG. 3C is a cross-sectional view C-C of FIG. 2C; FIG. 2d is a perspective view of the lead layer, the driving lead layer, the first electrode layer and the second electrode layer of the circuit substrate according to the embodiment of the invention; fig. 3D is a cross-sectional view D-D of fig. 2D. A second insulating layer 16 is arranged between the drive lead layer 12 and the electrode layer 13 to achieve a mutually insulating arrangement of the drive lead layer 12 and the electrode layer 13. The second insulating layer 16 has a plurality of second via holes, and the row electrode lead 131 and the column electrode lead 132 of the electrode layer 13 are electrically connected to the corresponding driving leads 121 through the second via holes, respectively.
In further alternative embodiments, a third insulating layer 17 is arranged between the first electrode layer 13a and the second electrode layer 13b of the electrode layers 13, so as to achieve a mutually insulating arrangement of the first electrode layer 13a and the second electrode layer 13 b. The third insulating layer 17 has a plurality of third vias, and a first portion of the third vias among the plurality of third vias is disposed corresponding to the bridge line 131b, and a second portion of the third vias is disposed corresponding to the first electrode 133 and the second electrode 134. The bridging line 131b is electrically connected to the corresponding auxiliary lead 135 through the third via of the first portion, and the first electrode 133 and the second electrode 134 can be electrically connected to the external device 20 through the third via of the second portion, so as to drive the external device 20 to emit light.
In this embodiment, please refer to fig. 1 and fig. 3E, in which fig. 3E is a cross-sectional view taken along line E-E of fig. 1. The pad layer 14 is disposed on the third insulating layer 17, the pad layer 14 includes a plurality of pads 141, the pads 141 are correspondingly disposed at the third via holes of the second portion, and the external device 20 may be bound to the pair of the first and second electrodes 133 and 134 through the pads 141.
In this embodiment, the third through hole of the third insulating layer 17 may be formed by two patterning processes, wherein after the third insulating layer 17 is formed on the first electrode layer 13a, a first portion of the third through hole is formed by the first patterning process, and then the second electrode layer 13b is formed on the third insulating layer 17 by patterning, so that the bridge line 131b included in the second electrode layer 13b is electrically connected to the corresponding auxiliary lead 135 in the first electrode layer 13a through the first portion of the third through hole; then, a second portion of a third via hole is formed on the third insulating layer 17 by a second patterning process, and a pad 141 is formed at the second portion of the third via hole by a lift-off process for bonding the external device 20.
In the embodiment, the insulating layers are arranged in the two adjacent conducting layers for insulation, and the through holes are arranged in the insulating layers to realize the connection of the corresponding wires in different conducting layers, so that the process is simple and easy to realize.
In some alternative embodiments, the circuit substrate 10 may have two regions distributed in sequence in the row direction, and the two regions are symmetrically distributed in the row direction, that is, the regions on the left and right sides of symmetry in fig. 1. The plurality of metal pins 111 in the pin layer 11 are arranged at intervals in the same row direction X, and are symmetrically disposed in the two regions, that is, the plurality of metal pins 111 are distributed in the two regions and symmetrically disposed in the row direction X. The plurality of column electrode leads 132 in the electrode layer 13 are uniformly distributed corresponding to the two regions. In the present embodiment, one auxiliary lead 135 extending in the column direction Y is provided at one side of each column electrode lead 132. Each column electrode lead 132 in each region is electrically connected to the corresponding metal pin 111 through the corresponding driving lead 121, and the auxiliary lead 135 is electrically connected to the corresponding metal pin 111 through the corresponding driving lead 121. Each auxiliary lead 135 in one of the two regions is electrically connected to the row electrode lead 131 of the odd-numbered row corresponding thereto, and each auxiliary lead 135 in the other region is electrically connected to the row electrode lead 131 of the even-numbered row corresponding thereto.
In this embodiment, the metal pins 111 are symmetrically distributed, and the auxiliary leads 135 in the two regions are correspondingly connected to the row electrode leads 131 in the odd-numbered rows and the row electrode leads 131 in the even-numbered rows, respectively, so that the wires can be dispersed, and the impedance of the entire circuit board 10 is more uniform.
In some alternative embodiments, each of the cells into which the plurality of row electrode leads 131 and the plurality of column electrode leads 132 are divided includes more than two pairs of the first electrodes 133 and the second electrodes 134. In more than two pairs of electrodes, the first electrode 133 and the second electrode 134, one pair of which is bound with the external device 20, and the rest first electrode 133 and the rest second electrode 134 are used as spare electrodes, when the first electrode 133 and/or the second electrode 134 bound with the external device 20 are damaged, the external device 20 can be bound on the other spare electrode pairs.
In any of the above embodiments, the circuit substrate 10 may further include a substrate (not shown) on the side of the driving lead layer 12 facing away from the electrode layer, the substrate being used to provide support for the various layer structures thereon to maintain the shape of the entire circuit substrate 10. Specifically, the substrate may be stacked on the lead layer 11, and located on a side of the lead layer 11 away from the driving lead layer.
A second aspect of the present invention provides an embodiment of a display panel, which is shown in fig. 4 and 5, and fig. 4 is a schematic structural diagram of a display panel according to an embodiment of the present invention; fig. 5 is a sectional view F-F of fig. 4. The display panel of the present embodiment includes the circuit substrate 10 and the external device 20 of any one of the embodiments of the first aspect, wherein the external device 20 is bound to the first electrode 133 and the second electrode 134 which are provided in pair. The plurality of driving wires 121 in the driving wire layer 12 of the circuit substrate 10 can be electrically connected to an external driving chip, and control and drive the external device 20 to emit light for display.
It is to be understood that the display panel according to the embodiment of the present invention may be a display panel including a substrate, or may be a display panel not including a substrate. In the embodiment of the display panel including the substrate, the substrate of the circuit substrate 10 may also be peeled off to form a display panel without the substrate, and an external chip may be bonded to the back surface of the circuit substrate.
In this embodiment, the present invention is not limited to the method of peeling off the substrate of the circuit board 10. For example, a sacrificial layer may be formed between the substrate and the lead layer 11, and the sacrificial layer may be etched away by a laser to achieve lift-off of the substrate.
Since the display panel according to the embodiment of the invention includes the circuit substrate 10 according to the above embodiment, the beneficial effects of the circuit substrate 10 according to the above embodiment are not repeated herein.
A third aspect of the present invention provides an embodiment of a display device, and the display device of the present embodiment includes the display panel of the above-described embodiment.
In some selected embodiments, the display device of the embodiments of the present invention may include one display panel of the above-described embodiments. The display device of the present embodiment includes the display panel of the above embodiment, and therefore, the beneficial effects of the display panel of the above embodiment are not described herein again.
In other alternative embodiments, the display panel according to the embodiment of the present invention may further include a plurality of display panels according to the above embodiments, and the plurality of display panels are spliced to form a large-sized display device. Because the display panel of the embodiment has a narrow frame or no frame, the splicing gap at the splicing position is small, and the display effect at the splicing position cannot be influenced.
In accordance with the above-described embodiments of the present invention, these embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. The invention is limited only by the claims and their full scope and equivalents.
Claims (11)
1. A circuit substrate, wherein the circuit substrate is used for controlling a display panel to display, the circuit substrate has a first area, and the first area corresponds to a display area of the display panel to be controlled, and the circuit substrate comprises:
the driving lead layer comprises a plurality of driving leads which can be electrically connected with an external driving chip;
the electrode layer is arranged on the driving lead layer in a laminated mode and is insulated from the driving lead layer, and the electrode layer comprises row electrode leads, column electrode leads, a first electrode and a second electrode, wherein the first electrode and the second electrode are arranged in pairs and used for binding an external device;
wherein the drive leads of the drive lead layer are located in the first region;
the electrode layers comprise a first electrode layer and a second electrode layer which are arranged in an insulated mode, and the first electrode layer is arranged close to the driving lead layer relative to the second electrode layer;
the first electrode layer comprises an auxiliary lead arranged on one side of the first electrode and one side of the second electrode;
the circuit substrate comprises a pin layer, the pin layer is arranged on one side, away from the electrode layer, of the driving lead layer and is insulated from the driving lead layer, the pin layer comprises a plurality of metal pins used for binding an external driving chip, and the metal pins are electrically connected with the corresponding driving leads;
the circuit substrate is provided with two symmetrically distributed areas in the row direction; a plurality of metal pins in the pin layer are arranged at intervals in the same row direction and are symmetrically arranged in the two regions;
the plurality of column electrode leads in the electrode layer are arranged at intervals in the row direction and are uniformly distributed corresponding to the two regions, the plurality of row electrode leads are arranged at intervals in the column direction, and one auxiliary lead extending in the column direction is arranged corresponding to each column electrode lead;
each column electrode lead in each region is electrically connected with the corresponding metal pin in the same region through the corresponding driving lead;
each of the auxiliary leads in one of the two regions is electrically connected to the row electrode leads of its own corresponding odd-numbered row, and each of the auxiliary leads in the other region is electrically connected to the row electrode leads of its own corresponding even-numbered row.
2. The circuit substrate of claim 1,
the row electrode lead comprises a plurality of lead sections and a plurality of bridging lines, and the lead sections are distributed at intervals and connected through the bridging lines;
the first electrode is electrically connected with the corresponding driving lead through the row electrode lead, the second electrode is electrically connected with the corresponding driving lead through the column electrode lead, the first electrode, the second electrode, the lead segment and the column electrode lead are arranged on the same layer and are positioned on the first electrode layer, and the bridging line is positioned on the second electrode layer.
3. The circuit substrate according to claim 2, wherein the auxiliary leads are located in the first region, and one end of each of the auxiliary leads is electrically connected to the corresponding driving lead, and the other end of each of the auxiliary leads is electrically connected to the corresponding row electrode lead.
4. A circuit substrate according to claim 3, wherein the auxiliary leads are located at one side of the column electrode leads and are arranged in parallel with the column electrode leads.
5. The circuit substrate according to claim 2, wherein a first insulating layer is disposed between the driving lead layer and the pin layer, the first insulating layer having a plurality of first vias, the driving leads being electrically connected to the corresponding metal pins through the first vias; and/or
A second insulating layer is arranged between the driving lead layer and the electrode layer, the second insulating layer is provided with a plurality of second through holes, and the row electrode lead and the column electrode lead are electrically connected with the corresponding driving leads through the second through holes respectively; and/or
The first electrode layer and the second electrode layer are provided with a third insulating layer therebetween, the third insulating layer is provided with a plurality of third via holes, a plurality of first part of the third via holes correspond to the bridging line, the second part of the third via holes correspond to the first electrode and the second electrode, the bridging line is electrically connected with the corresponding auxiliary lead through the first part of the third via holes, and the first electrode and the second electrode can be electrically connected with an external device through the second part of the third via holes.
6. The circuit substrate according to claim 1, wherein the drive leads are symmetrically arranged in a row direction.
7. The circuit substrate according to claim 3, further comprising a pad layer disposed on a side of the first electrode layer facing away from the driving lead layer and insulated from the first electrode layer, wherein the pad layer comprises a plurality of pads electrically connected to the corresponding first and second electrodes, and the external device is electrically connected to the first and second electrodes through the pads.
8. The circuit substrate of claim 1, further comprising a substrate on a side of the drive lead layer facing away from the electrode layer.
9. A display panel, comprising:
a circuit substrate according to any one of claims 1 to 8;
and an external device bonded to the first electrode and the second electrode which are arranged in pair.
10. The display panel according to claim 9, wherein the external device is a micro light emitting diode.
11. A display device characterized by comprising the display panel described in claim 9 or 10.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910506754.7A CN112185267B (en) | 2019-06-12 | 2019-06-12 | Circuit substrate, display panel and display device |
| PCT/CN2020/075569 WO2020248616A1 (en) | 2019-06-12 | 2020-02-17 | Circuit substrate, display panel and display apparatus |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201910506754.7A CN112185267B (en) | 2019-06-12 | 2019-06-12 | Circuit substrate, display panel and display device |
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| CN112185267A CN112185267A (en) | 2021-01-05 |
| CN112185267B true CN112185267B (en) | 2022-03-29 |
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| US20230165080A1 (en) * | 2021-01-29 | 2023-05-25 | Boe Technology Group Co., Ltd. | Display substrate and display device |
| CN113130463B (en) * | 2021-04-16 | 2022-12-02 | 京东方科技集团股份有限公司 | Light-emitting substrate, preparation method thereof and display device |
| CN117413309A (en) * | 2022-04-20 | 2024-01-16 | 京东方科技集团股份有限公司 | Display panel and display device |
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| CN112185267A (en) | 2021-01-05 |
| WO2020248616A1 (en) | 2020-12-17 |
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