WO2020248616A1

WO2020248616A1 - Circuit substrate, display panel and display apparatus

Info

Publication number: WO2020248616A1
Application number: PCT/CN2020/075569
Authority: WO
Inventors: 邢汝博; 张志豪
Original assignee: 云谷（固安）科技有限公司
Priority date: 2019-06-12
Filing date: 2020-02-17
Publication date: 2020-12-17
Also published as: CN112185267A; CN112185267B

Abstract

A circuit substrate (10), a display panel and a display apparatus. The circuit substrate (10) is used for controlling the display panel for display, and has a first region which corresponds to a display region of the display panel to be controlled. The circuit substrate (10) comprises a drive lead layer (12) and an electrode layer (13) that are provided in an insulation mode. The drive lead layer (12) comprises a plurality of drive leads (121) which can be in point connection to an external drive chip. The electrode layer (13) comprises an electrode lead (131), a column electrode lead (132), and a first electrode (133) and a second electrode (134) provided in pairs to bind an external device (20). The drive leads (121) of the drive lead layer (12) are located in the first region. According to the circuit substrate (10), the drive leads (121) are provided at the back side of the electrode layer (13) that can bind the external device (20), and the external drive chip can be bound at the back side of the electrode layer (13), so as to avoid the drive chip occupying the space of bezel, thereby reducing the size of the bezel.

Description

Circuit substrate, display panel and display device

Cross references to related applications

This application claims the priority of the Chinese Patent Application No. 201910506754.7 entitled "Circuit Substrate, Display Panel and Display Device" filed on June 12, 2019, the entire content of which is incorporated herein by reference.

Technical field

This application belongs to the field of display technology, and in particular relates to a circuit substrate, a display panel and a display device.

Background technique

Micro LED technology refers to the technology of integrating high-density and small-size LED arrays on a substrate. Since Micro LED displays are self-luminous displays, they have better material stability and longer lifespan than OLEDs. Advantages and great potential for application.

Generally, in order to realize large-size and super-size displays, multiple Micro LED display panels need to be spliced together. However, due to the frame of the Micro LED display panels, the picture display effect at the splicing site is not good.

Therefore, how to reduce the frame of the Micro LED display panel becomes an urgent problem to be solved.

Summary of the invention

The present application provides a circuit substrate, a display panel, and a display device, aiming to reduce the frame of the display panel.

In a first aspect, the present application provides a circuit substrate for controlling a display panel to display. The circuit substrate has a first area corresponding to the display area of the display panel to be controlled. The circuit substrate includes: a driving lead layer, including Multiple drive leads, the drive leads are used to receive drive signals; the electrode layer is stacked on the drive lead layer and is insulated from the drive lead layer. The electrode layer includes row electrode leads, column electrode leads and paired first electrodes And the second electrode, the first electrode is electrically connected to the corresponding driving lead through the row electrode lead, and the second electrode is electrically connected to the corresponding driving lead through the column electrode lead, wherein the driving lead of the driving lead layer is located in the first area.

In a second aspect, the present application provides a display panel including the circuit substrate of any one of the above embodiments; an external device is bound to the first electrode and the second electrode arranged in a pair.

According to the implementation of the first aspect of the present application, the external device is a micro light emitting diode.

In a third aspect, the present application provides a display device including the display panel of the foregoing embodiment.

According to an embodiment of the third aspect of the present application, the display device includes a plurality of display panels, and the display panels are arranged in splicing with each other.

In the circuit substrate provided by the first aspect of the present application, a driving lead layer and an electrode layer are stacked in sequence, and one side of the electrode layer is provided with a driving lead, and the other side of the electrode layer can be bound with external devices. An external drive chip is bound on the side of the electrode layer where the drive leads are arranged, so that the external drive chip controls the external devices bound by the electrode layer through the drive leads. In the circuit substrate provided by the first aspect of the present application, each drive lead is located in the first area of the circuit substrate corresponding to the display area of the display panel to be controlled, and is located directly under the electrode layer, and the drive chip can be bound to the electrode layer The side where the driving leads are arranged can prevent the driving leads and the driving chip from occupying frame space, and can reduce the frame size.

Description of the drawings

The features, advantages, and technical effects of the exemplary embodiments of the present application will be described below with reference to the accompanying drawings, which are not drawn according to actual scale.

Fig. 1 is a schematic structural diagram of a circuit substrate provided by an embodiment of the present application;

Fig. 2a is a perspective view of a pin layer of a circuit substrate provided by an embodiment of the present application;

2b is a perspective view of a pin layer and a driving lead layer of a circuit substrate provided by an embodiment of the present application;

2c is a perspective view of a pin layer, a driving lead layer, and a first electrode layer of a circuit substrate provided by an embodiment of the present application;

2d is a perspective view of a pin layer, a driving lead layer, a first electrode layer, and a second electrode layer of a circuit substrate provided by an embodiment of the present application;

Fig. 3a is a cross-sectional view of A-A in Fig. 2a;

Figure 3b is a B-B cross-sectional view of Figure 2b;

Figure 3c is a C-C cross-sectional view of Figure 2c;

Figure 3d is a D-D cross-sectional view of Figure 2d;

Figure 3e is an E-E cross-sectional view of Figure 1;

FIG. 4 is a schematic structural diagram of a display panel provided by an embodiment of the present application;

Fig. 5 is a cross-sectional view taken along F-F in Fig. 4.

Detailed ways

The circuit substrate, the display panel mother board and the display panel provided by the present application will be described in detail below with reference to FIGS. 1 to 5. In order to easily reflect the structure of each part of the embodiment of the present application, some structures in the figure are hidden or drawn transparently.

Please refer to Figure 1, Figure 2a to Figure 2d and Figure 3a to Figure 3e. The first aspect of the present application provides a circuit substrate 10, which is used to control a display panel for display, and can drive a light emitting device of the display panel. The light emitting device may be a device capable of emitting light by electric driving, such as a micro light emitting diode. The circuit substrate 10 of this embodiment has a first area, and the first area of the circuit substrate 10 corresponds to the display area of the display panel it controls.

The circuit board 10 of this embodiment at least includes a driving lead layer 12 and an electrode layer 13 stacked on each other. The driving lead layer 12 and the electrode layer 13 are insulated from each other.

In this embodiment, the driving lead layer 12 includes a plurality of driving leads 121, and each driving lead 121 is used to receive a driving signal. For example, the driving lead 121 can be electrically connected to an external driving chip to receive a driving signal of the external driving chip.

The electrode layer 13 includes a row electrode lead 131, a column electrode lead 132, and a first electrode 133 and a second electrode 134 provided in pairs. The first electrode 133 and the second electrode 134 can bind the external device 20. The external drive chip can transmit electrical signals to the row electrode lead 131 and the column electrode lead 132 through the drive lead 121 to control the external device 20 bound on the pair of first electrode 133 and the second electrode 134 to emit light.

In this embodiment, the projection of the electrode layer 13 on the surface of the circuit substrate 10 can cover the projection of a plurality of driving leads 121 on the surface of the circuit substrate 10. The driving leads 121 are located in the first area of the circuit substrate 10, that is, on the circuit substrate 10. For a display panel, the driving lead 121 corresponds to the display area of the display panel. The driving leads 121 are arranged below the electrode layer 13 and can be electrically connected to an external driving chip through the driving leads 121 below the electrode layer 13, and the external device 20 can be bound above the electrode layer 13.

In the circuit substrate 10 of the embodiment of the present application, the driving lead layer 12 and the electrode layer 13 are stacked in sequence, and the driving lead 121 is provided on one side of the electrode layer 13 and the external device 20 can be bound on the other side. An external chip is bound on the side of the electrode layer 13 where the driving lead 121 is arranged, so that the external driving chip controls the external device 20 bound to the electrode layer 13 through the driving lead 121. In this embodiment, each drive lead 121 is located in the first area of the circuit substrate 10 corresponding to the display area of the display panel to be controlled, and is located directly under the electrode layer 13. The drive chip can be bound to the electrode layer 13 provided with One side of the driving lead 121 can prevent the driving lead 121 and the external driving chip from occupying the frame space, and the frame size can be reduced.

The first electrode 133 and the second electrode 134 are two electrodes for binding the external device 20, the first electrode 133 is one of an anode or a cathode, and the second electrode 134 is the other of an anode or a cathode. The row electrode leads 131 may extend along the row direction X, and a plurality of row electrode leads 131 are arranged at intervals in the column direction Y. The column electrode leads 132 may extend along the column direction Y, and a plurality of column electrode leads 132 are arranged at intervals in the row direction X. The plurality of row electrode leads 131 and the plurality of column electrode leads 132 are arranged to cross each other to divide the circuit substrate 10 into a plurality of units.

In this embodiment, there is no limitation on the manner in which the driving leads 121 are bound to the external driving chip, as long as the external chip can be electrically connected to the driving leads 121, and the driving leads 121 control the external devices bound on the other side of the electrode layer. 20 is fine.

In some optional embodiments, the driving lead 121 is electrically connected to the external driving chip through the metal pin 111. The circuit substrate 10 of this embodiment further includes a pin layer 11, and the pin layer 11 is disposed on a side of the driving lead layer 12 away from the electrode layer 13 and insulated from the driving lead layer 12. The pin layer 11 includes a plurality of metal pins 111 for binding an external driver chip, and the plurality of metal pins 111 are electrically connected to the corresponding driving leads 121, so as to realize the connection between the driving leads 121 and the external chip through the metal pins 111. Electric connection. In this embodiment, the metal pins 111 are also provided in the first area of the circuit substrate 10, that is, the circuit substrate 10 is used for a display panel, and the metal pins 111 are correspondingly located in the display area of the display panel.

In some optional embodiments, the electrode layer 13 includes a first electrode layer 13a and a second electrode layer 13b that are insulated from each other, wherein the first electrode layer 13a is disposed close to the driving lead layer 12 relative to the second electrode layer 13b. The row electrode lead 131 includes a plurality of lead sections 131a and a plurality of bridge wires 131b, and the plurality of lead sections 131a are spaced apart and connected by the bridge wires 131b. In this embodiment, the first electrode 133 is electrically connected to the corresponding driving lead 121 through the row electrode lead 131, and the second electrode 134 is electrically connected to the corresponding driving lead 121 through the column electrode lead 132. The first electrode 133, the second electrode 134, the lead segment 131a and the column electrode lead 132 are arranged in the same layer, and they are all located on the first electrode layer 13a, the bridge wire 131b is located on the second electrode layer 13b, and the bridge wire 131b and the column electrode lead 132 Cross insulation setting.

In this embodiment, arranging the first electrode 133 and the second electrode 134 on the same layer is convenient to ensure that the heights of the two electrodes of the external device 20 are the same when the external device 20 is bound. The first electrode 133 and the second electrode 134 are arranged in the same layer as the lead section 131a of the row electrode lead 131 and the column electrode lead 132, which is convenient for forming the first electrode 133 and the lead section 131a through a patterning process in the preparation process. The connection structure and the structure in which the second electrode 134 and the column electrode lead 132 are electrically connected can simplify the manufacturing process. In addition, the bridge wire 131b and the column electrode lead 132 are arranged to cross each other. By disposing the bridge wire 131b in the second electrode layer 13b insulated from the first electrode layer 13a, the row electrode lead 131 and the column electrode lead 132 are insulated from each other. Set up.

Further, in some optional embodiments, the first electrode layer 13a further includes an auxiliary lead 135 disposed on one side of the first electrode 133 and the second electrode 134, and the auxiliary lead 135 is located in the first area of the circuit substrate 10. That is, when the circuit substrate 10 is used in a display panel, the auxiliary leads 135 are correspondingly located in the display area of the display panel. One end of each auxiliary lead 135 is electrically connected to the corresponding driving lead 121 and the other end is electrically connected to the corresponding row electrode lead 131. Optionally, the auxiliary lead 135 is located on one side of the column electrode lead 132 and is arranged in parallel with the column electrode lead 132.

In this embodiment, the auxiliary lead 135 may be electrically connected to the lead section 131a of the row electrode lead 131, or may be electrically connected to the bridge wire 131b. In this embodiment, by providing an auxiliary lead 135 on one side of the column electrode lead 132, the auxiliary lead 135 is arranged corresponding to the display area of the display panel, and both ends of the auxiliary lead 135 are electrically connected to the corresponding bridge line 131b and the driving lead 121, respectively. The electrical connection between the driving lead 121 and the row electrode lead 131 through the auxiliary lead 135 is realized. Since the auxiliary leads 135 are arranged on one side of the column electrode leads 132, all auxiliary leads for connecting the row electrode leads 131 and the driving leads 121 are no longer arranged in the frame area on the peripheral side of the display area, resulting in a larger frame area of the frame area. For big problems, the frame can be reduced or even eliminated.

In some optional embodiments, the circuit substrate 10 may further include a pad layer 14 which is disposed on a side of the first electrode layer 13a away from the driving lead layer 12 and insulated from the first electrode layer 13a. The pad layer 14 includes a plurality of pads 141, and the pad 141 is electrically connected to the corresponding first electrode 133 and the second electrode 134, and the external device 20 can be electrically connected to the first electrode 133 and the second electrode 134 through the pad 141.

In the foregoing embodiments, insulation between adjacent metal layers can be achieved by providing an insulating layer between adjacent metal layer structures. The application does not limit the specific structure of the insulating layer. For example, the insulating layer may be a layer structure that is tiled across the entire layer, or may be an island-shaped layer structure only provided between the metal lines included in two adjacent metal layer structures. As long as the insulation between the metal wires included in the metal layer structure of two adjacent layers can be achieved. Hereinafter, the embodiments of the present application will be described with reference to the accompanying drawings, taking as an example a layer structure in which the insulating layer is a whole layer, and combining with the formation process of the circuit substrate.

In some alternative embodiments, referring to FIGS. 2a, 2b, 3a and 3b, FIG. 2a is a perspective view of a pin layer of a circuit substrate provided by an embodiment of the application; FIG. 3a is the AA cross section of FIG. 2a Figure 2b is a perspective view of a pin layer and a driving lead layer of a circuit substrate provided by an embodiment of the application; Figure 3b is a BB cross-sectional view of Figure 2b. A first insulating layer 15 is arranged between the driving lead layer 12 and the pin layer 11 to realize mutual insulation arrangement of the driving lead layer 12 and the pin layer 11. The first insulating layer 15 has a plurality of first via holes, and the driving leads 121 are electrically connected to the corresponding metal pins 111 through the first via holes.

In some optional embodiments, referring to FIGS. 2c, 2d, 3c, and 3d, FIG. 2c is a perspective view of a pin layer, a driving lead layer, and a first electrode layer of a circuit substrate provided by an embodiment of the application. Fig. 3c is a CC cross-sectional view of Fig. 2c; Fig. 2d is a perspective view of a pin layer, a driving lead layer, a first electrode layer, and a second electrode layer of a circuit substrate provided by an embodiment of the application; Fig. 3d is a diagram 2d DD section view. A second insulating layer 16 is provided between the driving lead layer 12 and the electrode layer 13 to realize the mutual insulation arrangement of the driving lead layer 12 and the electrode layer 13. The second insulating layer 16 has a plurality of second via holes, and the row electrode leads 131 and the column electrode leads 132 of the electrode layer 13 are electrically connected to the corresponding driving leads 121 through the second via holes, respectively.

In other optional embodiments, a third insulating layer 17 is provided between the first electrode layer 13a and the second electrode layer 13b of the electrode layer 13, so as to realize the mutual connection between the first electrode layer 13a and the second electrode layer 13b. Insulation settings. The third insulating layer 17 has a plurality of third vias. Among the plurality of third vias, the first part of the third via corresponds to the bridge line 131b, and the second part of the third via corresponds to the first electrode 133 and the second The electrode 134 is set. The bridge line 131b is electrically connected to the corresponding auxiliary lead 135 through the third via hole in the first part, and the first electrode 133 and the second electrode 134 can be electrically connected to the external device 20 through the third via hole in the second part to drive the external The device 20 emits light.

In this embodiment, please refer to FIG. 1 and FIG. 3e. FIG. 3e is an E-E cross-sectional view of FIG. The pad layer 14 is disposed on the third insulating layer 17. The pad layer 14 includes a plurality of pads 141, and the pads 141 are correspondingly disposed at the third via holes of the second part, and the external device 20 can be connected through the pads 141. It is bound to the pair of first electrode 133 and second electrode 134.

In this embodiment, the third through hole of the third insulating layer 17 may be formed by two patterning processes. After the third insulating layer 17 is formed on the first electrode layer 13a, the first part of the third through hole is formed through the first patterning process. The second electrode layer 13b is patterned on the third insulating layer 17 so that the bridge wire 131b included in the second electrode layer 13b passes through the third through hole in the first part and the corresponding auxiliary lead in the first electrode layer 13a. 135 electrical connection. After that, a second part of the third through hole is formed on the third insulating layer 17 through a second patterning process, and then a pad 141 is formed at the second part of the third through hole through a lift-off process. Used to bind external devices 20.

In the above-mentioned embodiment, insulating layers are provided in two adjacent conductive layers for insulation, and vias are provided in the insulating layers to realize the connection of corresponding wires in different conductive layers, the process is simple and easy to implement.

In some optional embodiments, the circuit substrate 10 may have two regions sequentially distributed in the row direction, and the two regions are symmetrically distributed in the row direction X, that is, the symmetrical left and right sides in FIG. 1. The multiple metal pins 111 in the pin layer 11 are arranged at intervals in the same row direction X, and are symmetrically arranged in two regions. That is, a plurality of metal pins 111 are distributed in two areas and arranged symmetrically in the row direction X. The multiple column electrode leads 132 in the electrode layer 13 are evenly distributed corresponding to two regions. In this embodiment, an auxiliary lead 135 extending along the column direction Y is provided on one side of each column electrode lead 132. Each column electrode lead 132 in each area is electrically connected to the corresponding metal pin 111 through the corresponding drive lead 121, and the auxiliary lead 135 is electrically connected to the corresponding metal pin 111 through the corresponding drive lead 121. Each auxiliary lead 135 in one of the two areas is electrically connected to the row electrode lead 131 of the odd-numbered row corresponding to itself, and each auxiliary lead 135 in the other area is electrically connected to the row electrode lead of the even-numbered row corresponding to itself 131.

In this embodiment, through the symmetrical distribution of a plurality of metal pins 111, and the auxiliary leads 135 in the two regions are respectively connected to the row electrode leads 131 in odd rows and the row electrode leads 131 in even rows, the wires can be dispersed. , So that the impedance of the entire circuit substrate 10 is more uniform.

In some optional embodiments, in the plurality of cells divided by the plurality of row electrode leads 131 and the plurality of column electrode leads 132, each cell includes two or more pairs of the first electrode 133 and the second electrode 134. Among the two or more pairs of electrodes, the first electrode 133 and the second electrode 134, one pair is bound to the external device 20, and the rest of the first electrode 133 and the second electrode 134 are used as spares. And/or when the second electrode 134 is damaged, the external device 20 can be bound to other spare electrode pairs.

In any of the above embodiments, the circuit substrate 10 may further include a substrate (not shown in the figure), the substrate is located on the side of the driving lead layer 12 away from the electrode layer, and the substrate is used to provide various layer structures on it. Support is provided to maintain the shape of the entire circuit substrate 10. Specifically, the substrate may be stacked with the pin layer 11 and located on the side of the pin layer 11 away from the driving lead layer.

The second aspect of the present application provides an embodiment of a display panel. Referring to FIGS. 4 and 5, FIG. 4 is a schematic structural diagram of a display panel provided by an embodiment of the present application; FIG. 5 is the FF cross section of FIG. Figure. The display panel of this embodiment includes an external device 20 and the circuit substrate 10 of any embodiment of the first aspect. The external device 20 is bound to the first electrode 133 and the second electrode 134 arranged in a pair. The plurality of drive leads 121 in the drive lead layer 12 of the circuit substrate 10 can be electrically connected to an external drive chip, and control and drive the external device 20 to emit light for display.

The display panel of the embodiment of the present application may be a display panel including a substrate or a display panel that does not include a substrate. In the embodiment of the display panel including the substrate, the substrate of the circuit substrate 10 can also be peeled off to form a display panel without the substrate, and external chips are bound on the back of the circuit substrate 10.

In this embodiment, the method for peeling off the substrate of the circuit substrate 10 is not limited in this application. For example, a sacrificial layer may be formed between the substrate and the pin layer 11, and the sacrificial layer may be etched away by laser to realize the peeling of the substrate.

Since the display panel of the embodiment of the present application includes the circuit substrate 10 of the above-mentioned embodiment, it has the beneficial effects of the circuit substrate 10 of the above-mentioned embodiment, which will not be repeated here.

The third aspect of the present application provides an embodiment of a display device, and the display device of this embodiment includes the display panel of the foregoing embodiment.

In some selected embodiments, the display device of the embodiment of the present application may include one display panel of the above-mentioned embodiment. The display device of this embodiment includes the display panel of the foregoing embodiment, and therefore has the beneficial effects of the display panel of the foregoing embodiment, which will not be repeated here.

In other optional embodiments, the display device of the embodiment of the present application may further include multiple display panels of the above-mentioned embodiments, and the multiple display panels are spliced to form a large-size display device. Since the display panel of the above embodiment has a narrow frame or no frame, the splicing gap at the splicing place is small, and the display effect at the splicing place is not affected.

Although the present application has been described with reference to the preferred embodiments, various modifications can be made to it without departing from the scope of the present application and the components therein can be replaced with equivalents. In particular, as long as there is no structural conflict, the various technical features mentioned in the various embodiments can be combined in any manner. This application is not limited to the specific embodiments disclosed in the text, but includes all technical solutions falling within the scope of the claims.

Claims

A circuit substrate is used to control a display panel to display, the circuit substrate has a first area corresponding to the display area of the display panel to be controlled, and the circuit substrate includes:

The driving lead layer includes a plurality of driving leads, and the driving leads are used to receive driving signals;

The electrode layer is stacked on the drive lead layer and insulated from the drive lead layer. The electrode layer includes row electrode leads, column electrode leads, and a pair of first and second electrodes,

Wherein, the driving leads of the driving lead layer are located in the first area.
The circuit substrate according to claim 1, wherein the electrode layer includes a first electrode layer and a second electrode layer that are insulated from each other, and the first electrode layer is close to the driving lead relative to the second electrode layer. Layer setting

The row electrode lead includes a plurality of lead segments and a plurality of bridge lines, and the plurality of lead segments are spaced apart and connected by the bridge line;

Wherein, the first electrode is electrically connected to the corresponding drive lead through the row electrode lead, the second electrode is electrically connected to the corresponding drive lead through the column electrode lead, and the first electrode, The second electrode, the lead segment and the column electrode lead are arranged in the same layer and are located on the first electrode layer, and the bridge wire is located on the second electrode layer.
3. The circuit substrate according to claim 2, wherein the first electrode layer further comprises an auxiliary lead provided on one side of the first electrode and the second electrode, and the auxiliary lead is located in the first region, One end of each auxiliary lead is electrically connected to the corresponding driving lead, and the other end is electrically connected to the corresponding row electrode lead.
3. The circuit substrate according to claim 3, wherein the auxiliary lead is located on one side of the column electrode lead and is arranged in parallel with the column electrode lead.
The circuit substrate according to claim 3, wherein the circuit substrate further comprises a pin layer, the pin layer is disposed on a side of the drive lead layer away from the electrode layer, and is connected to the drive lead layer Insulation arrangement, the pin layer includes a plurality of metal pins for binding the external driving chip, and the plurality of metal pins are electrically connected with the corresponding driving leads.
The circuit substrate of claim 5, wherein a first insulating layer is provided between the driving lead layer and the pin layer, the first insulating layer has a plurality of first vias, and the driving lead It is electrically connected to the corresponding metal pin through the first via hole.
The circuit substrate according to claim 5, wherein a second insulating layer is provided between the driving lead layer and the electrode layer, the second insulating layer has a plurality of second via holes, and the row electrode lead The column electrode leads are electrically connected to the corresponding driving leads through the second via holes, respectively.
The circuit substrate according to claim 5, wherein a third insulating layer is provided between the first electrode layer and the second electrode layer, the third insulating layer has a plurality of third via holes, and a plurality of In the third via hole, the first part of the third via hole is arranged corresponding to the bridge line, and the second part of the third via hole is arranged corresponding to the first electrode and the second electrode, and the The bridge wire is electrically connected to the corresponding auxiliary lead through the third via hole in the first part, and the first electrode and the second electrode can be electrically connected to the external device through the third via hole in the second part. connection.
The circuit substrate according to claim 5, wherein the circuit substrate has two areas symmetrically distributed in the row direction; a plurality of the metal pins in the pin layer are arranged at intervals in the same row direction , And symmetrically arranged in the two areas;

The plurality of column electrode leads in the electrode layer are arranged at intervals in the row direction, and are evenly distributed corresponding to the two regions, and the plurality of row electrode leads are arranged at intervals in the column direction, corresponding to each One of the column electrode leads is provided with one of the auxiliary leads extending along the column direction;

Wherein, each of the column electrode leads in each of the regions is electrically connected to the corresponding metal pin in the same region through a corresponding drive lead;

Each of the auxiliary leads in one of the two regions is electrically connected to the row electrode lead of an odd-numbered row corresponding to itself, and each auxiliary lead in the other region is electrically connected to itself The row electrode leads of the corresponding even rows.
The circuit board according to claim 9, wherein each of the driving leads is symmetrically arranged in the row direction.
The circuit substrate according to claim 3, wherein the circuit substrate further comprises a pad layer, the pad layer is disposed on a side of the first electrode layer away from the driving lead layer, and is connected to the first electrode layer. An electrode layer is insulated, the pad layer includes a plurality of pads, the pads are electrically connected to the corresponding first electrode and the second electrode, and the external device can be connected to the second electrode through the pads. One electrode is electrically connected to the second electrode.
The circuit substrate according to claim 1, wherein the circuit substrate further comprises a substrate, the substrate being located on a side of the driving lead layer away from the electrode layer.
The circuit substrate according to claim 1, wherein a plurality of the row electrode leads and a plurality of the column electrode leads divide the circuit substrate into a plurality of units, and each unit includes two or more of the pair The first electrode and the second electrode are provided.
A display panel including:

The circuit substrate according to any one of claims 1 to 13;

The external device is bound to the first electrode and the second electrode arranged in a pair.
The display panel according to claim 14, wherein the external device is a micro light emitting diode.
A display device comprising the display panel according to claim 14.
The display device according to claim 16, wherein the display device comprises a plurality of the display panels, and the display panels are arranged in splicing with each other.