KR102033755B1 - Organic Light Emitting Display Device and Driving Method thereof - Google Patents

Abstract

The present invention is an organic light emitting diode; A driving transistor supplying a driving current to the organic light emitting diode; A capacitor supplying a driving voltage to the gate electrode of the driving transistor; An initialization transistor for supplying an initialization voltage to the drain electrode node of the driving transistor; A compensation circuit for supplying an initialization voltage to the gate electrode node of the driving transistor, supplying a data voltage to the source electrode node of the driving transistor, and sampling the gate electrode node of the driving transistor as a difference between the data voltage and the threshold voltage of the driving transistor; A switching transistor supplying a high potential voltage to a source electrode node of the driving transistor; And a light emitting control transistor for supplying a driving current generated from the driving transistor to the organic light emitting diode.

Description

Organic Light Emitting Display Device and Driving Method

The present invention relates to an organic light emitting display device and a driving method thereof.

The organic light emitting display device used in the organic light emitting display device is a self-light emitting device having a light emitting layer formed between two electrodes. In the organic light emitting display device, electrons and holes are injected into the light emitting layer from an electron injection electrode and a hole injection electrode, respectively, and an exciton in which the injected electrons and holes combine is excited. The device emits light when it falls from the ground state to the ground state.

An organic light emitting display device using an organic light emitting display device includes a top emission type, a bottom emission type, and a dual emission type according to a direction in which light is emitted. According to this, it is divided into passive matrix type and active matrix type.

In the organic light emitting display device, when a scan signal, a data signal, and a power are supplied to a plurality of subpixels arranged in a matrix form, the selected subpixel emits light, thereby displaying an image.

In the organic light emitting display device, since the threshold voltage of the driving transistor included in the subpixel is shifted, the driving current decreases with time, thereby reducing the lifetime of the device. Accordingly, the organic light emitting display device uses a compensation circuit to compensate for the threshold voltage shift characteristic of the driving transistor.

However, the conventional organic light emitting display device has a disadvantage in that it is difficult to secure uniform image quality characteristics due to the high complexity of the compensation circuit and the layout efficiency is degraded when high resolution is implemented.

The present invention to solve the problems of the above-described background technology, an organic light emitting display capable of suppressing afterimage phenomenon due to hysteresis characteristics and minimizing ripple through compensating threshold voltage deviation of a driving transistor to express a uniform display quality. It is to provide a device and a driving method thereof. In addition, the present invention provides a circuit configuration of a subpixel that can implement an efficient layout in the display panel configuration.

The present invention as a means for solving the above problems is an organic light emitting diode; A driving transistor supplying a driving current to the organic light emitting diode; A capacitor supplying a driving voltage to the gate electrode of the driving transistor; An initialization transistor for supplying an initialization voltage to the drain electrode node of the driving transistor; A compensation circuit which supplies an initialization voltage to the gate electrode node of the driving transistor, supplies a data voltage to the source electrode node of the driving transistor, and samples the gate electrode node of the driving transistor as a difference between the data voltage and the threshold voltage of the driving transistor; A switching transistor supplying a high potential voltage to a source electrode node of the driving transistor; And a light emitting control transistor for supplying a driving current generated from the driving transistor to the organic light emitting diode.

The initialization transistor operates in response to the first scan signal, the compensation circuit operates in response to the second scan signal, and the first and second switching transistors operate in response to the third scan signal. Turn-on intervals may overlap some.

When the turn-on period of the initialization transistor is synchronized with or ahead of the turn-on period of the compensation circuit, and when the turn-on period of the initialization transistor is synchronized with the turn-on period of the compensation circuit, the time when the initialization transistor is turned on is shorter than the time when the compensation circuit is turned on, and the initialization is performed. When the turn-on period of the transistor is ahead of the turn-on period of the compensation circuit, the time when the initialization transistor is turned on may be shorter or the same as the time when the compensation circuit is turned on.

There may be a hold period in which all transistors are turned off between the turn-on period of the compensation circuit and the turn-on period of the first and second switching transistors.

The compensation circuit includes a first compensation transistor positioned between a gate electrode node and a drain electrode node of the driving transistor, a second compensation transistor positioned between a source electrode node of the driving transistor and a data line supplying a data voltage, It may include a compensation capacitor located between the gate electrode node and the gate electrode node of the second compensation transistor.

The compensation circuit may include a first compensation transistor positioned between a gate electrode node and a drain electrode node of the driving transistor, and a second compensation transistor positioned between a source electrode node of the driving transistor and a data line supplying a data voltage. .

In the initialization transistor, a gate electrode is connected to a first scan line to which a first scan signal is supplied, a first electrode is connected to an initialization voltage terminal to which an initialization voltage is supplied, and a second electrode is connected to a drain electrode node of a driving transistor. In the first compensation transistor, a gate electrode is connected to a second scan line to which a second scan signal is supplied, a first electrode is connected to a drain electrode node of a driving transistor, a second electrode is connected to a gate electrode node of a driving transistor, and a second In the compensation transistor, a gate electrode is connected to a second scan line, a first electrode is connected to a data line supplied with a data voltage, a second electrode is connected to a source electrode node of a driving transistor, and a capacitor is provided with a high potential voltage. One end is connected to the upper voltage terminal and the other end is connected to the gate electrode node of the driving transistor, and the switching transistor is connected to the third scan scene. A gate electrode is connected to a third scan line to which an arc is supplied, a first electrode is connected to a high potential voltage terminal, a second electrode is connected to a source electrode node of a driving transistor, and a light emission control transistor is connected to a gate electrode of a third scan line. The first electrode is connected to the drain electrode node of the driving transistor, the second electrode is connected to the anode electrode of the organic light emitting diode, and the organic light emitting diode is connected to the anode electrode of the light emitting control transistor, and the low potential voltage is The cathode electrode may be connected to the supplied low potential voltage terminal.

In another aspect, the present invention includes the steps of turning on the initialization transistor to supply an initialization voltage to the drain electrode node of the driving transistor; The transistors included in the compensation circuit are turned on to supply an initialization voltage to the gate electrode node of the driving transistor, supply a data voltage to the source electrode node of the driving transistor, and supply a gate voltage to the gate electrode node of the driving transistor. Sampling with a difference value; And turning on the switching transistor to supply a high potential voltage to the source electrode node of the driving transistor, and turning on the emission control transistor to supply a driving current generated from the driving transistor to the organic light emitting diode. It provides a driving method.

The initialization transistor operates in response to the first scan signal, the compensation circuit operates in response to the second scan signal, and the first and second switching transistors operate in response to the third scan signal. Turn-on intervals may overlap some.

When the turn-on period of the initialization transistor is synchronized with or ahead of the turn-on period of the compensation circuit, and when the turn-on period of the initialization transistor is synchronized with the turn-on period of the compensation circuit, the time when the initialization transistor is turned on is shorter than the time when the compensation circuit is turned on, and the initialization is performed. When the turn-on period of the transistor is ahead of the turn-on period of the compensation circuit, the time when the initialization transistor is turned on may be shorter or the same as the time when the compensation circuit is turned on.

There may be a hold period in which all transistors are turned off between the turn-on period of the compensation circuit and the turn-on period of the first and second switching transistors.

The present invention has an effect of providing an organic light emitting display device and a driving method thereof capable of suppressing afterimage phenomenon due to hysteresis characteristics and minimizing ripple through compensation of threshold voltage deviation of a driving transistor to express a uniform display quality. have. In addition, the present invention has the effect of providing an organic light emitting display device and a driving method thereof that can provide a high-resolution and high aperture ratio by providing a circuit configuration of the sub-pixel to implement an efficient layout when configuring the display panel.

1 is a schematic configuration diagram of an organic light emitting display device according to an embodiment of the present invention.
2 is a schematic circuit diagram illustrating a subpixel.
3 is a circuit diagram illustrating a subpixel according to an exemplary embodiment of the present invention.
FIG. 4 is a first driving waveform diagram of the subpixel illustrated in FIG. 3.
FIG. 5 is a second driving waveform diagram of the subpixel shown in FIG. 3; FIG.
6 to 9 are diagrams for explaining the operation of the subpixel illustrated in FIG. 3 for each section.
10 is a simulation waveform diagram illustrating variation characteristics of a gate electrode node of a driving transistor according to variation of a threshold voltage.
11 is a waveform diagram showing a change in current according to a threshold voltage variation.
12 is a circuit diagram illustrating a subpixel according to a modified embodiment of the present invention.

Hereinafter, with reference to the accompanying drawings, the specific content for the practice of the present invention will be described.

1 is a schematic configuration diagram of an organic light emitting display device according to an exemplary embodiment of the present invention, and FIG. 2 is an exemplary circuit configuration diagram of a subpixel.

As shown in FIG. 1, an organic light emitting display device according to an exemplary embodiment of the present invention includes a timing controller 110, a data driver 130, a scan driver 120, and a display panel 160.

The timing controller 110 uses a timing driver such as a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal Data Enable, DE, and a clock signal CLK. 130 and the operation timing of the scan driver 120. Since the timing controller 110 may determine the frame period by counting the data enable signal DE of one horizontal period, the vertical synchronization signal Vsync and the horizontal synchronization signal Hsync supplied from the outside may be omitted. The control signals generated by the timing controller 110 include a gate timing control signal GDC for controlling the operation timing of the scan driver 120 and a data timing control signal DDC for controlling the operation timing of the data driver 130. ) Is included.

The scan driver 120 sequentially generates scan signals while shifting the level of the gate driving voltage in response to the gate timing control signal GDC supplied from the timing controller 110. The scan driver 120 supplies a scan signal through scan lines SL1 to SLm connected to the subpixels SP included in the display panel 160.

The data driver 130 samples and latches the data signal DATA supplied from the timing controller 110 in response to the data timing control signal DDC supplied from the timing controller 110 to convert the data signal DATA into data of a parallel data system. . The data driver 130 converts the data signal DATA into a gamma reference voltage. The data driver 130 supplies the data signal DATA through the data lines DL1 to DLn connected to the subpixels SP included in the display panel 160.

The display panel 160 includes subpixels SP arranged in a matrix. The subpixels SP include a red subpixel, a green subpixel, and a blue subpixel, and in some cases, a white subpixel. In the display panel 160 including the white subpixels, the light emitting layers of the subpixels SP may emit white light without emitting red, green, and blue light. In this case, the light emitted in white is converted into red, green and blue by the RGB color filter.

As shown in FIG. 2, an organic light emitting diode OLED, a driving transistor DT, a capacitor Cst, a switching transistor T1, a compensation circuit CC, and an initialization are provided in a subpixel included in the display panel 160. The transistor T4 and the light emission control transistor T5 are included.

The role of each device constituting the subpixel will be briefly described as follows.

The driving transistor DT supplies a driving current to the organic light emitting diode OLED. The capacitor Cst serves to drive the driving transistor DT with a programmed data voltage. The switching transistor T1 supplies a high potential voltage to the source electrode node Vs of the driving transistor DT. The initialization transistor T4 serves to supply an initialization voltage to the drain electrode node Vd and the gate electrode node Vg of the driving transistor DT. The light emission control transistor T5 supplies a driving current generated from the driving transistor DT to the organic light emitting diode OLED. The compensation circuit CC supplies an initialization voltage to the gate electrode node Vg of the driving transistor DT, supplies a data voltage to the source electrode node Vs of the driving transistor DT, and provides a gate of the driving transistor DT. The electrode node Vg serves to sample the difference between the data voltage and the threshold voltage of the driving transistor DT.

The initialization transistor T4 described above is turned on / off in response to the first scan signal supplied through the first scan line SCAN1, and the compensation circuit CC is supplied through the second scan line SCAN2. The transistor is turned on / off in response to the second scan signal, and the switching transistors and the light emission control transistors T1 and T5 are turned on / off in response to the third scan signal supplied through the third scan line EM.

According to an embodiment of the present invention, the compensation circuit CC includes first and second compensation transistors and a compensation capacitor. Hereinafter, an organic light emitting display according to an embodiment of the present invention will be described with reference to a detailed circuit diagram of a subpixel. The description of the display device is specified.

3 is a circuit diagram of a subpixel according to an exemplary embodiment of the present invention, FIG. 4 is a first driving waveform diagram of the subpixel illustrated in FIG. 3, and FIG. 5 is a second diagram of the subpixel illustrated in FIG. 3. This is a drive waveform diagram.

As illustrated in FIG. 3, an organic light emitting diode OLED, a driving transistor DT, a capacitor Cst, a switching transistor T1, and a first compensation transistor T3 include a subpixel according to an exemplary embodiment of the present invention. The second compensation transistor T2, the compensation capacitor Cb, the initialization transistor T4, and the light emission control transistor T5 are included.

Referring to the electrical connection relationship between the elements constituting the sub-pixel according to an embodiment of the present invention.

In the initialization transistor T4, a gate electrode is connected to the first scan line SCAN1 to which the first scan signal is supplied, and a first electrode is connected to the initialization voltage terminal VINIT to which the initialization voltage is supplied. The second electrode is connected to the drain electrode node Vd. In the first compensation transistor T3, a gate electrode is connected to the second scan line SCAN2 to which the second scan signal is supplied, and a first electrode is connected to the drain electrode node Vd of the driving transistor DT. The second electrode is connected to the gate electrode node Vg of the DT. In the second compensation transistor T2, a gate electrode is connected to the second scan line SCAN2, and a first electrode is connected to the data line DL1 to which the data voltage is supplied, and the source electrode node Vs of the driving transistor DT is connected. The second electrode is connected to. One end of the compensation capacitor Cb is connected to the source electrode node Vs of the driving transistor DT and the other end thereof is connected to the data line DL1. One end of the capacitor Cst is connected to the high potential voltage terminal EVDD to which the high potential voltage is supplied, and the other end is connected to the gate electrode node Vg of the driving transistor DT. The switching transistor T1 has a gate electrode connected to a third scan line EM to which a third scan signal is supplied, a first electrode connected to a high potential voltage terminal EVDD, and a source electrode node of the driving transistor DT. The second electrode is connected to Vs). The light emission control transistor T5 has a gate electrode connected to the third scan line EM, a first electrode connected to the drain electrode node Vd of the driving transistor DT, and a first electrode connected to the anode electrode of the organic light emitting diode OLED. Two electrodes are connected. In the organic light emitting diode OLED, an anode electrode is connected to the second electrode of the light emission control transistor T5, and a cathode electrode is connected to the low potential voltage terminal EVSS to which the low potential voltage is supplied.

The driving transistor DT, the switching transistor T1, the first compensation transistor T3, the second compensation transistor T2, the initialization transistor T4, and the light emission control transistor T5 described above are P-type thin film transistors. PMOS).

The subpixel according to an exemplary embodiment of the present invention operates as divided into four sections including an initialization section ①, a sampling section ②, a hold section ③, and a light emitting section ④ as shown in FIG. 4. In addition, as shown in FIG. 5, the sub-pixel according to an embodiment of the present invention includes five sections including a dummy section ⑤, an initialization section ①, a sampling section ②, a hold section ③, and a light emitting section ④. It is divided and operated. Here, the dummy section ⑤ is present due to an operation characteristic when a multiplexer (or mux) is included inside or outside of the circuit structure of the scan driver. Therefore, when the multiplexer is not included in the scan driver, the subpixel according to the exemplary embodiment of the present invention operates in response to the driving waveform shown in FIG. 4.

Meanwhile, when the subpixel according to the exemplary embodiment of the present invention is driven with the driving waveforms as shown in FIGS. 4 and 5, the turn-on periods of the initialization transistor T4 are the first and second compensations included in the compensation circuit CC. It is synchronized with or is ahead of the turn-on period of the transistors T3 and T4.

As shown in FIG. 4, when the turn-on period of the initialization transistor T4 is synchronized with the turn-on periods of the first and second compensation transistors T3 and T4 included in the compensation circuit CC, the time when the initialization transistor T4 is turned on Is shorter than the time when the first and second compensation transistors T3 and T4 included in the compensation circuit CC are turned on. That is, the time for which the first scan signal Scan1 maintains a logic low compared to the second scan signal Scan2 is short. In other words, the first and second scan signals Scan1 and Scan2 have the same time of switching from logic high to logic low. However, the time when the first scan signal Scan1 transitions from logic low to logic high is earlier than the second scan signal Scan2.

As shown in FIG. 5, when the turn-on period of the initialization transistor T4 is earlier than the turn-on periods of the first and second compensation transistors T3 and T4 included in the compensation circuit CC, the time when the initialization transistor T4 is turned on The first and second compensation transistors T3 and T4 included in the compensation circuit CC are shorter or equal to the time when they are turned on. In other words, the first scan signal Scan1 has a short or the same time for maintaining a logic low compared to the second scan signals Scan1 and Scan2. In other words, the time when the first scan signal Scan1 is changed from logic high to logic low is different from the second scan signals Scan1 and Scan2. The time at which the first scan signal Scan1 transitions from logic high to logic low is earlier than the second scan signals Scan1 and Scan2.

Meanwhile, as shown in FIG. 5, when the turn-on period of the initialization transistor T4 is earlier than the turn-on periods of the first and second compensation transistors T3 and T4 included in the compensation circuit CC, the driving transistor DT has a sufficient time. The initialization voltage can be supplied to the gate electrode node Vg and the drain electrode node Vd. Therefore, when the sub-pixel according to the exemplary embodiment of the present invention operates with the driving waveform as shown in FIG. 5, the display quality of the black-based image is reduced by the remaining voltage.

Hereinafter, a description will be given of the operation state for each section of the subpixel with reference to the driving waveform shown in FIG. 4 or FIG. 5 for better understanding of the description.

6 to 9 are diagrams for explaining the operation of the sub-pixel shown in FIG. 3 for each section, and FIG. 10 is a simulation waveform diagram illustrating variation characteristics of a gate electrode node of a driving transistor according to variation of a threshold voltage. Is a waveform diagram showing the current change according to the variation of the threshold voltage.

[Initialization section (①)]

4 and 6, the switching transistor T1 and the light emission control transistor T5 are turned on by the third scan signal Em having a logic high.

The initialization transistor T4 is turned on by the first scan signal Scan1 of the logic low and the initialization voltage supplied through the initialization voltage terminal VINIT is supplied to the drain electrode node Vd of the driving transistor DT.

The first compensation transistor T3 is turned on by the second scan signal Scan2 of the logic low and the initialization voltage supplied to the drain electrode node Vd of the driving transistor DT is the gate electrode node of the driving transistor DT. Vg). In addition, the second compensation transistor T2 is turned on by the second scan signal Scan2 of the logic low and the data voltage supplied through the data line DL1 is supplied to the source electrode node Vs of the driving transistor DT. do.

When the initialization period ① progresses, the drain electrode node Vd and the gate electrode node Vg of the driving transistor DT are initialized by the initialization voltage. To this end, the initialization voltage may use a voltage close to the ground level or a negative voltage.

[Sampling section (②)]

As shown in FIG. 4 and FIG. 7, the switching transistor T1 and the light emission control transistor T5 are kept turned on by the third scan signal Em having the logic high supplied as before.

The initialization transistor T4 is turned off by the first scan signal Scan1 switched from logic low to logic high and the initialization voltage supplied through the initialization voltage terminal VINIT is cut off.

As described above, the first compensation transistor T3 remains turned on by the second scan signal Scan2 of the logic low, and the initialization voltage supplied to the drain electrode node Vd of the driving transistor DT is The gate electrode node Vg of the driving transistor DT is supplied. In addition, the second compensation transistor T2 remains turned on by the second scan signal Scan2 of the logic row supplied as before, and the data voltage supplied through the data line DL1 is the driving transistor DT. Is supplied to the source electrode node Vs.

As the initialization voltage is cut off and the data voltage is supplied, the gate electrode node Vg of the driving transistor DT has a difference (Vg = Vdata-Vth) between the data voltage Vdata and the threshold voltage Vth of the driving transistor DT. Is sampled by).

When the threshold voltage Vth of the driving transistor DT varies, the voltage of the gate electrode node Vg of the driving transistor DT also changes. The variation characteristic of the gate electrode node Vg of the driving transistor ST according to the variation of the threshold voltage Vth of the driving transistor DT is referred to the simulation waveform diagram of FIG. 10.

The compensation capacitor Cb is charged with a compensation voltage corresponding to a difference value between the second scan signal Scan2 of the logic low and the initialization voltage. The compensation voltage charged in the compensation capacitor Cb has a smaller capacity than the driving voltage charged in the capacitor Cst. The compensation capacitor Cb forms a small gate / source electrode node Vgs of the driving transistor DT to prevent a problem of light black being displayed when the subpixel represents black.

[Hold section (③)]

As shown in FIG. 4 and FIG. 8, the initialization transistor T4 is turned off by the first scan signal Scan1 of logic high supplied as before. The first and second compensation transistors T3 and T2 are turned off by the second scan signal Scan2 switched from logic low to logic high. The switching transistor T1 and the light emission control transistor T5 are kept turned on by the third scan signal Em having the logic high supplied as before. That is, all the transistors are turned off (or floated) during the hold period ③. As all the transistors are turned off, the voltages of the nodes Vs, Vg, and Vd of the driving transistor DT are maintained.

Meanwhile, the hold section ③ may be omitted depending on the driving scheme. However, if the holding period ③ is written so that the voltage characteristics of each node Vs, Vg, and Vd are maintained, the effects of signal ripple and the like due to internal or external noise can be minimized, thereby improving the compensating ability. .

[Emitting section (④)]

As shown in FIG. 4 and FIG. 9, the initialization transistor T4 is turned off by the first scan signal Scan1 of logic high supplied as before. The first and second compensation transistors T3 and T2 are turned off by the second scan signal Scan2 of the logic high supplied as before.

The switching transistor T1 is turned on by the third scan signal Em switched from logic high to logic low, and the high potential voltage supplied through the high potential voltage terminal EVDD is a source electrode node of the driving transistor DT. Vs). Accordingly, since the voltage of the gate electrode node Vg of the driving transistor DT is Vdata-Vth and the voltage of the source electrode node Vs of the driving transistor DT is VDD, the source / gate electrode of the driving transistor DT is provided. The voltage Vsg of the nodes Vs and Vg becomes Vgs = VDD-Vdata-Vth.

In addition, the light emission control transistor T5 is turned on and the driving transistor DT generates a driving current by the third scan signal Em switched from logic high to logic low. The organic light emitting diode OLED emits light by a current generated from the driving transistor DT. In summary, the driving current Ioled flowing through the organic light emitting diode OLED is represented by Equation 1 below.

K not described in Equation 1 above is a constant value of the driving transistor. K is usually expressed as k = μCoxW / L, μ is the mobility of the current of the driving transistor, Cox is the capacitance per unit area of the driving transistor, W is the width of the channel of the driving transistor, and L is driving The channel length of the transistor.

As shown in Equation 1, according to an embodiment of the present invention, since the threshold voltage Vth of the driving transistor DT is removed, the organic light emitting diode OLED is independent of the variation and variation of the threshold voltage Vth. It is possible to emit light. Here, FIG. 11 illustrates a change in the variation amount of the organic light emitting diode OLED with respect to the driving current Ioled according to the variation of the threshold voltage Vth of the driving transistor DT.

Hereinafter, modified embodiments of the present invention will be described.

12 is a circuit diagram illustrating a subpixel according to a modified embodiment of the present invention.

As shown in FIG. 12, a subpixel according to a modified embodiment of the present invention includes an organic light emitting diode OLED, a driving transistor DT, a capacitor Cst, a switching transistor T1, and a first compensation transistor T3. ), A second compensation transistor T2, an initialization transistor T4, and a light emission control transistor T5.

Referring to the electrical connection relationship of each device constituting the sub-pixel according to the modified embodiment of the present invention.

In the initialization transistor T4, a gate electrode is connected to the first scan line SCAN1 to which the first scan signal is supplied, and a first electrode is connected to the initialization voltage terminal VINIT to which the initialization voltage is supplied. The second electrode is connected to the drain electrode node Vd. In the first compensation transistor T3, a gate electrode is connected to the second scan line SCAN2 to which the second scan signal is supplied, and a first electrode is connected to the drain electrode node Vd of the driving transistor DT. The second electrode is connected to the gate electrode node Vg of the DT. In the second compensation transistor T2, a gate electrode is connected to the second scan line SCAN2, and a first electrode is connected to the data line DL1 to which the data voltage is supplied, and the source electrode node Vs of the driving transistor DT is connected. The second electrode is connected to. One end of the capacitor Cst is connected to the high potential voltage terminal EVDD to which the high potential voltage is supplied, and the other end is connected to the gate electrode node Vg of the driving transistor DT. The switching transistor T1 has a gate electrode connected to a third scan line EM to which a third scan signal is supplied, a first electrode connected to a high potential voltage terminal EVDD, and a source electrode node of the driving transistor DT. The second electrode is connected to Vs). The light emission control transistor T5 has a gate electrode connected to the third scan line EM, a first electrode connected to the drain electrode node Vd of the driving transistor DT, and a first electrode connected to the anode electrode of the organic light emitting diode OLED. Two electrodes are connected. In the organic light emitting diode OLED, an anode electrode is connected to the second electrode of the light emission control transistor T5, and a cathode electrode is connected to the low potential voltage terminal EVSS to which the low potential voltage is supplied.

The driving transistor DT, the switching transistor T1, the first compensation transistor T3, the second compensation transistor T2, the initialization transistor T4, and the light emission control transistor T5 described above are P-type thin film transistors. PMOS).

The subpixel according to the modified embodiment of the present invention is also divided into four sections, including the initialization section ①, the sampling section ②, the hold section ③, and the light emitting section ④ as shown in FIG. 4. In addition, as shown in FIG. 5, the sub-pixel according to the modified embodiment of the present invention also has five dummy periods (⑤), an initialization period (①), a sampling period (②), a hold period (③), and a light emission period (④). It is divided into sections. Here, the dummy section ⑤ is present due to an operation characteristic when a multiplexer (or mux) is included inside or outside of the circuit structure of the scan driver. Therefore, when the multiplexer is not included in the scan driver, the subpixel according to the modified embodiment of the present invention operates in response to the driving waveform shown in FIG. 4.

Meanwhile, since the subpixel according to the modified embodiment of the present invention operates with the same driving waveform as in the exemplary embodiment of the present invention except that the compensation capacitor has an erased structure, a description thereof will be omitted.

As described above, the present invention provides an organic light emitting display device and a driving method thereof capable of expressing uniform display quality by suppressing afterimage phenomenon due to hysteresis characteristics and minimizing ripple through compensation of threshold voltage deviation of a driving transistor. There is. In addition, the present invention has the effect of providing an organic light emitting display device and a driving method thereof that can provide a high-resolution and high aperture ratio by providing a circuit configuration of the sub-pixel to implement an efficient layout when configuring the display panel.

Although the embodiments of the present invention have been described above with reference to the accompanying drawings, the technical configuration of the present invention described above may be modified in other specific forms without changing the technical spirit or essential features of the present invention by those skilled in the art to which the present invention pertains. It will be appreciated that it may be practiced. Therefore, the embodiments described above are to be understood as illustrative and not restrictive in all aspects. In addition, the scope of the present invention is shown by the claims below, rather than the above detailed description. Also, it is to be construed that all changes or modifications derived from the meaning and scope of the claims and their equivalent concepts are included in the scope of the present invention.

110: timing controller 130: data driver
120: scan driver 160: display panel
OLED: organic light emitting diode DT: driving transistor
Cst: Capacitor T1: Switching Transistor
CC: compensation circuit T5: light emission control transistor
T3: first compensation transistor T2: second compensation transistor
Cb: compensation capacitor T4: initialization transistor

Claims (13)

Organic light emitting diodes;
A driving transistor supplying a driving current to the organic light emitting diode;
A capacitor supplying a driving voltage to the gate electrode of the driving transistor;
An initialization transistor for supplying an initialization voltage to the drain electrode node of the driving transistor;
The initialization voltage is supplied to a gate electrode node of the driving transistor, a data voltage is supplied to a source electrode node of the driving transistor, and the gate electrode node of the driving transistor is a difference between the data voltage and the threshold voltage of the driving transistor. A compensation circuit for sampling;
A switching transistor supplying a high potential voltage to a source electrode node of the driving transistor; And
A light emission control transistor for supplying the drive current generated from the drive transistor to the organic light emitting diode;
The initialization transistor operates in response to the first scan signal,
The compensation circuit operates in response to the second scan signal,
The switching transistor and the light emission control transistor operate in response to a third scan signal,
And a turn-on period of the initialization transistor and the compensation circuit is partially overlapped. delete The method of claim 1,
The turn-on period of the initialization transistor is synchronized with or earlier than the turn-on period of the compensation circuit,
When the turn-on period of the initialization transistor is synchronized with the turn-on period of the compensation circuit, the time when the initialization transistor is turned on is shorter than the time when the compensation circuit is turned on,
And when the turn-on period of the initialization transistor precedes the turn-on period of the compensation circuit, the time when the initialization transistor is turned on is shorter or equal to the time when the compensation circuit is turned on. The method of claim 3,
And a hold period in which all transistors are turned off between a turn-on period of the compensation circuit and a turn-on period of the switching transistor and the light emitting control transistor. The method of claim 4, wherein
The compensation circuit
A first compensation transistor positioned between the gate electrode node and the drain electrode node of the driving transistor;
A second compensation transistor positioned between a source electrode node of the driving transistor and a data line supplying the data voltage;
And a compensation capacitor positioned between the gate electrode node of the driving transistor and the gate electrode node of the second compensation transistor. The method of claim 4, wherein
The compensation circuit
A first compensation transistor positioned between the gate electrode node and the drain electrode node of the driving transistor;
And a second compensation transistor positioned between a source electrode node of the driving transistor and a data line supplying the data voltage. The method according to claim 5 or 6,
In the initialization transistor, a gate electrode is connected to a first scan line to which the first scan signal is supplied, a first electrode is connected to an initialization voltage terminal to which the initialization voltage is supplied, and a second electrode is connected to a drain electrode node of the driving transistor. Connected,
In the first compensation transistor, a gate electrode is connected to a second scan line to which the second scan signal is supplied, a first electrode is connected to a drain electrode node of the driving transistor, and a second electrode is connected to a gate electrode node of the driving transistor. Connected,
The second compensation transistor has a gate electrode connected to the second scan line, a first electrode connected to a data line supplied with the data voltage, and a second electrode connected to a source electrode node of the driving transistor.
One end of the capacitor is connected to a high potential voltage terminal to which the high potential voltage is supplied, and the other end of the capacitor is connected to a gate electrode node of the driving transistor.
The switching transistor has a gate electrode connected to a third scan line to which the third scan signal is supplied, a first electrode connected to the high potential voltage terminal, and a second electrode connected to a source electrode node of the driving transistor.
In the light emitting control transistor, a gate electrode is connected to the third scan line, a first electrode is connected to a drain electrode node of the driving transistor, and a second electrode is connected to an anode electrode of the organic light emitting diode.
And the organic light emitting diode is connected to a second electrode of the light emission control transistor and a cathode electrode is connected to a low potential voltage terminal to which a low potential voltage is supplied. Turning on the initialization transistor to supply an initialization voltage to the drain electrode node of the driving transistor;
The transistors included in the compensation circuit are turned on to supply the initialization voltage to the gate electrode node of the driving transistor, the data voltage is supplied to the source electrode node of the driving transistor, and the gate electrode node of the driving transistor is connected to the data voltage and the voltage. Sampling the difference value of the threshold voltage of the driving transistor; And
Turning on a switching transistor to supply a high potential voltage to a source electrode node of the driving transistor, and turning on a light emitting control transistor to supply a driving current generated from the driving transistor to an organic light emitting diode;
The initialization transistor operates in response to the first scan signal,
The compensation circuit operates in response to the second scan signal,
The switching transistor and the light emission control transistor operate in response to a third scan signal,
And a turn-on period of the initialization transistor and the compensation circuit is partially overlapped. delete The method of claim 8,
The turn-on period of the initialization transistor is synchronized with or earlier than the turn-on period of the compensation circuit,
When the turn-on period of the initialization transistor is synchronized with the turn-on period of the compensation circuit, the time when the initialization transistor is turned on is shorter than the time when the compensation circuit is turned on,
And when the turn-on period of the initialization transistor precedes the turn-on period of the compensation circuit, the time when the initialization transistor is turned on is shorter than or equal to the time when the compensation circuit is turned on. The method of claim 10,
And a hold period in which all transistors are turned off between a turn-on period of the compensation circuit and a turn-on period of the switching transistor and the light emitting control transistor. The method of claim 7, wherein
The driving transistor, the switching transistor, the first compensation transistor, the second compensation transistor, the initialization transistor, and the light emission control transistor are P-type thin film transistors. The method of claim 1,
The initialization voltage is
An organic light emitting display device having a voltage close to ground level or a negative voltage.

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