KR101926859B1 - Silicon electrode plate for plasma etching - Google Patents

Abstract

[PROBLEMS] To provide a silicon electrode plate for plasma etching which suppresses surface unevenness caused by plasma etching in order to ensure uniform etching.
[MEANS FOR SOLVING THE PROBLEMS] The silicon electrode plate for plasma etching is composed of single crystal silicon in which B and Al are added as dopants and the concentration of Al is 1 × 10 ¹³ atoms / cm ³ or more. In the silicon electrode plate for plasma etching, the electric characteristics of the single crystal silicon become uniform in the plane. Thereby, when the surface is depleted during the plasma etching, the occurrence of surface unevenness can be minimized and the occurrence of cracks can be suppressed.

Description

Technical Field [0001] The present invention relates to a silicon electrode plate for plasma etching,

The present invention relates to a silicon electrode plate for plasma etching which improves the in-plane uniformity of a silicon electrode plate during plasma etching.

Generally, in a plasma etching apparatus for etching a silicon wafer used during a step of manufacturing a semiconductor integrated circuit, the silicon electrode plate 2 and the rack 3 are connected to each other in a vacuum container 1 Respectively. In the plasma etching apparatus, the silicon wafer 4 is placed on the rack 3, and while the etching gas 7 flows toward the silicon wafer 4 through the through pores 5 provided in the silicon electrode plate 2, A voltage is applied between the electrode plate 2 and the rack 3 by the radio frequency power source 6 and the plasma 10 is applied between the silicon electrode plate 2 and the rack 3 Whereby the surface of the silicon wafer 4 is etched through a physical reaction caused by the plasma 10 and a chemical reaction caused by the silicon-etching gas 7 (see Patent Document 1) .

Conventionally, an electrode plate composed of carbon atoms has been employed as the silicon electrode plate 2. However, recently, a silicon electrode plate mainly composed of single crystal silicon, polycrystalline silicon, or pillar-form crystalline silicon has been employed.

[Patent Document 1] Japanese Unexamined Patent Publication No. Hei. 2003-51491

The following problems remain in the above-mentioned prior arts.

In a conventional silicon electrode plate, its surface is gradually depleted during plasma etching, resulting in non-uniformity due to the plasma generated between the silicon electrode plate and the opposing etching object, and as a result, an unusual abnormal discharge . If such an abnormal discharge occurs, the etching non-uniformity may be deteriorated, which is disadvantageous.

This surface irregularity caused by the plasma etching is thought to be caused by the nonuniform plasma density between the silicon electrode plate and the opposing etching object due to a change in the in-plane resistivity value. Therefore, in order to suppress the surface unevenness, the in-plane variation of the resistivity value needs to be suppressed. However, since there is an in-plane difference in the dopant content, it is difficult to suppress the in-plane variation of the resistivity value. In particular, since the in-plane difference of the dopant content greatly affects the high specific resistance value, it is difficult to suppress the in-plane variation of the specific resistance value. Until now, it is difficult to maintain the plasma density between the silicon electrode plate and the object to be etched in a uniform manner, and it is difficult to uniformize the etching rate in the plane of the wafer, that is, the object to be etched.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a silicon electrode plate for plasma etching which suppresses unevenness of the surface caused by plasma etching in order to ensure uniform etching.

The present inventors have studied to obtain a silicon electrode plate which has an excellent in-plane uniformity of resistivity value and improves the in-plane uniformity of the etching rate during plasma etching. As a result, the present inventors have found that the doping of Al (aluminum) as well as B (boron) to silicon can suppress the occurrence of unevenness on the surface during plasma etching.

Therefore, the present invention has been made on the basis of this aspect, and adopts the following constitution to overcome the above-mentioned problems. Specifically, the plasma etching silicon electrode plate of the present invention is characterized in that a silicon electrode plate is constituted by single crystal silicon in which B and Al are added as dopants and the concentration of Al is 1 x 10 ¹³ atoms / cm ³ or more.

Since the silicon electrode plate for plasma etching is constituted by the single crystal silicon to which B (boron) and Al are added as dopants, the electric characteristics of the single crystal silicon become uniform in the plane. As a result, when the surface is depleted during the plasma etching, the occurrence of surface unevenness can be minimized. This is because, when Al having a diffusion coefficient larger than that of B is added, Al is diffused more quickly than B and the in-plane uniformity of the resistivity value is improved. In this way, the in-plane uniformity of the resistivity value is improved, so that the plasma density between the silicon electrode plate and the opposing etching object becomes uniform. As a result, the depletion state of the surface of the silicon electrode plate is also made uniform, thereby largely eliminating the occurrence of unevenness, thereby making it possible to uniformize the etching while suppressing the occurrence of abnormal discharge. In addition, since the covalent bond radius of Al to be added is substantially equal to the covalent bond radius of Si, little lattice strain associated with impurity doping occurs, whereby the inherent strain can be suppressed, As a result, cracks are prevented.

The reason why the concentration of Al to be added is set to a value equal to or higher than the lower limit value is that the effect of in-plane uniformity of the resistivity value described above is not clearly obtained when the concentration is less than 1 x 10 ¹³ atoms / cm ³ .

In the plasma etching silicon electrode plate of the present invention, the concentration of Al is preferably 5 x 10 < ¹³ > atoms / cm < ^{3 &}

Specifically, the silicon in the electrode plate for plasma etching, the concentration of Al is 5 × 10 ¹³ atoms / cm ³ or less. Thereby, a decrease in the rate of single crystal crystallization can be suppressed. The reason the concentration of Al than the upper limit value to be added is, 5 × 10 ¹³ The Al concentration of greater than the atoms / cm ³ and can interfere with the Si unity purification, thereby reducing the single crystal rate (the ratio of the single crystal portion of the ingot) And as a result, the production yield can be reduced.

According to the present invention, the following effects can be provided.

Specifically, the silicon electrode plate for plasma etching of the present invention is constituted by monocrystalline silicon doped with B and Al as dopants, whereby the electrical characteristics of the monocrystalline silicon become uniform in the plane. As a result, the surface irregularities caused by the plasma etching can be minimized, and the inherent deformation can be suppressed. Therefore, an abnormal discharge can be suppressed by employing the plasma etching silicon electrode plate of the present invention in the plasma etching apparatus. In addition, plasma etching can be performed while ensuring high in-plane uniformity, and occurrence of cracks and chips can also be suppressed.

1 is a cross-sectional view illustrating a plasma etching apparatus using a silicon electrode plate for plasma etching and an exemplary conventional silicon electrode plate for plasma etching according to an embodiment of the present invention.

Hereinafter, a silicon electrode plate for plasma etching according to an embodiment of the present invention will be described together with its manufacturing method.

1, for example, the plasma etching silicon electrode plate 12 of the present embodiment is formed so as to have a plurality of through pores 5 and is arranged in a facing relation on the silicon wafer 4 And the silicon wafer 4 is placed on the rack 3 in the vacuum container 1 of the plasma etching apparatus.

In the plasma etching apparatus, a radio frequency voltage is applied to the silicon electrode plate 12 and the rack 3 by the radio frequency power source 6 while the etching gas 7 flows to the silicon wafer 4 side through the through pores 5. [ And the plasma 10 is generated in the space between the silicon electrode plate 12 and the rack 3 by the application of the radio frequency voltage so that the surface of the silicon wafer 4 is held by the plasma 10 Is etched through the chemical reaction caused by the physical reaction and the silicon etching gas 7 caused.

In the plasma etching silicon electrode plate 12 of this embodiment, B (boron) and Al are added as dopants, and the concentration of Al is 1 × 10 ¹³ atoms / cm ³ Or more. It is also preferable that the concentration of Al is 5 x 10 < ¹³ > atoms / cm < ³ >

Hereinafter, a method of manufacturing the plasma etching silicon electrode plate 12 of the present embodiment will be described in detail.

First, Si is dissolved in a quartz glass crucible. At this time, B and Al are added to obtain a predetermined concentration. A polycrystalline Si ingot in which Al is contained in Si at a high concentration (approximately 1 × 10 ¹⁶ to 1 × 10 ¹⁷ atoms / cm ³ ) is prepared in advance because the amount of Al to be added is very small. The polycrystalline Si ingot is crushed to obtain an Al-containing polycrystalline Si powder. Thereafter, the Al-containing polycrystalline Si powder is weighed to obtain the required Al concentration, and then added to the Si in the quartz glass crucible.

Next, for example, a single crystal silicon ingot having a diameter of 300 mm is prepared from the quartz glass crucible described above, and the ingot is sliced to a thickness of 4 mm by using a diamond band saw to form a disk-shaped single crystal silicon substrate Prepare. Single-crystal silicon ingot, B was added to the (boron) is 1 × 10 ¹⁴ to 5 × 10 is added at ¹⁴ the dopant concentration in atoms / cm ³ and the dopant concentration of Al is 1 × 10 ¹³ to 5 × 10 ¹³ atoms / cm ³ The results are shown in Fig. The dopant concentrations of B and Al are adjusted so that the ingot is entirely a p-type single crystal silicon ingot. The single crystal silicon substrate may also be obtained by heating a silicon substrate having a predetermined B concentration in contact with Al to enable thermal diffusion of Al.

Further, the upper and lower surfaces of the single crystal silicon substrate are surface polished, and the thickness thereof is made uniform by eliminating warping. Then, mounting apertures and through pores 5 are formed therein. For example, through-pores 5 with an inner diameter of 0.5 mm are formed at 8 mm pitches between the pores. Next, the single crystal silicon substrate is further subjected to a surface polishing treatment to obtain a product having a predetermined thickness.

Since the plasma etching silicon electrode plate 12 of this embodiment thus prepared is constituted by monocrystalline silicon doped with B (boron) and Al as dopants, the electrical characteristics of the single crystal silicon become uniform in the plane. That is, the occurrence of surface irregularities can be minimized when the surface is depleted during plasma etching. This is because, when Al having a diffusion coefficient larger than that of B is added, Al is diffused more quickly than B and the in-plane uniformity of the resistivity value is improved.

In this way, the in-plane uniformity of the resistivity value is improved, so that the plasma density between the silicon electrode plate 12 and the opposing etching object (silicon wafer 4) becomes uniform. As a result, the depletion state of the surface of the silicon electrode plate 12 also becomes uniform, thereby largely eliminating the occurrence of non-uniformity, thereby making it possible to uniformize the etching while suppressing the occurrence of abnormal discharge. Further, since the covalent bond radius of Al to be added is substantially the same as the covalent radius of Si, lattice strain associated with impurity doping hardly occurs, whereby deformation inherent in the lattice strain can be suppressed, .

Further, since the concentration of Al is in the range of 1 × 10 ¹³ to 5 × 10 ¹³ atoms / cm ³ , the in-plane uniformity of an excellent resistivity value is obtained and the single crystalization rate is also reduced, have.

 [Examples]

Next, the silicon electrode plate of the present invention will be specifically described with reference to the evaluation results of the silicon electrode plate actually manufactured by the embodiments based on the above-described embodiments.

In embodiments, the silicon electrode plates of the present invention were prepared by varying the amount of Al added as shown in Table 1, and then the in-plane distribution of the resistivity values, the number of cracks during processing (the number of cracks per 100 plates) , And Si single crystalization were investigated. These results are shown in Table 1. As a comparative example, a silicon electrode plate in which Al was added at a concentration of less than 1 x 10 < ¹³ > atoms / cm < ³ > was also prepared and evaluated in the same manner. In both Examples and Comparative Examples, the amount of B added was 2 x 10 ¹⁴ atoms / cm ³

Kinds Al content
(× 10 ¹³ atoms / cm ³ ) Resistivity value
In-plane distribution
(%) Number of cracks during processing
(Number of cracks per 100 sheets) Si single crystallization rate (%) Comparative Example 0.5 5.5 6 97 Example 1 1.0 2.8 One 97 Example 2 2.8 2.5 0 95 Example 3 5.0 2.3 One 93 Example 4 7.8 2.3 One 86

As can be seen from the evaluation results, in the embodiments of the present invention, the numerical value of the in-plane distribution of the resistivity value is reduced to about half as compared with the comparative example. Also, the number of cracks during processing in embodiments is significantly reduced compared to the comparative example. The addition amount of Al (Al concentration) is carried out in excess of 5 × 10 ¹³ atoms / cm ³ Example 4, single crystal Si ratio is lowered to less than the rate of single-crystal Si in the other embodiments and comparative examples. However, the added amount of Al in the embodiments 1 to 3, not more than ^{5 × 10 13 atoms / cm 3} , is obtained more than 93% Si single crystal ratio.

In this way, the silicon electrode plates of the embodiments exhibit high in-plane uniformity of resistivity values and the occurrence of cracks during processing can be suppressed.

The technical scope of the present invention is not limited to the above-described embodiments and implementations, and the present invention can be modified in various ways without departing from the scope or teachings of the present invention.

1: Vacuum container 2, 12: Silicon electrode plate 3: Rack 4: Silicon wafer 5: Through pore 6: Radio frequency power source 7: Plasma etching gas 10: Plasma

Claims (2)

A plasma etching silicon electrode plate arranged in an opposed state above an object to be etched arranged on a rack in a vacuum container of a plasma etching apparatus,
B and Al are monocrystalline silicon doped as dopants,
The concentration of Al is not less than 1 x 10 ¹³ atoms / cm ^{3 and not} more than 5 x 10 ¹³ atoms / cm ³ ,
Type silicon electrode plate as a whole. delete

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