JP2011134830A - Epitaxial wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an epitaxial wafer capable of suppressing high-concentration impurities included in a silicon substrate from being diffused on an epitaxial layer in a heat treatment process for forming a semiconductor device. <P>SOLUTION: An epitaxial wafer 1 has an epitaxial layer 20 having a phosphorus concentration of a 10<SP>16</SP>atoms/cm<SP>3</SP>order and a film thickness of 0.5-20 &mu;m on a silicon substrate 10 having a phosphorus concentration of a 10<SP>19</SP>atoms/cm<SP>3</SP>order and an oxygen concentration of 1.3&times;10<SP>18</SP>atoms/cm<SP>3</SP>or lower. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

  The present invention relates to an epitaxial wafer capable of suppressing diffusion of impurities on a silicon substrate side into an epitaxial layer in a heat treatment process when forming a semiconductor device.

  As the substrate for forming a semiconductor discrete device, an epitaxial wafer having a silicon epitaxial layer (hereinafter simply referred to as an epitaxial layer) containing impurities at a lower concentration than the silicon substrate on a silicon substrate containing impurities at a high concentration is used.

  In such an epitaxial wafer, a solid layer diffusion phenomenon occurs in which high-concentration impurities contained in a silicon substrate diffuse into the epitaxial layer in a heat treatment process when forming a semiconductor device.

  In particular, when the impurity is phosphorus, the diffusion rate is faster than other impurities, so the impurity concentration (specific resistance) of the epitaxial layer has a gentle gradient in the depth direction during the heat treatment process during semiconductor device formation. As a result, the phenomenon that the transition width (the width of the region where the impurity concentration transitions in the vicinity of the boundary between the silicon substrate having different impurity concentration and the epitaxial layer: Tw in FIG. 2) widens significantly occurs.

  Such widening of the transition width adversely affects intrinsic device characteristics such as breakdown voltage in the semiconductor device. Therefore, even after the heat treatment process at the time of semiconductor device formation, the transition width is narrow, and the silicon substrate and the epitaxial layer An epitaxial wafer having a steep resistance distribution in between is desired.

  As a method of manufacturing an epitaxial wafer with a narrow transition width, a steep, and stable resistivity profile, a protective layer made of a silicon single crystal thin film is vapor-phase grown on a silicon single crystal, and then the protective layer is vapor-phase grown. A technique is disclosed in which the inside of the reaction vessel is dry-etched while the silicon single crystal is contained in the reaction vessel, the inside of the reaction vessel is purged, and the desired silicon single crystal layer is vapor-phase grown ( For example, Patent Document 1).

  In addition, a first silicon single crystal film having a resistivity of 10 to 1500 Ωcm and a thickness of 0.15 to 3.0 μm is epitaxially grown on the wafer surface, and the resistivity is increased on the first silicon single crystal film. A technique for epitaxially growing a second silicon single crystal film smaller than the first silicon single crystal film is disclosed (for example, Patent Document 2).

Japanese Patent Laid-Open No. 10-50616 Japanese Patent Laid-Open No. 2007-81045

  However, the techniques described in Patent Documents 1 and 2 do not suppress the diffusion of high-concentration impurities contained in the silicon substrate into the epitaxial layer in the heat treatment process when forming the semiconductor device.

  The present invention has been made to solve the above technical problem, and can suppress diffusion of high-concentration impurities contained in a silicon substrate into an epitaxial layer in a heat treatment process when forming a semiconductor device. An object is to provide an epitaxial wafer.

The epitaxial wafer according to the present invention has a phosphorus concentration on the order of 10 ¹⁹ atoms / cm ³ and a phosphorus concentration of 10 ¹⁶ atoms / cm ³ on a silicon substrate having an oxygen concentration of 1.3 × 10 ¹⁸ atoms / cm ³ or less. ^It has a silicon epitaxial layer with a thickness of 0.5 to 20 μm in ^three orders.

  ADVANTAGE OF THE INVENTION According to this invention, the epitaxial wafer which can suppress that the high concentration impurity contained in a silicon substrate diffuses into an epitaxial layer in the heat treatment process at the time of semiconductor device formation is provided.

1 is a schematic view of an epitaxial wafer according to an embodiment of the present invention. It is a figure which shows the impurity profile for demonstrating the transition width Tw.

The inventors have described that an epitaxial wafer is a silicon substrate containing a high concentration of impurities with an impurity of phosphorus on the order of 10 ¹⁹ atoms / cm ³ , and the impurity is phosphorus on the silicon substrate. It has been confirmed that the transition width is greatly widened in the heat treatment process at the time of forming a semiconductor device when an epitaxial layer containing an impurity at a low concentration of 10 ¹⁶ atoms / cm ^{3, which} is three orders of magnitude lower than the silicon substrate, is included. Therefore, as a result of intensive studies to solve these technical problems, the present invention has been completed.

Hereinafter, embodiments of an epitaxial wafer according to the present invention will be described in more detail with reference to the accompanying drawings.
FIG. 1 is a schematic diagram of an epitaxial wafer according to an embodiment of the present invention, and FIG. 2 is a diagram showing an impurity profile for explaining a transition width Tw.

As shown in FIG. 1, the epitaxial wafer 1 according to the embodiment of the present invention has an epitaxial layer 20 on a silicon substrate 10, and the silicon substrate 10 has a phosphorus concentration of the order of 10 ¹⁹ atoms / cm ³ , The oxygen concentration is 1.3 × 10 ¹⁸ atoms / cm ³ or less, and the epitaxial layer 20 is characterized in that the phosphorus concentration is on the order of 10 ¹⁶ atoms / cm ³ .

Thus, on the silicon substrate 10 containing a high concentration impurity having a phosphorus concentration of the order of 10 ¹⁹ atoms / cm ³ , an epitaxial layer containing a low concentration impurity of the order of 10 ¹⁶ atoms / cm ³ having a low three-digit impurity concentration. 20, by setting the oxygen concentration in the silicon substrate 10 to 1.3 × 10 ¹⁸ atoms / cm ³ or less, high-concentration impurities contained in the silicon substrate are epitaxially formed in the heat treatment process when forming the semiconductor device. Diffusion to the layer can be greatly suppressed.

When the oxygen concentration exceeds 1.3 × 10 ¹⁸ atoms / cm ³ , the transition width Tw greatly increases in the heat treatment process when forming the semiconductor device, which is not preferable.

The lower limit value of the oxygen concentration is preferably 0.5 × 10 ¹⁸ atoms / cm ³ or more. When the oxygen concentration is less than 0.5 × 10 ¹⁸ atoms / cm ³ , the strength in the silicon substrate 10 is reduced, and thus problems such as warpage and misfit dislocation occur when the epitaxial layer 20 is formed. Therefore, it is not preferable.

  The film thickness of the epitaxial layer 20 is designed in a timely manner according to the application of the semiconductor device to be used.

Next, the manufacturing method of the epitaxial wafer of this invention is demonstrated.
An epitaxial wafer manufacturing method according to the present invention includes a step of manufacturing a silicon substrate having a phosphorus concentration of the order of 10 ¹⁹ atoms / cm ³ and an oxygen concentration of 1.3 × 10 ¹⁸ atoms / cm ³ or less, Forming an epitaxial layer having a phosphorus concentration of the order of 10 ¹⁶ atoms / cm ³ and a film thickness of 0.5 to 20 μm on the substrate.

Specifically, the process of manufacturing the silicon substrate is performed by the following method. First, a silicon single crystal ingot having a phosphorus concentration of the order of 10 ¹⁹ atoms / cm ³ and an oxygen concentration of 1.3 × 10 ¹⁸ atoms / cm ³ or less is grown by the Czochralski method.

The silicon single crystal ingot is grown by the Czochralski method by a well-known method.
Specifically, after filling polycrystalline silicon and a predetermined amount of phosphorus into a quartz crucible and heating the quartz crucible, the polycrystalline silicon is heated to form a silicon melt, and then above the surface of the silicon melt. The seed crystal is brought into contact with the seed crystal, and the seed crystal and the quartz crucible are rotated while being rotated, and the diameter of the seed crystal is increased to a desired diameter to grow a straight body portion.

The silicon single crystal ingot thus obtained is processed into a silicon substrate by a known method. Specifically, a silicon single crystal ingot is sliced into a wafer shape with an inner peripheral blade or a wire saw, etc., and then subjected to processing steps such as chamfering, lapping, etching and polishing of the outer peripheral portion, and at least the device forming surface is a mirror surface silicon A substrate is manufactured. Note that the processing steps described here are exemplary, and the present invention is not limited to this processing step.

Next, an epitaxial layer having a phosphorus concentration of the order of 10 ¹⁶ atoms / cm ³ and a film thickness of 0.5 to 20 μm is formed on the device formation surface of the manufactured silicon substrate. The epitaxial layer can be formed by a known method such as a vapor phase epitaxial method (CVD method), a metal organic chemical vapor deposition method (MOCVD method), or a molecular beam epitaxial method (MBE method).

Since the epitaxial wafer manufacturing method according to the present invention has the above-described configuration, the epitaxial wafer according to the present invention can be manufactured. In addition, since there is no need to form an intermediate layer as shown in Patent Document 2 between the silicon substrate 10 and the epitaxial layer 20, an effect of improving productivity is provided.

EXAMPLES Hereinafter, although this invention is demonstrated further more concretely based on an Example, this invention is not limitedly interpreted by the following Example.

(Examples and Comparative Examples) Phosphorus concentration is 5 × 10 ¹⁹ atoms / cm ³ and oxygen concentration is different from 1.0 × 10 ¹⁸ , 1.3 × 10 ¹⁸ , 1.8 × 10 ¹⁸ atoms / cm ^3. A silicon substrate having a diameter of 6 inches (150 mm) was prepared. Next, an epitaxial layer having a phosphorus concentration of 3 × 10 ¹⁶ atoms / cm ³ and a film thickness of 7 μm is formed on each of these silicon substrates by a vapor phase epitaxial method (CVD method). An epitaxial wafer was produced. Thereafter, these epitaxial wafers were heat-treated in a 100% oxygen atmosphere at a temperature of 1050 ° C. for 60 minutes, and then switched from a 100% oxygen atmosphere to a 100% nitrogen atmosphere at the same temperature. A partial heat treatment was performed. This heat treatment was referred to as device formation heat treatment. Then, the depth direction distribution of phosphorus concentration in the epitaxial wafer subjected to the heat treatment was measured by secondary ion mass spectrometry (SIMS). Further, the depth direction distribution of phosphorus concentration in the epitaxial wafer before the heat treatment was also measured by the same method.
Thereafter, each transition width Tw was calculated from the obtained impurity concentration profile.
Table 1 shows the evaluation results in this example and the comparative example.

From Table 1, when the oxygen concentration of the silicon substrate is 1.3 × 10 ¹⁸ atoms / cm ³ or less (Examples 1 and 2), the oxygen concentration is 1.8 × 10 ¹⁸ atoms / cm ³ ( It is recognized that the expansion of the transition width Tw is suppressed to 60% or less compared to Comparative Example 1).

1 Epitaxial Wafer 10 Silicon Substrate 20 Epitaxial Layer Tw Transition Width

Claims (1)

On a silicon substrate having a phosphorus concentration of 10 ¹⁹ atoms / cm ³ and an oxygen concentration of 1.3 × 10 ¹⁸ atoms / cm ³ or less, a phosphorus concentration of 10 ¹⁶ atoms / cm ³ and a film thickness of 0 An epitaxial wafer having a silicon epitaxial layer of 5 to 20 μm.

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