JP2011155130A - Epitaxial wafer and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an epitaxial wafer and a method of manufacturing the same, wherein diffusion of an impurity of high concentration included in a silicon substrate into an epitaxial layer is suppressed in a heat treatment process for forming a semiconductor device. <P>SOLUTION: The epitaxial wafer 1 has a silicon epitaxial layer 20 of 10<SP>16</SP>atoms/cm<SP>3</SP>order in phosphorous concentration and 0.5 to 20 &mu;m in film thickness, on the silicon substrate 10 of 10<SP>19</SP>atoms/cm<SP>3</SP>order in phosphorous concentration and 0.8&times;10<SP>18</SP>to 1.3&times;10<SP>18</SP>atoms/cm<SP>3</SP>in oxygen concentration. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

  The present invention relates to an epitaxial wafer capable of suppressing diffusion of impurities on a silicon substrate side into an epitaxial layer in a heat treatment process when forming a semiconductor device, and a manufacturing method thereof.

  As a substrate for forming a semiconductor discrete device, an epitaxial wafer having a silicon epitaxial layer (hereinafter simply referred to as an epitaxial layer) containing a lower concentration of impurities than a silicon substrate on a silicon substrate containing a high concentration of impurities is used. .

  In such an epitaxial wafer, a solid layer diffusion phenomenon occurs in which high-concentration impurities contained in a silicon substrate diffuse into the epitaxial layer in a heat treatment process when forming a semiconductor device.

 In particular, when the impurity is phosphorus, its diffusion rate is faster than other impurities. Therefore, in the heat treatment process during semiconductor device formation, the transition width (near the boundary between the silicon substrate having a different impurity concentration and the epitaxial layer) Thus, the phenomenon that the width of the region where the impurity concentration transitions: Tw) in FIG.

  Such widening of the transition width adversely affects intrinsic device characteristics such as breakdown voltage in the semiconductor device. Therefore, even after the heat treatment process at the time of forming the semiconductor device, the transition width is narrow, and the silicon substrate and the epitaxial layer An epitaxial wafer having a steep resistance distribution between the two is desired.

  As a method of manufacturing an epitaxial wafer with a narrow transition width, a steep, and stable resistivity profile, a protective layer made of a silicon single crystal thin film is vapor-phase grown on a silicon single crystal, and then the protective layer is vapor-phase grown. A technique is disclosed in which the inside of the reaction vessel is dry-etched while the silicon single crystal is contained in the reaction vessel, the inside of the reaction vessel is purged, and the desired silicon single crystal layer is vapor-phase grown ( For example, Patent Document 1).

 In addition, a first silicon single crystal film having a resistivity of 10 to 1500 Ωcm and a thickness of 0.15 to 3.0 μm is epitaxially grown on the wafer surface, and the resistivity is increased on the first silicon single crystal film. A technique for epitaxially growing a second silicon single crystal film smaller than the first silicon single crystal film is disclosed (for example, Patent Document 2).

Japanese Patent Laid-Open No. 10-50616 JP 2007-81045 A

  However, these technologies described in Patent Documents 1 and 2 suppress the diffusion of high-concentration impurities contained in a silicon substrate into an epitaxial layer, that is, a solid-layer diffusion phenomenon, in a heat treatment process when forming a semiconductor device. It wasn't.

 The present invention has been made to solve the above technical problem, and can suppress diffusion of high-concentration impurities contained in a silicon substrate into an epitaxial layer in a heat treatment process when forming a semiconductor device. An object of the present invention is to provide an epitaxial wafer and a manufacturing method thereof.

The epitaxial wafer according to the present invention has a phosphorus concentration on a silicon substrate having an order of 10 ¹⁹ atoms / cm ³ and an oxygen concentration of 0.8 × 10 ^{18 to} 1.3 × 10 ¹⁸ atoms / cm ^3. Has a silicon epitaxial layer with a thickness of 0.5 to 20 μm in the order of 10 ¹⁶ atoms / cm ³ .

The epitaxial wafer manufacturing method according to the present invention includes a silicon substrate having a phosphorus concentration of the order of 10 ¹⁹ atoms / cm ³ and an oxygen concentration of 0.8 × 10 ^{18 to} 1.3 × 10 ¹⁸ atoms / cm ^3. And a step of forming a silicon epitaxial layer with a phosphorus concentration of the order of 10 ¹⁶ atoms / cm ³ and a film thickness of 0.5 to 20 μm on the silicon substrate.

  ADVANTAGE OF THE INVENTION According to this invention, the epitaxial wafer which can suppress that the high concentration impurity contained in a silicon substrate diffuses into an epitaxial layer in the heat treatment process at the time of semiconductor device formation, and its manufacturing method are provided.

1 is a schematic cross-sectional view of an epitaxial wafer according to an embodiment of the present invention. It is the schematic which shows the impurity concentration profile for demonstrating the transition width Tw. 4 is an impurity concentration profile of phosphorus concentration in the depth direction from the wafer surface (epitaxial layer surface) in Examples 1 and 2 and Comparative Example 1. FIG.

The inventors have described that an epitaxial wafer is a silicon substrate containing a high concentration of impurities with an impurity of phosphorus on the order of 10 ¹⁹ atoms / cm ³ , and the impurity is phosphorus on the silicon substrate. In the case where an epitaxial layer containing an impurity with a low concentration of 10 ¹⁶ atoms / cm ^{3, which} is three orders of magnitude lower than that of the silicon substrate, is included, the transition width Tw tends to widen greatly in the heat treatment process at the time of semiconductor device formation. As a result, the present invention has been completed as a result of intensive studies to solve these technical problems.

  Hereinafter, embodiments of an epitaxial wafer according to the present invention will be described in more detail with reference to the accompanying drawings.

  FIG. 1 is a schematic cross-sectional view of an epitaxial wafer according to an embodiment of the present invention, and FIG. 2 is a schematic view showing an impurity concentration profile for explaining a transition width Tw.

As shown in FIG. 1, the epitaxial wafer 1 according to the embodiment of the present invention has a phosphorus concentration of the order of 10 ¹⁹ atoms / cm ³ and an oxygen concentration of 0.8 × 10 ^{18 to} 1.3 × 10 ¹⁸ atoms / cm. on the silicon substrate 10 is cm ^3, and phosphorus concentrations ¹⁰ 16 atoms / cm ³ order, thickness and having a silicon epitaxial layer 20 of 0.5 to 20 [mu] m.

Thus, on the silicon substrate 10 containing a high concentration impurity having a phosphorus concentration of the order of 10 ¹⁹ atoms / cm ³ , an impurity having a low concentration of 10 ¹⁶ atoms / cm ³ of which the impurity concentration of phosphorus concentration is three orders of magnitude lower. In the case where the epitaxial layer 20 is included, the oxygen concentration in the silicon substrate 10 is set to 0.8 × 10 ^{18 to} 1.3 × 10 ¹⁸ atoms / cm ³ , so that the silicon substrate is formed in the heat treatment process when forming the semiconductor device. Can be prevented from diffusing into the epitaxial layer.

When the oxygen concentration is less than 0.8 × 10 ¹⁸ atoms / cm ³ , the strength of the silicon substrate 10 is lowered, and therefore slip dislocation may occur in the heat treatment process when forming the semiconductor device. It is not preferable.

When the oxygen concentration exceeds 1.3 × 10 ¹⁸ atoms / cm ³ , the transition width Tw becomes large in the heat treatment process when forming the semiconductor device, which is not preferable.

  The film thickness of the epitaxial layer 20 is appropriately designed according to the application of the semiconductor discrete device to be used. Specifically, it is preferably 0.5 μm or more and 20 μm or less.

  Next, the manufacturing method of the epitaxial wafer of this invention is demonstrated.

The method for producing an epitaxial wafer according to the present invention produces a silicon substrate having a phosphorus concentration of the order of 10 ¹⁹ atoms / cm ³ and an oxygen concentration of 0.8 × 10 ^{18 to} 1.3 × 10 ¹⁸ atoms / cm ^3. And a step of forming, on the silicon substrate, a silicon epitaxial layer having a phosphorus concentration of the order of 10 ¹⁶ atoms / cm ³ and a film thickness of 0.5 to 20 μm.

  Specifically, the process of manufacturing the silicon substrate is performed by the following method.

First, a silicon single crystal ingot having a phosphorus concentration of the order of 10 ¹⁹ atoms / cm ³ and an oxygen concentration of 0.8 × 10 ^{18 to} 1.3 × 10 ¹⁸ atoms / cm ³ is grown by the Czochralski method. To do.

  The silicon single crystal ingot is grown by the Czochralski method by a well-known method.

Specifically, polycrystalline silicon and a necessary amount of phosphorus for having a resistivity of the order of 10 ¹⁹ atoms / cm ³ are filled in a quartz crucible, and the polycrystalline crucible is heated to heat the polycrystalline silicon. After forming the melt, the seed crystal is brought into contact with the silicon melt from above, and the seed crystal and the quartz crucible are rotated while being rotated, and the diameter is expanded to a desired diameter to grow a straight body portion. .

  The silicon single crystal ingot thus obtained is processed into a silicon substrate by a known method.

  Specifically, a silicon single crystal ingot is sliced into a wafer shape with an inner peripheral blade or a wire saw, etc., and then subjected to processing steps such as chamfering, lapping, etching, and polishing of the outer peripheral portion, and at least the device forming surface is a mirror surface silicon A substrate is manufactured. Note that the processing steps described here are exemplary, and the present invention is not limited to this processing step.

Next, an epitaxial layer having a phosphorus concentration of the order of 10 ¹⁶ atoms / cm ³ and a film thickness of 0.5 to 20 μm is formed on the surface (device formation surface) of the manufactured silicon substrate.

 The epitaxial layer can be formed by a known method such as a vapor phase epitaxial method (CVD method), a metal organic chemical vapor deposition method (MOCVD method), or a molecular beam epitaxial method (MBE method).

  Since the epitaxial wafer manufacturing method according to the present invention has the above-described configuration, the epitaxial wafer according to the present invention can be manufactured. In addition, since there is no need to form an intermediate layer as shown in Patent Document 2 between the silicon substrate 10 and the epitaxial layer 20, an effect of improving productivity is provided.

  EXAMPLES Hereinafter, although this invention is demonstrated further more concretely based on an Example, this invention is not limitedly interpreted by the following Example.

(Examples 1 and 2 and Comparative Example 1)
The phosphorus concentration is 5 × 10 ¹⁹ atoms / cm ³ , and the oxygen concentration is 0.8 × 10 ¹⁸ , 1.3 × 10 ¹⁸ , 1.7 × 10 ¹⁸ atoms / cm ^3, which is 6 inches (150 mm) in diameter. A silicon substrate was prepared.

Next, an epitaxial layer having a phosphorus concentration of 3.0 × 10 ¹⁶ atoms / cm ³ and a film thickness of 3 μm is formed on each of these silicon substrates by vapor phase epitaxy (CVD). Three types of epitaxial wafers having different oxygen concentrations of the substrates were produced.

  Thereafter, these epitaxial wafers were heat-treated in a 100% oxygen atmosphere at a temperature of 1050 ° C. for 60 minutes, and then switched from a 100% oxygen atmosphere to a 100% nitrogen atmosphere at the same temperature. A partial heat treatment was performed. This heat treatment was referred to as device formation heat treatment.

 Next, the depth direction distribution of phosphorus concentration in the epitaxial wafer subjected to the heat treatment was measured by secondary ion mass spectrometry (SIMS). Further, the depth direction distribution of phosphorus concentration in the epitaxial wafer before the heat treatment was also measured by the same method. Further, the transition width Tw was calculated from the obtained impurity concentration profile.

Table 1 shows the evaluation results for transition width Tw in Examples 1 and 2 and Comparative Example 1, and FIG. 3 shows the depth direction from the wafer surface (epitaxial layer surface) in Examples 1 and 2 and Comparative Example 1. The impurity concentration profile of the phosphorus concentration in FIG.

As shown in Table 1 and FIG. 3, when the oxygen concentration of the silicon substrate is 1.3 × 10 ¹⁸ atoms / cm ³ or less (Examples 1 and 2), the oxygen concentration is 1.7 × 10 ¹⁸ atoms. It can be seen that the spread of the transition width Tw can be suppressed to 87% or less compared to the case of / cm ³ (Comparative Example 1).

  Further, when slip dislocations on the surface of the epitaxial layer of the three types of heat-treated epitaxial wafers were observed with an X-ray topograph, no slip dislocations were confirmed in Examples 1 and 2 and Comparative Example 1.

(Comparative Example 2)
A silicon substrate having a diameter of 6 inches (150 mm) having a phosphorus concentration of 5 × 10 ¹⁹ atoms / cm ³ and an oxygen concentration of 0.6 × 10 ¹⁸ atoms / cm ³ was prepared.

Next, an epitaxial layer having a phosphorus concentration of 3.0 × 10 ¹⁶ atoms / cm ³ and a film thickness of 3 μm is formed on these silicon substrates by vapor phase epitaxy (CVD). Was made.

  Thereafter, this epitaxial wafer was heat-treated at a temperature of 1050 ° C. for 60 minutes in a 100% oxygen atmosphere, and then switched from a 100% oxygen atmosphere to a 100% nitrogen atmosphere at the same temperature for a further 270 minutes. Heat treatment was performed. This heat treatment was referred to as device formation heat treatment.

  Thereafter, slip dislocations on the epitaxial layer surface of the epitaxial wafer after the heat treatment were observed with an X-ray topograph, and slip dislocations were confirmed.

1 Epitaxial Wafer 10 Silicon Substrate 20 Epitaxial Layer Tw Transition Width

Claims (2)

On a silicon substrate having a phosphorus concentration of 10 ¹⁹ atoms / cm ³ and an oxygen concentration of 0.8 × 10 ^{18 to} 1.3 × 10 ¹⁸ atoms / cm ³ , the phosphorus concentration is 10 ¹⁶ atoms / cm ^3. An epitaxial wafer comprising a silicon epitaxial layer having a thickness of 0.5 to 20 μm. Manufacturing a silicon substrate having a phosphorus concentration of the order of 10 ¹⁹ atoms / cm ³ and an oxygen concentration of 0.8 × 10 ^{18 to} 1.3 × 10 ¹⁸ atoms / cm ³ ;
Forming a silicon epitaxial layer on the silicon substrate with a phosphorus concentration of the order of 10 ¹⁶ atoms / cm ³ and a film thickness of 0.5 to 20 μm;
A method for producing an epitaxial wafer, comprising:

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