KR101378007B1 - 타이밍 복구 루프를 위한 위상 검출기 - Google Patents

타이밍 복구 루프를 위한 위상 검출기 Download PDF

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KR101378007B1
KR101378007B1 KR1020100060412A KR20100060412A KR101378007B1 KR 101378007 B1 KR101378007 B1 KR 101378007B1 KR 1020100060412 A KR1020100060412 A KR 1020100060412A KR 20100060412 A KR20100060412 A KR 20100060412A KR 101378007 B1 KR101378007 B1 KR 101378007B1
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South Korea
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values
signal
produce
soft
equalized
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English (en)
Korean (ko)
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KR20110047961A (ko
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진펭 리우
홍웨이 송
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엘에스아이 코포레이션
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • G11B20/10037A/D conversion, D/A conversion, sampling, slicing and digital quantisation or adjusting parameters thereof
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • G11B20/10046Improvement or modification of read or write signals filtering or equalising, e.g. setting the tap weights of an FIR filter
    • G11B20/10055Improvement or modification of read or write signals filtering or equalising, e.g. setting the tap weights of an FIR filter using partial response filtering when writing the signal to the medium or reading it therefrom
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • G11B20/10222Improvement or modification of read or write signals clock-related aspects, e.g. phase or frequency adjustment or bit synchronisation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • G11B20/10268Improvement or modification of read or write signals bit detection or demodulation methods
    • G11B20/10287Improvement or modification of read or write signals bit detection or demodulation methods using probabilistic methods, e.g. maximum likelihood detectors
    • G11B20/10296Improvement or modification of read or write signals bit detection or demodulation methods using probabilistic methods, e.g. maximum likelihood detectors using the Viterbi algorithm
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/0807Details of the phase-locked loop concerning mainly a recovery circuit for the reference signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/081Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/091Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/124Sampling or signal conditioning arrangements specially adapted for A/D converters
    • H03M1/1245Details of sampling arrangements or methods
    • H03M1/1255Synchronisation of the sampling frequency or phase to the input frequency or phase
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/0054Detection of the synchronisation error by features other than the received signal transition
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B2220/00Record carriers by type
    • G11B2220/20Disc-shaped record carriers
    • G11B2220/25Disc-shaped record carriers characterised in that the disc is based on a specific recording technology
    • G11B2220/2508Magnetic discs
    • G11B2220/2516Hard disks

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
KR1020100060412A 2009-10-30 2010-06-25 타이밍 복구 루프를 위한 위상 검출기 Expired - Fee Related KR101378007B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/609,031 2009-10-30
US12/609,031 US7974369B2 (en) 2009-10-30 2009-10-30 Phase detector for timing recovery loop

Publications (2)

Publication Number Publication Date
KR20110047961A KR20110047961A (ko) 2011-05-09
KR101378007B1 true KR101378007B1 (ko) 2014-03-27

Family

ID=43522378

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Application Number Title Priority Date Filing Date
KR1020100060412A Expired - Fee Related KR101378007B1 (ko) 2009-10-30 2010-06-25 타이밍 복구 루프를 위한 위상 검출기

Country Status (6)

Country Link
US (1) US7974369B2 (enExample)
EP (1) EP2317515A3 (enExample)
JP (1) JP5330319B2 (enExample)
KR (1) KR101378007B1 (enExample)
CN (1) CN102055471B (enExample)
TW (1) TWI420878B (enExample)

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US8281224B1 (en) * 2008-10-20 2012-10-02 Link—A—Media Devices Corporation Programmable LBA and dummy bit reliabilities
US8429500B2 (en) * 2010-03-31 2013-04-23 Lsi Corporation Methods and apparatus for computing a probability value of a received value in communication or storage systems
US8149529B2 (en) * 2010-07-28 2012-04-03 Lsi Corporation Dibit extraction for estimation of channel parameters
US9135106B2 (en) * 2012-05-22 2015-09-15 Hgst Technologies Santa Ana, Inc. Read level adjustment using soft information
US8848308B2 (en) * 2013-03-04 2014-09-30 Lsi Corporation Systems and methods for ADC sample based inter-track interference compensation
US9281006B2 (en) 2013-12-13 2016-03-08 Avago Technologies General Ip (Singapore) Pte. Ltd. Systems and methods for ATI characterization
US8917467B1 (en) 2013-12-13 2014-12-23 Lsi Corporation Systems and methods for ATI mitigation
US9240199B2 (en) 2014-03-12 2016-01-19 Avago Technologies General Ip (Singapore) Pte. Ltd. Systems and methods for distortion characterization
US9083366B1 (en) 2014-03-12 2015-07-14 Avago Technologies General Ip (Singapore) Pte. Ltd. Alignment of sampling phases in a multi-channel time-interleaved analog-to-digital converter
US9099157B1 (en) 2014-04-22 2015-08-04 Avago Technologies General Ip (Singapore) Pte. Ltd. Systems and methods for adjacent track interference based re-writing
US9350526B2 (en) * 2014-10-27 2016-05-24 The United States Of America As Represented By The Secretary Of The Air Force Non-integer oversampled timing recovery for higher order quadrature modulation communication systems using in-phase samples
US9319217B1 (en) * 2014-10-28 2016-04-19 The United States Of America As Represented By The Secretary Of The Air Force Non-integer oversampled timing recovery for higher order quadrature modulation communication systems using quadrature-phase samples
US10277256B2 (en) * 2016-01-05 2019-04-30 Mediatek Inc. Decoding across transmission time intervals
US9882710B2 (en) * 2016-06-23 2018-01-30 Macom Connectivity Solutions, Llc Resolving interaction between channel estimation and timing recovery
US9641185B1 (en) * 2016-06-30 2017-05-02 Intel IP Corporation Digital time converter systems and method
US10135606B2 (en) 2016-10-27 2018-11-20 Macom Connectivity Solutions, Llc Mitigating interaction between adaptive equalization and timing recovery
US10050774B1 (en) * 2017-05-02 2018-08-14 MACOM Technology Solutions Holding, Inc. Mitigating interaction between adaptive equalization and timing recovery
US11979163B2 (en) * 2022-10-03 2024-05-07 Western Digital Technologies, Inc. Oversampled phase lock loop in a read channel

Citations (2)

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Publication number Priority date Publication date Assignee Title
DE4308000A1 (de) * 1993-03-13 1994-09-15 Bosch Gmbh Robert Verfahren zur entscheidungsrückgekoppelten Taktableitung
EP2031791A1 (en) * 2007-08-30 2009-03-04 Deutsche Thomson OHG Apparatus and method for recovering data from a clocked input signal

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JP3428339B2 (ja) * 1996-12-11 2003-07-22 日本ビクター株式会社 位相同期制御回路
AU4515801A (en) * 1999-12-03 2001-06-18 Broadcom Corporation Viterbi slicer for turbo codes
DE60024261T2 (de) * 2000-08-28 2006-08-03 Sony Deutschland Gmbh Soft-Normalisierer für einen Kanaldekoder
JP3749889B2 (ja) * 2002-10-17 2006-03-01 株式会社東芝 Prml検出を適用する信号処理デバイス、同デバイスを備えたディスク記憶装置、及び同装置におけるフィードバック制御のための信号処理方法
US7239682B2 (en) * 2002-11-12 2007-07-03 Carnegie Mellon University Timing recovery system and method
ES2300748T3 (es) * 2004-02-19 2008-06-16 Thomson Licensing Metodo y aparato para recuperacion de portadora en un sistema de comunicaciones.
US7653155B1 (en) * 2004-11-04 2010-01-26 Sandia Corporation Using convolutional decoding to improve time delay and phase estimation in digital communications
TWI358204B (en) * 2007-12-12 2012-02-11 Ind Tech Res Inst All digital phase lock loop and method for control

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4308000A1 (de) * 1993-03-13 1994-09-15 Bosch Gmbh Robert Verfahren zur entscheidungsrückgekoppelten Taktableitung
EP2031791A1 (en) * 2007-08-30 2009-03-04 Deutsche Thomson OHG Apparatus and method for recovering data from a clocked input signal

Also Published As

Publication number Publication date
EP2317515A2 (en) 2011-05-04
JP2011097559A (ja) 2011-05-12
CN102055471A (zh) 2011-05-11
US7974369B2 (en) 2011-07-05
US20110103527A1 (en) 2011-05-05
KR20110047961A (ko) 2011-05-09
EP2317515A3 (en) 2011-05-25
JP5330319B2 (ja) 2013-10-30
TW201116022A (en) 2011-05-01
TWI420878B (zh) 2013-12-21
CN102055471B (zh) 2015-05-20

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