KR101312473B1 - 플라즈마 처리 방법 - Google Patents

플라즈마 처리 방법 Download PDF

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Publication number
KR101312473B1
KR101312473B1 KR20120007204A KR20120007204A KR101312473B1 KR 101312473 B1 KR101312473 B1 KR 101312473B1 KR 20120007204 A KR20120007204 A KR 20120007204A KR 20120007204 A KR20120007204 A KR 20120007204A KR 101312473 B1 KR101312473 B1 KR 101312473B1
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KR
South Korea
Prior art keywords
trench
forming step
nitride film
plasma
oxide film
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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KR20120007204A
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English (en)
Korean (ko)
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KR20130072105A (ko
Inventor
도루 이토
히로아키 이시무라
아키토 고우치
하야토 와타나베
Original Assignee
가부시키가이샤 히다치 하이테크놀로지즈
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76229—Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
    • A—HUMAN NECESSITIES
    • A01—AGRICULTURE; FORESTRY; ANIMAL HUSBANDRY; HUNTING; TRAPPING; FISHING
    • A01G—HORTICULTURE; CULTIVATION OF VEGETABLES, FLOWERS, RICE, FRUIT, VINES, HOPS OR SEAWEED; FORESTRY; WATERING
    • A01G17/00—Cultivation of hops, vines, fruit trees, or like trees
    • A01G17/04—Supports for hops, vines, or trees
    • A01G17/10—Holders for boughs or branches
    • A—HUMAN NECESSITIES
    • A01—AGRICULTURE; FORESTRY; ANIMAL HUSBANDRY; HUNTING; TRAPPING; FISHING
    • A01G—HORTICULTURE; CULTIVATION OF VEGETABLES, FLOWERS, RICE, FRUIT, VINES, HOPS OR SEAWEED; FORESTRY; WATERING
    • A01G17/00—Cultivation of hops, vines, fruit trees, or like trees
    • A01G17/04—Supports for hops, vines, or trees
    • A01G17/06—Trellis-work
    • A01G17/08—Tools e.g. clips for attaching hops, vines, or boughs to trellis-work; Tying devices
    • A01G17/085—Espalier machines; Tying machines
    • A—HUMAN NECESSITIES
    • A01—AGRICULTURE; FORESTRY; ANIMAL HUSBANDRY; HUNTING; TRAPPING; FISHING
    • A01G—HORTICULTURE; CULTIVATION OF VEGETABLES, FLOWERS, RICE, FRUIT, VINES, HOPS OR SEAWEED; FORESTRY; WATERING
    • A01G9/00—Cultivation in receptacles, forcing-frames or greenhouses; Edging for beds, lawn or the like
    • A01G9/12—Supports for plants; Trellis for strawberries or the like
    • A01G9/128—Fixing of plants to supports, e.g. by means of clips
    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F16—ENGINEERING ELEMENTS AND UNITS; GENERAL MEASURES FOR PRODUCING AND MAINTAINING EFFECTIVE FUNCTIONING OF MACHINES OR INSTALLATIONS; THERMAL INSULATION IN GENERAL
    • F16B—DEVICES FOR FASTENING OR SECURING CONSTRUCTIONAL ELEMENTS OR MACHINE PARTS TOGETHER, e.g. NAILS, BOLTS, CIRCLIPS, CLAMPS, CLIPS OR WEDGES; JOINTS OR JOINTING
    • F16B7/00—Connections of rods or tubes, e.g. of non-circular section, mutually, including resilient connections
    • F16B7/04—Clamping or clipping connections
    • F16B7/0406—Clamping or clipping connections for rods or tubes being coaxial
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H01L21/30655—Plasma etching; Reactive-ion etching comprising alternated and repeated etching and passivation steps, e.g. Bosch process

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Environmental Sciences (AREA)
  • Botany (AREA)
  • General Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Element Separation (AREA)
KR20120007204A 2011-12-21 2012-01-25 플라즈마 처리 방법 Expired - Fee Related KR101312473B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2011279150A JP2013131587A (ja) 2011-12-21 2011-12-21 プラズマ処理方法
JPJP-P-2011-279150 2011-12-21

Publications (2)

Publication Number Publication Date
KR20130072105A KR20130072105A (ko) 2013-07-01
KR101312473B1 true KR101312473B1 (ko) 2013-09-27

Family

ID=48654960

Family Applications (1)

Application Number Title Priority Date Filing Date
KR20120007204A Expired - Fee Related KR101312473B1 (ko) 2011-12-21 2012-01-25 플라즈마 처리 방법

Country Status (4)

Country Link
US (1) US9018075B2 (enExample)
JP (1) JP2013131587A (enExample)
KR (1) KR101312473B1 (enExample)
TW (1) TWI466187B (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6095528B2 (ja) * 2013-09-04 2017-03-15 株式会社日立ハイテクノロジーズ プラズマ処理方法
EP3067919A1 (en) * 2015-03-11 2016-09-14 IMEC vzw Method for forming vertical structures in a semiconductor target layer
US9761459B2 (en) * 2015-08-05 2017-09-12 Lam Research Corporation Systems and methods for reverse pulsing
US9966312B2 (en) * 2015-08-25 2018-05-08 Tokyo Electron Limited Method for etching a silicon-containing substrate
US10204832B2 (en) 2016-09-21 2019-02-12 Tokyo Electron Limited Method of patterning intersecting structures
US10529671B2 (en) 2016-12-13 2020-01-07 Taiwan Semiconductor Manufacturing Co., Ltd. Package structure and method for forming the same
US20200135898A1 (en) * 2018-10-30 2020-04-30 International Business Machines Corporation Hard mask replenishment for etching processes
KR102409660B1 (ko) * 2019-07-18 2022-06-22 주식회사 히타치하이테크 플라스마 처리 장치
JP7667060B2 (ja) * 2021-10-22 2025-04-22 東京エレクトロン株式会社 プラズマ処理方法及びプラズマ処理システム
CN117769757A (zh) * 2022-07-25 2024-03-26 株式会社日立高新技术 等离子体处理方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20090003716A (ko) * 2007-07-03 2009-01-12 주식회사 하이닉스반도체 반도체 소자의 소자분리막 형성방법
KR100927691B1 (ko) * 2007-09-07 2009-11-18 가부시키가이샤 히다치 하이테크놀로지즈 Ｈｉｇｈ-ｋ막의 드라이 에칭방법

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3096008B2 (ja) * 1997-03-13 2000-10-10 ソニー株式会社 半導体装置の製造方法
JP4221859B2 (ja) * 1999-02-12 2009-02-12 株式会社デンソー 半導体装置の製造方法
EP1077475A3 (en) * 1999-08-11 2003-04-02 Applied Materials, Inc. Method of micromachining a multi-part cavity
JP2003007676A (ja) * 2001-06-18 2003-01-10 Sony Corp 半導体装置の製造方法
JP4854874B2 (ja) 2001-06-22 2012-01-18 東京エレクトロン株式会社 ドライエッチング方法
WO2008062600A1 (fr) * 2006-11-22 2008-05-29 Sumitomo Precision Products Co., Ltd. Structure de silicium à ouverture ayant un rapport hauteur/largeur élevé, procédé, appareil et programme de fabrication de cette structure et procédé de fabrication de masque de gravure pour cette structure de silicium
JP5229711B2 (ja) * 2006-12-25 2013-07-03 国立大学法人名古屋大学 パターン形成方法、および半導体装置の製造方法
US8435902B2 (en) * 2010-03-17 2013-05-07 Applied Materials, Inc. Invertable pattern loading with dry etch

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20090003716A (ko) * 2007-07-03 2009-01-12 주식회사 하이닉스반도체 반도체 소자의 소자분리막 형성방법
KR100927691B1 (ko) * 2007-09-07 2009-11-18 가부시키가이샤 히다치 하이테크놀로지즈 Ｈｉｇｈ-ｋ막의 드라이 에칭방법

Also Published As

Publication number Publication date
US9018075B2 (en) 2015-04-28
KR20130072105A (ko) 2013-07-01
TW201327661A (zh) 2013-07-01
TWI466187B (zh) 2014-12-21
JP2013131587A (ja) 2013-07-04
US20130164911A1 (en) 2013-06-27

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