KR101293845B1 - 지연 회로 - Google Patents

지연 회로 Download PDF

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Publication number
KR101293845B1
KR101293845B1 KR1020100003148A KR20100003148A KR101293845B1 KR 101293845 B1 KR101293845 B1 KR 101293845B1 KR 1020100003148 A KR1020100003148 A KR 1020100003148A KR 20100003148 A KR20100003148 A KR 20100003148A KR 101293845 B1 KR101293845 B1 KR 101293845B1
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KR
South Korea
Prior art keywords
delay circuit
input signal
internal
inverter
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020100003148A
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English (en)
Korean (ko)
Other versions
KR20100083738A (ko
Inventor
아츠시 이가라시
마사카즈 스기우라
Original Assignee
세이코 인스트루 가부시키가이샤
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Application filed by 세이코 인스트루 가부시키가이샤 filed Critical 세이코 인스트루 가부시키가이샤
Publication of KR20100083738A publication Critical patent/KR20100083738A/ko
Application granted granted Critical
Publication of KR101293845B1 publication Critical patent/KR101293845B1/ko
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/04—Shaping pulses by increasing duration; by decreasing duration
    • H03K5/06—Shaping pulses by increasing duration; by decreasing duration by the use of delay lines or other analogue delay elements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00078—Fixed delay
    • H03K2005/0013—Avoiding variations of delay due to power supply
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00078—Fixed delay
    • H03K2005/00136—Avoiding asymmetry of delay for leading or trailing edge; Avoiding variations of delay due to threshold

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
KR1020100003148A 2009-01-13 2010-01-13 지연 회로 Expired - Fee Related KR101293845B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2009-004271 2009-01-13
JP2009004271A JP2010166108A (ja) 2009-01-13 2009-01-13 遅延回路

Publications (2)

Publication Number Publication Date
KR20100083738A KR20100083738A (ko) 2010-07-22
KR101293845B1 true KR101293845B1 (ko) 2013-08-07

Family

ID=42318609

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020100003148A Expired - Fee Related KR101293845B1 (ko) 2009-01-13 2010-01-13 지연 회로

Country Status (5)

Country Link
US (1) US8063675B2 (enExample)
JP (1) JP2010166108A (enExample)
KR (1) KR101293845B1 (enExample)
CN (1) CN101867358B (enExample)
TW (1) TW201039557A (enExample)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120112660A1 (en) * 2010-11-05 2012-05-10 Himax Analogic, Inc. LED Circuit Having LED Driving Circuit with Smooth Transient Mechanism and Operation Method of the Same
US8487659B2 (en) * 2011-04-22 2013-07-16 Analog Devices, Inc. Comparator with adaptive timing
CN102270980A (zh) * 2011-06-28 2011-12-07 联合汽车电子有限公司 延时供电控制器
US8952740B2 (en) 2013-02-01 2015-02-10 Industrial Technology Research Institute Pulsed latching apparatus and method for generating pulse signal of pulsed latch thereof
JP6380827B2 (ja) * 2014-01-27 2018-08-29 富士電機株式会社 遅延回路
KR102290384B1 (ko) * 2015-02-16 2021-08-17 삼성전자주식회사 누설 전류 기반의 지연 회로
JP2017073700A (ja) * 2015-10-08 2017-04-13 富士通株式会社 クロック再生回路、光モジュール及びクロック再生方法
CN106936415B (zh) * 2015-12-31 2022-03-22 紫光同芯微电子有限公司 一种低功耗应用延时电路
JP2020004119A (ja) * 2018-06-28 2020-01-09 ルネサスエレクトロニクス株式会社 半導体装置およびそれを用いた制御システム
CN110471320A (zh) * 2019-09-23 2019-11-19 重庆工商大学 机器人急停控制电路
CN111124032B (zh) * 2019-12-20 2021-11-05 睿兴科技(南京)有限公司 抑制噪声干扰的滤波电路及微控制系统
CN113098463A (zh) * 2020-01-09 2021-07-09 长鑫存储技术有限公司 电源闸控电路及存储芯片
CN111884629B (zh) * 2020-06-17 2024-05-14 芯创智（北京）微电子有限公司 一种可控的高电源抑制比延迟单元
JP7018095B2 (ja) * 2020-07-07 2022-02-09 華邦電子股▲ふん▼有限公司 電源制御回路
US12316326B1 (en) * 2023-03-01 2025-05-27 Synopsys, Inc. Delay circuit

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03104413A (ja) * 1989-09-19 1991-05-01 Tdk Corp 遅延回路
KR920004904B1 (ko) * 1987-11-25 1992-06-22 가부시기이샤 도시바 지연회로
KR20050004113A (ko) * 2003-07-04 2005-01-12 가부시끼가이샤 도시바 지연 회로
KR20080029577A (ko) * 2006-09-29 2008-04-03 주식회사 하이닉스반도체 지연 회로

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06291626A (ja) * 1993-04-02 1994-10-18 Fujitsu Ltd パルス幅調整回路
US5532969A (en) * 1994-10-07 1996-07-02 International Business Machines Corporation Clocking circuit with increasing delay as supply voltage VDD
JPH08139573A (ja) * 1994-11-08 1996-05-31 Hitachi Ltd ワンショットパルス発生回路
JP3550868B2 (ja) * 1996-04-16 2004-08-04 株式会社日立製作所 可変遅延回路
JP3688392B2 (ja) * 1996-05-31 2005-08-24 三菱電機株式会社 波形整形装置およびクロック供給装置
US5748542A (en) * 1996-12-13 1998-05-05 Micron Technology, Inc. Circuit and method for providing a substantially constant time delay over a range of supply voltages
JP3144398B2 (ja) * 1998-10-27 2001-03-12 日本電気株式会社 可変遅延回路
JP4855748B2 (ja) 2005-09-28 2012-01-18 株式会社リコー 遅延回路及び遅延回路を使用した電源システム装置
JP2008092271A (ja) * 2006-10-02 2008-04-17 Mitsubishi Electric Corp 遅延回路

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR920004904B1 (ko) * 1987-11-25 1992-06-22 가부시기이샤 도시바 지연회로
JPH03104413A (ja) * 1989-09-19 1991-05-01 Tdk Corp 遅延回路
KR20050004113A (ko) * 2003-07-04 2005-01-12 가부시끼가이샤 도시바 지연 회로
KR20080029577A (ko) * 2006-09-29 2008-04-03 주식회사 하이닉스반도체 지연 회로

Also Published As

Publication number Publication date
CN101867358B (zh) 2015-07-01
KR20100083738A (ko) 2010-07-22
CN101867358A (zh) 2010-10-20
JP2010166108A (ja) 2010-07-29
US20100176854A1 (en) 2010-07-15
US8063675B2 (en) 2011-11-22
TW201039557A (en) 2010-11-01

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