KR101279270B1 - 반도체 장치의 제조 방법 - Google Patents

반도체 장치의 제조 방법 Download PDF

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Publication number
KR101279270B1
KR101279270B1 KR1020060095918A KR20060095918A KR101279270B1 KR 101279270 B1 KR101279270 B1 KR 101279270B1 KR 1020060095918 A KR1020060095918 A KR 1020060095918A KR 20060095918 A KR20060095918 A KR 20060095918A KR 101279270 B1 KR101279270 B1 KR 101279270B1
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South Korea
Prior art keywords
film
light
polarized light
resist
exposure
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Expired - Fee Related
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KR1020060095918A
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English (en)
Korean (ko)
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KR20070036725A (ko
Inventor
다케오 이시바시
Original Assignee
르네사스 일렉트로닉스 가부시키가이샤
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Publication of KR20070036725A publication Critical patent/KR20070036725A/ko
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    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70216Mask projection systems
    • G03F7/70341Details of immersion lithography aspects, e.g. exposure media or control of immersion liquid supply
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20Exposure; Apparatus therefor
    • G03F7/2041Exposure; Apparatus therefor in the presence of a fluid, e.g. immersion; using fluid cooling means
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7003Alignment type or strategy, e.g. leveling, global alignment
    • G03F9/7023Aligning or positioning in direction perpendicular to substrate surface
    • G03F9/7026Focusing
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7065Production of alignment light, e.g. light source, control of coherence, polarization, pulse length, wavelength
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/948Radiation resist
    • Y10S438/95Multilayer mask including nonradiation sensitive layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/948Radiation resist
    • Y10S438/952Utilizing antireflective layer

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  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
KR1020060095918A 2005-09-29 2006-09-29 반도체 장치의 제조 방법 Expired - Fee Related KR101279270B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2005285012 2005-09-29
JPJP-P-2005-00285012 2005-09-29
JPJP-P-2006-00247496 2006-09-13
JP2006247496A JP5224667B2 (ja) 2005-09-29 2006-09-13 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
KR20070036725A KR20070036725A (ko) 2007-04-03
KR101279270B1 true KR101279270B1 (ko) 2013-06-26

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KR1020060095918A Expired - Fee Related KR101279270B1 (ko) 2005-09-29 2006-09-29 반도체 장치의 제조 방법

Country Status (5)

Country Link
US (2) US7544619B2 (enExample)
JP (1) JP5224667B2 (enExample)
KR (1) KR101279270B1 (enExample)
CN (1) CN1983510B (enExample)
TW (1) TWI390596B (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007096089A (ja) * 2005-09-29 2007-04-12 Renesas Technology Corp 露光装置
JP5224667B2 (ja) * 2005-09-29 2013-07-03 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US7592265B2 (en) * 2007-01-04 2009-09-22 United Microelectronics Corp. Method of trimming a hard mask layer, method for fabricating a gate in a MOS transistor, and a stack for fabricating a gate in a MOS transistor
JP2009010196A (ja) * 2007-06-28 2009-01-15 Advanced Lcd Technologies Development Center Co Ltd レーザー結晶化方法及び結晶化装置
JP4452311B2 (ja) * 2007-08-30 2010-04-21 株式会社有沢製作所 反射防止膜形成用組成物、及び画像表示装置
NL1036018A1 (nl) * 2007-10-09 2009-04-15 Asml Netherlands Bv A method of optimizing a model, a method of measuring a property, a device manufacturing method, a spectrometer and a lithographic apparatus.
JP2009194196A (ja) * 2008-02-15 2009-08-27 Nec Electronics Corp 半導体装置の製造方法および半導体装置
FR2927708A1 (fr) * 2008-02-19 2009-08-21 Commissariat Energie Atomique Procede de photolithographie ultraviolette a immersion
US7883946B1 (en) 2008-05-08 2011-02-08 Altera Corporation Angled implantation for deep submicron device optimization
JP2009277903A (ja) * 2008-05-15 2009-11-26 Panasonic Corp 電子部品形成装置および電子部品
KR102870782B1 (ko) * 2019-08-06 2025-10-13 엘지전자 주식회사 디스플레이 장치의 제조 방법 및 디스플레이 장치 제조를 위한 전사 기판
CN120266057A (zh) * 2022-12-09 2025-07-04 Asml荷兰有限公司 利用集成的光子传感器确定用于对衬底成像的聚焦位置

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JPH05129182A (ja) * 1991-10-30 1993-05-25 Nikon Corp 面位置検出装置
JP2003303761A (ja) * 2002-04-11 2003-10-24 Matsushita Electric Ind Co Ltd パターン形成方法
JP2004273940A (ja) * 2003-03-11 2004-09-30 Semiconductor Leading Edge Technologies Inc パターン形成方法およびパターン形成装置

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JPS62140418A (ja) * 1985-12-16 1987-06-24 Canon Inc 面位置検知装置
US4846552A (en) * 1986-04-16 1989-07-11 The United States Of America As Represented By The Secretary Of The Air Force Method of fabricating high efficiency binary planar optical elements
US6094268A (en) * 1989-04-21 2000-07-25 Hitachi, Ltd. Projection exposure apparatus and projection exposure method
US5227862A (en) * 1989-04-21 1993-07-13 Hitachi, Ltd. Projection exposure apparatus and projection exposure method
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JP4265766B2 (ja) 2003-08-25 2009-05-20 東京応化工業株式会社 液浸露光プロセス用レジスト保護膜形成用材料、該保護膜形成材料からなるレジスト保護膜、および該レジスト保護膜を用いたレジストパターン形成方法
JPWO2005038885A1 (ja) * 2003-10-16 2007-02-01 株式会社ニコン 光学特性計測装置及び光学特性計測方法、露光装置及び露光方法、並びにデバイス製造方法
JP3984950B2 (ja) * 2003-11-12 2007-10-03 キヤノン株式会社 照明光学系及びそれを有する露光装置
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JP5224667B2 (ja) * 2005-09-29 2013-07-03 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2007096089A (ja) * 2005-09-29 2007-04-12 Renesas Technology Corp 露光装置

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Publication number Priority date Publication date Assignee Title
JPH05129182A (ja) * 1991-10-30 1993-05-25 Nikon Corp 面位置検出装置
JP2003303761A (ja) * 2002-04-11 2003-10-24 Matsushita Electric Ind Co Ltd パターン形成方法
JP2004273940A (ja) * 2003-03-11 2004-09-30 Semiconductor Leading Edge Technologies Inc パターン形成方法およびパターン形成装置

Also Published As

Publication number Publication date
TWI390596B (zh) 2013-03-21
US7935636B2 (en) 2011-05-03
KR20070036725A (ko) 2007-04-03
CN1983510B (zh) 2010-05-12
US7544619B2 (en) 2009-06-09
JP5224667B2 (ja) 2013-07-03
US20090227046A1 (en) 2009-09-10
US20070072351A1 (en) 2007-03-29
JP2007123842A (ja) 2007-05-17
TW200725697A (en) 2007-07-01
CN1983510A (zh) 2007-06-20

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Not in force date: 20160621

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000