TWI390596B - 半導體裝置之製造方法 - Google Patents
半導體裝置之製造方法 Download PDFInfo
- Publication number
- TWI390596B TWI390596B TW095135334A TW95135334A TWI390596B TW I390596 B TWI390596 B TW I390596B TW 095135334 A TW095135334 A TW 095135334A TW 95135334 A TW95135334 A TW 95135334A TW I390596 B TWI390596 B TW I390596B
- Authority
- TW
- Taiwan
- Prior art keywords
- film
- light
- polarized light
- exposure
- semiconductor device
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70216—Mask projection systems
- G03F7/70341—Details of immersion lithography aspects, e.g. exposure media or control of immersion liquid supply
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/20—Exposure; Apparatus therefor
- G03F7/2041—Exposure; Apparatus therefor in the presence of a fluid, e.g. immersion; using fluid cooling means
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
- G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
- G03F9/7003—Alignment type or strategy, e.g. leveling, global alignment
- G03F9/7023—Aligning or positioning in direction perpendicular to substrate surface
- G03F9/7026—Focusing
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
- G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
- G03F9/7065—Production of alignment light, e.g. light source, control of coherence, polarization, pulse length, wavelength
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
- H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/948—Radiation resist
- Y10S438/95—Multilayer mask including nonradiation sensitive layer
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/948—Radiation resist
- Y10S438/952—Utilizing antireflective layer
Landscapes
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005285012 | 2005-09-29 | ||
| JP2006247496A JP5224667B2 (ja) | 2005-09-29 | 2006-09-13 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200725697A TW200725697A (en) | 2007-07-01 |
| TWI390596B true TWI390596B (zh) | 2013-03-21 |
Family
ID=37894613
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW095135334A TWI390596B (zh) | 2005-09-29 | 2006-09-25 | 半導體裝置之製造方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US7544619B2 (enExample) |
| JP (1) | JP5224667B2 (enExample) |
| KR (1) | KR101279270B1 (enExample) |
| CN (1) | CN1983510B (enExample) |
| TW (1) | TWI390596B (enExample) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007096089A (ja) * | 2005-09-29 | 2007-04-12 | Renesas Technology Corp | 露光装置 |
| JP5224667B2 (ja) * | 2005-09-29 | 2013-07-03 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
| US7592265B2 (en) * | 2007-01-04 | 2009-09-22 | United Microelectronics Corp. | Method of trimming a hard mask layer, method for fabricating a gate in a MOS transistor, and a stack for fabricating a gate in a MOS transistor |
| JP2009010196A (ja) * | 2007-06-28 | 2009-01-15 | Advanced Lcd Technologies Development Center Co Ltd | レーザー結晶化方法及び結晶化装置 |
| JP4452311B2 (ja) * | 2007-08-30 | 2010-04-21 | 株式会社有沢製作所 | 反射防止膜形成用組成物、及び画像表示装置 |
| NL1036018A1 (nl) * | 2007-10-09 | 2009-04-15 | Asml Netherlands Bv | A method of optimizing a model, a method of measuring a property, a device manufacturing method, a spectrometer and a lithographic apparatus. |
| JP2009194196A (ja) * | 2008-02-15 | 2009-08-27 | Nec Electronics Corp | 半導体装置の製造方法および半導体装置 |
| FR2927708A1 (fr) * | 2008-02-19 | 2009-08-21 | Commissariat Energie Atomique | Procede de photolithographie ultraviolette a immersion |
| US7883946B1 (en) | 2008-05-08 | 2011-02-08 | Altera Corporation | Angled implantation for deep submicron device optimization |
| JP2009277903A (ja) * | 2008-05-15 | 2009-11-26 | Panasonic Corp | 電子部品形成装置および電子部品 |
| KR102870782B1 (ko) * | 2019-08-06 | 2025-10-13 | 엘지전자 주식회사 | 디스플레이 장치의 제조 방법 및 디스플레이 장치 제조를 위한 전사 기판 |
| CN120266057A (zh) * | 2022-12-09 | 2025-07-04 | Asml荷兰有限公司 | 利用集成的光子传感器确定用于对衬底成像的聚焦位置 |
Family Cites Families (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62140418A (ja) * | 1985-12-16 | 1987-06-24 | Canon Inc | 面位置検知装置 |
| US4846552A (en) * | 1986-04-16 | 1989-07-11 | The United States Of America As Represented By The Secretary Of The Air Force | Method of fabricating high efficiency binary planar optical elements |
| US6094268A (en) * | 1989-04-21 | 2000-07-25 | Hitachi, Ltd. | Projection exposure apparatus and projection exposure method |
| US5227862A (en) * | 1989-04-21 | 1993-07-13 | Hitachi, Ltd. | Projection exposure apparatus and projection exposure method |
| US5298365A (en) * | 1990-03-20 | 1994-03-29 | Hitachi, Ltd. | Process for fabricating semiconductor integrated circuit device, and exposing system and mask inspecting method to be used in the process |
| US5539514A (en) * | 1991-06-26 | 1996-07-23 | Hitachi, Ltd. | Foreign particle inspection apparatus and method with front and back illumination |
| JP2924344B2 (ja) * | 1991-08-09 | 1999-07-26 | キヤノン株式会社 | 投影露光装置 |
| JP3204406B2 (ja) * | 1991-10-30 | 2001-09-04 | 株式会社ニコン | 面位置検出方法及び装置、半導体露光装置、並びに前記方法を用いた露光方法 |
| JP3303436B2 (ja) * | 1993-05-14 | 2002-07-22 | キヤノン株式会社 | 投影露光装置及び半導体素子の製造方法 |
| US5677757A (en) * | 1994-03-29 | 1997-10-14 | Nikon Corporation | Projection exposure apparatus |
| KR0153796B1 (ko) * | 1993-09-24 | 1998-11-16 | 사토 후미오 | 노광장치 및 노광방법 |
| KR950033689A (ko) * | 1994-03-02 | 1995-12-26 | 오노 시게오 | 노광장치 및 이를 이용한 회로패턴 형성방법 |
| US5783833A (en) * | 1994-12-12 | 1998-07-21 | Nikon Corporation | Method and apparatus for alignment with a substrate, using coma imparting optics |
| JPH0936017A (ja) * | 1995-07-20 | 1997-02-07 | Hitachi Ltd | パタン形成方法及びそれを用いた半導体素子の製造方法 |
| US6594012B2 (en) * | 1996-07-05 | 2003-07-15 | Canon Kabushiki Kaisha | Exposure apparatus |
| JP3618907B2 (ja) * | 1996-07-05 | 2005-02-09 | キヤノン株式会社 | パターン形成状態検出装置、及びこれを用いた投影露光装置 |
| JPH1070064A (ja) * | 1996-08-27 | 1998-03-10 | Nikon Corp | 投影露光装置 |
| JPH10284402A (ja) * | 1997-04-03 | 1998-10-23 | Canon Inc | パターン位置情報検出装置及びそれを用いた投影露光装置 |
| DE10080898T1 (de) | 1999-03-29 | 2001-06-28 | Nikon Corp | Mehrschicht-Antireflexionsfilm, optisches Element und Reduktionsprojektionsbelichtungsapparat |
| US7127098B2 (en) * | 2001-09-13 | 2006-10-24 | Hitachi, Ltd. | Image detection method and its apparatus and defect detection method and its apparatus |
| JP3605064B2 (ja) * | 2001-10-15 | 2004-12-22 | 株式会社ルネサステクノロジ | フォーカスモニタ用フォトマスク、フォーカスモニタ方法、フォーカスモニタ用装置および装置の製造方法 |
| JP2003303761A (ja) * | 2002-04-11 | 2003-10-24 | Matsushita Electric Ind Co Ltd | パターン形成方法 |
| JP2004301825A (ja) * | 2002-12-10 | 2004-10-28 | Nikon Corp | 面位置検出装置、露光方法、及びデバイス製造方法 |
| JP3997199B2 (ja) | 2002-12-10 | 2007-10-24 | キヤノン株式会社 | 露光方法及び装置 |
| JP2004273940A (ja) * | 2003-03-11 | 2004-09-30 | Semiconductor Leading Edge Technologies Inc | パターン形成方法およびパターン形成装置 |
| JP4265766B2 (ja) | 2003-08-25 | 2009-05-20 | 東京応化工業株式会社 | 液浸露光プロセス用レジスト保護膜形成用材料、該保護膜形成材料からなるレジスト保護膜、および該レジスト保護膜を用いたレジストパターン形成方法 |
| JPWO2005038885A1 (ja) * | 2003-10-16 | 2007-02-01 | 株式会社ニコン | 光学特性計測装置及び光学特性計測方法、露光装置及び露光方法、並びにデバイス製造方法 |
| JP3984950B2 (ja) * | 2003-11-12 | 2007-10-03 | キヤノン株式会社 | 照明光学系及びそれを有する露光装置 |
| US7265364B2 (en) * | 2004-06-10 | 2007-09-04 | Asml Netherlands B.V. | Level sensor for lithographic apparatus |
| KR101193830B1 (ko) * | 2004-08-09 | 2012-10-23 | 가부시키가이샤 니콘 | 광학 특성 계측 장치 및 광학 특성 계측 방법, 노광 장치및 노광 방법, 그리고 디바이스 제조 방법 |
| JP5224667B2 (ja) * | 2005-09-29 | 2013-07-03 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
| JP2007096089A (ja) * | 2005-09-29 | 2007-04-12 | Renesas Technology Corp | 露光装置 |
-
2006
- 2006-09-13 JP JP2006247496A patent/JP5224667B2/ja not_active Expired - Fee Related
- 2006-09-25 TW TW095135334A patent/TWI390596B/zh not_active IP Right Cessation
- 2006-09-26 US US11/535,273 patent/US7544619B2/en not_active Expired - Fee Related
- 2006-09-29 CN CN2006100639468A patent/CN1983510B/zh not_active Expired - Fee Related
- 2006-09-29 KR KR1020060095918A patent/KR101279270B1/ko not_active Expired - Fee Related
-
2009
- 2009-05-15 US US12/466,549 patent/US7935636B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| KR101279270B1 (ko) | 2013-06-26 |
| US7935636B2 (en) | 2011-05-03 |
| KR20070036725A (ko) | 2007-04-03 |
| CN1983510B (zh) | 2010-05-12 |
| US7544619B2 (en) | 2009-06-09 |
| JP5224667B2 (ja) | 2013-07-03 |
| US20090227046A1 (en) | 2009-09-10 |
| US20070072351A1 (en) | 2007-03-29 |
| JP2007123842A (ja) | 2007-05-17 |
| TW200725697A (en) | 2007-07-01 |
| CN1983510A (zh) | 2007-06-20 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |