KR101133697B1 - 반도체소자 가공방법 - Google Patents

반도체소자 가공방법 Download PDF

Info

Publication number
KR101133697B1
KR101133697B1 KR1020100007842A KR20100007842A KR101133697B1 KR 101133697 B1 KR101133697 B1 KR 101133697B1 KR 1020100007842 A KR1020100007842 A KR 1020100007842A KR 20100007842 A KR20100007842 A KR 20100007842A KR 101133697 B1 KR101133697 B1 KR 101133697B1
Authority
KR
South Korea
Prior art keywords
film
dry etching
wet etching
etching
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020100007842A
Other languages
English (en)
Korean (ko)
Other versions
KR20110049619A (ko
Inventor
데츠오 오노
데츠 모로오카
Original Assignee
가부시키가이샤 히다치 하이테크놀로지즈
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시키가이샤 히다치 하이테크놀로지즈 filed Critical 가부시키가이샤 히다치 하이테크놀로지즈
Publication of KR20110049619A publication Critical patent/KR20110049619A/ko
Application granted granted Critical
Publication of KR101133697B1 publication Critical patent/KR101133697B1/ko
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01326—Aspects related to lithography, isolation or planarisation of the conductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/665—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of elemental metal contacting the insulator, e.g. tungsten or molybdenum
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H10P50/285—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means of materials not containing Si, e.g. PZT or Al2O3
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0402—Apparatus for fluid treatment
    • H10P72/0418—Apparatus for fluid treatment for etching
    • H10P72/0421—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0402—Apparatus for fluid treatment
    • H10P72/0418—Apparatus for fluid treatment for etching
    • H10P72/0422—Apparatus for fluid treatment for etching for wet etching

Landscapes

  • Drying Of Semiconductors (AREA)
  • Weting (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
KR1020100007842A 2009-11-05 2010-01-28 반도체소자 가공방법 Expired - Fee Related KR101133697B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2009253910A JP2011100822A (ja) 2009-11-05 2009-11-05 半導体素子加工方法
JPJP-P-2009-253910 2009-11-05

Publications (2)

Publication Number Publication Date
KR20110049619A KR20110049619A (ko) 2011-05-12
KR101133697B1 true KR101133697B1 (ko) 2012-04-06

Family

ID=43925879

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020100007842A Expired - Fee Related KR101133697B1 (ko) 2009-11-05 2010-01-28 반도체소자 가공방법

Country Status (4)

Country Link
US (1) US8501608B2 (https=)
JP (1) JP2011100822A (https=)
KR (1) KR101133697B1 (https=)
TW (1) TW201117291A (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104053626B (zh) * 2011-10-28 2017-06-30 意法半导体股份有限公司 用于制造针对氢氟酸蚀刻的保护层的方法、设置有该保护层的半导体器件及制造该半导体器件的方法
JP6163446B2 (ja) * 2014-03-27 2017-07-12 株式会社東芝 半導体装置の製造方法
IT202100022511A1 (it) 2021-08-30 2023-03-02 St Microelectronics Srl Procedimento di fabbricazione di un sistema integrato includente un sensore di pressione capacitivo e un sensore inerziale, e sistema integrato

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100747671B1 (ko) * 1999-02-25 2007-08-08 소니 가부시끼 가이샤 드라이 에칭 방법 및 반도체 장치의 제조 방법
KR20080018711A (ko) * 2006-08-25 2008-02-28 삼성전자주식회사 반도체 소자 및 그 제조 방법

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6800326B1 (en) * 1997-01-14 2004-10-05 Seiko Epson Corporation Method of treating a surface of a surface of a substrate containing titanium for an ornament
US6245684B1 (en) * 1998-03-13 2001-06-12 Applied Materials, Inc. Method of obtaining a rounded top trench corner for semiconductor trench etch applications
JP4152271B2 (ja) 2003-07-24 2008-09-17 Ｎｅｃエレクトロニクス株式会社 半導体装置の製造方法
WO2005013374A1 (ja) * 2003-08-05 2005-02-10 Fujitsu Limited 半導体装置および半導体装置の製造方法
US20050081781A1 (en) * 2003-10-17 2005-04-21 Taiwan Semiconductor Manufacturing Co. Fully dry, Si recess free process for removing high k dielectric layer
US20050260804A1 (en) * 2004-05-24 2005-11-24 Tae-Wook Kang Semiconductor device and method of fabricating the same
JP2007115732A (ja) * 2005-10-18 2007-05-10 Renesas Technology Corp エッチング液およびそれを用いた半導体装置の製造方法
US7820552B2 (en) * 2007-03-13 2010-10-26 International Business Machines Corporation Advanced high-k gate stack patterning and structure containing a patterned high-k gate stack
JP5329294B2 (ja) * 2009-04-30 2013-10-30 ルネサスエレクトロニクス株式会社 半導体装置の製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100747671B1 (ko) * 1999-02-25 2007-08-08 소니 가부시끼 가이샤 드라이 에칭 방법 및 반도체 장치의 제조 방법
KR20080018711A (ko) * 2006-08-25 2008-02-28 삼성전자주식회사 반도체 소자 및 그 제조 방법

Also Published As

Publication number Publication date
JP2011100822A (ja) 2011-05-19
US20110104882A1 (en) 2011-05-05
TW201117291A (en) 2011-05-16
KR20110049619A (ko) 2011-05-12
US8501608B2 (en) 2013-08-06

Similar Documents

Publication Publication Date Title
TWI458008B (zh) 用於蝕刻半導體結構之具有脈衝樣品偏壓的脈衝電漿系統
US9960031B2 (en) Plasma processing apparatus and plasma processing method
US9570317B2 (en) Microelectronic method for etching a layer
CN108573866B (zh) 氧化膜去除方法和装置以及接触部形成方法和系统
US9960049B2 (en) Two-step fluorine radical etch of hafnium oxide
US11239090B2 (en) Plasma processing method and plasma processing apparatus
KR20150109401A (ko) 실리콘 질화물 유전체 필름을 패터닝하는 방법
US20060054279A1 (en) Apparatus for the optimization of atmospheric plasma in a processing system
TWI833930B (zh) 乾式蝕刻方法及半導體裝置之製造方法
JP2007005381A (ja) プラズマエッチング方法、及びプラズマエッチング装置
JP5042162B2 (ja) 半導体加工方法
JP7549437B2 (ja) 化合物材料を乾式エッチングするための方法
JP5547878B2 (ja) 半導体加工方法
US9966312B2 (en) Method for etching a silicon-containing substrate
KR101133697B1 (ko) 반도체소자 가공방법
JP2009059805A (ja) 半導体素子加工方法
KR20180032153A (ko) 플라스마 처리 방법
JP5642427B2 (ja) プラズマ処理方法
CN105810579A (zh) 蚀刻方法
CN117672846A (zh) 一种功率器件的制作方法
JP2005086080A (ja) 半導体装置の製造方法
US20140256143A1 (en) Method for Hard Mask Loop with Defect Reduction
JP2014131086A (ja) プラズマ処理方法

Legal Events

Date Code Title Description
A201 Request for examination
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

AMND Amendment
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E601 Decision to refuse application
PE0601 Decision on rejection of patent

St.27 status event code: N-2-6-B10-B15-exm-PE0601

AMND Amendment
E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PX0901 Re-examination

St.27 status event code: A-2-3-E10-E12-rex-PX0901

PX0701 Decision of registration after re-examination

St.27 status event code: A-3-4-F10-F13-rex-PX0701

X701 Decision to grant (after re-examination)
GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20150330

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20150330

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000