KR101106832B1 - 스트레인 완화 범프 설계를 구비한 반도체 장치 - Google Patents

스트레인 완화 범프 설계를 구비한 반도체 장치 Download PDF

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Publication number
KR101106832B1
KR101106832B1 KR1020067002029A KR20067002029A KR101106832B1 KR 101106832 B1 KR101106832 B1 KR 101106832B1 KR 1020067002029 A KR1020067002029 A KR 1020067002029A KR 20067002029 A KR20067002029 A KR 20067002029A KR 101106832 B1 KR101106832 B1 KR 101106832B1
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passivation layer
layer
redistribution conductor
redistribution
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KR20060054382A (ko
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제임스 전-호 왕
진-욱 장
알프레도 멘도자
라자시 룬톤
러셀 숨웨이
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프리스케일 세미컨덕터, 인크.
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
KR1020067002029A 2003-07-31 2004-07-13 스트레인 완화 범프 설계를 구비한 반도체 장치 Expired - Fee Related KR101106832B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/631,102 US6790759B1 (en) 2003-07-31 2003-07-31 Semiconductor device with strain relieving bump design
US10/631,102 2003-07-31
PCT/US2004/022433 WO2005013319A2 (en) 2003-07-31 2004-07-13 Semiconductor device with strain relieving bump design

Publications (2)

Publication Number Publication Date
KR20060054382A KR20060054382A (ko) 2006-05-22
KR101106832B1 true KR101106832B1 (ko) 2012-01-19

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KR1020067002029A Expired - Fee Related KR101106832B1 (ko) 2003-07-31 2004-07-13 스트레인 완화 범프 설계를 구비한 반도체 장치

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Country Link
US (2) US6790759B1 (enExample)
JP (1) JP2007502530A (enExample)
KR (1) KR101106832B1 (enExample)
CN (1) CN1926674A (enExample)
TW (1) TWI354362B (enExample)
WO (1) WO2005013319A2 (enExample)

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TWI260078B (en) * 2003-08-21 2006-08-11 Advanced Semiconductor Eng Chip structure
US7425759B1 (en) * 2003-11-20 2008-09-16 Bridge Semiconductor Corporation Semiconductor chip assembly with bumped terminal and filler
DE102004035080A1 (de) * 2004-05-27 2005-12-29 Infineon Technologies Ag Anordnung zur Verringerung des elektrischen Übersprechens auf einem Chip
US7423346B2 (en) * 2004-09-09 2008-09-09 Megica Corporation Post passivation interconnection process and structures
US7394158B2 (en) * 2004-10-21 2008-07-01 Siliconix Technology C.V. Solderable top metal for SiC device
US7812441B2 (en) 2004-10-21 2010-10-12 Siliconix Technology C.V. Schottky diode with improved surge capability
US7834376B2 (en) 2005-03-04 2010-11-16 Siliconix Technology C. V. Power semiconductor switch
US9419092B2 (en) * 2005-03-04 2016-08-16 Vishay-Siliconix Termination for SiC trench devices
JP2006303452A (ja) * 2005-03-25 2006-11-02 Sanyo Electric Co Ltd 半導体装置及びその製造方法
US20060264021A1 (en) * 2005-05-17 2006-11-23 Intel Corporation Offset solder bump method and apparatus
US7319043B2 (en) 2005-09-26 2008-01-15 Advanced Chip Engineering Technology Inc. Method and system of trace pull test
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