KR101019931B1 - 낮은 유전상수 물질에 대한 인-시튜 후면 폴리머 제거를 포함하는 플라즈마 유전체 식각 프로세스 - Google Patents

낮은 유전상수 물질에 대한 인-시튜 후면 폴리머 제거를 포함하는 플라즈마 유전체 식각 프로세스 Download PDF

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KR101019931B1
KR101019931B1 KR1020087025399A KR20087025399A KR101019931B1 KR 101019931 B1 KR101019931 B1 KR 101019931B1 KR 1020087025399 A KR1020087025399 A KR 1020087025399A KR 20087025399 A KR20087025399 A KR 20087025399A KR 101019931 B1 KR101019931 B1 KR 101019931B1
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polymer
flow rate
backside
process gas
semiconductor material
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Korean (ko)
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KR20080106474A (ko
Inventor
게라르도 에이. 델가디노
리차드 하그보르그
더글라스 에이. 주니어 부치버거
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어플라이드 머티어리얼스, 인코포레이티드
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02082—Cleaning product to be cleaned
    • H01L21/0209—Cleaning of wafer backside
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
KR1020087025399A 2006-03-22 2007-03-14 낮은 유전상수 물질에 대한 인-시튜 후면 폴리머 제거를 포함하는 플라즈마 유전체 식각 프로세스 Expired - Fee Related KR101019931B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/386,428 US7432209B2 (en) 2006-03-22 2006-03-22 Plasma dielectric etch process including in-situ backside polymer removal for low-dielectric constant material
US11/386,428 2006-03-22

Publications (2)

Publication Number Publication Date
KR20080106474A KR20080106474A (ko) 2008-12-05
KR101019931B1 true KR101019931B1 (ko) 2011-03-08

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KR1020087025399A Expired - Fee Related KR101019931B1 (ko) 2006-03-22 2007-03-14 낮은 유전상수 물질에 대한 인-시튜 후면 폴리머 제거를 포함하는 플라즈마 유전체 식각 프로세스

Country Status (7)

Country Link
US (1) US7432209B2 (enExample)
EP (1) EP1997127A4 (enExample)
JP (1) JP2009530851A (enExample)
KR (1) KR101019931B1 (enExample)
CN (1) CN101536155B (enExample)
TW (1) TW200741861A (enExample)
WO (1) WO2007111837A2 (enExample)

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US8129281B1 (en) 2005-05-12 2012-03-06 Novellus Systems, Inc. Plasma based photoresist removal system for cleaning post ash residue
CN1978351A (zh) * 2005-12-02 2007-06-13 鸿富锦精密工业（深圳）有限公司 一种模仁保护膜的去除装置及方法
US7740768B1 (en) * 2006-10-12 2010-06-22 Novellus Systems, Inc. Simultaneous front side ash and backside clean
JP4755963B2 (ja) * 2006-10-30 2011-08-24 株式会社東芝 半導体装置の製造方法
US20080141509A1 (en) * 2006-12-19 2008-06-19 Tokyo Electron Limited Substrate processing system, substrate processing method, and storage medium
US8083963B2 (en) * 2007-02-08 2011-12-27 Applied Materials, Inc. Removal of process residues on the backside of a substrate
US8435895B2 (en) 2007-04-04 2013-05-07 Novellus Systems, Inc. Methods for stripping photoresist and/or cleaning metal regions
US9732416B1 (en) 2007-04-18 2017-08-15 Novellus Systems, Inc. Wafer chuck with aerodynamic design for turbulence reduction
US20080260946A1 (en) * 2007-04-20 2008-10-23 United Microelectronics Corp. Clean method for vapor deposition process
US8329593B2 (en) * 2007-12-12 2012-12-11 Applied Materials, Inc. Method and apparatus for removing polymer from the wafer backside and edge
US8419964B2 (en) 2008-08-27 2013-04-16 Novellus Systems, Inc. Apparatus and method for edge bevel removal of copper from silicon wafers
US8591661B2 (en) * 2009-12-11 2013-11-26 Novellus Systems, Inc. Low damage photoresist strip method for low-K dielectrics
US8094428B2 (en) * 2008-10-27 2012-01-10 Hermes-Microvision, Inc. Wafer grounding methodology
CN102064106B (zh) * 2009-11-18 2013-04-17 无锡华润上华半导体有限公司 孔刻蚀中预去除聚合物的方法
JP5770740B2 (ja) 2009-12-11 2015-08-26 ノベラス・システムズ・インコーポレーテッドＮｏｖｅｌｌｕｓ Ｓｙｓｔｅｍｓ Ｉｎｃｏｒｐｏｒａｔｅｄ 高ドーズインプラントストリップの前に行われる、シリコンを保護するためのパッシベーションプロセスの改善方法およびそのための装置
US20110143548A1 (en) 2009-12-11 2011-06-16 David Cheung Ultra low silicon loss high dose implant strip
KR101131740B1 (ko) * 2011-06-20 2012-04-05 주식회사 테라텍 원격 플라즈마 발생장치를 이용한 웨이퍼 뒷면 건식 식각 방법
US9613825B2 (en) 2011-08-26 2017-04-04 Novellus Systems, Inc. Photoresist strip processes for improved device integrity
KR101276318B1 (ko) * 2011-10-12 2013-06-18 주식회사 테라텍 원격 플라즈마 발생장치를 이용한 웨이퍼 뒷면 건식 식각 방법
US9881788B2 (en) 2014-05-22 2018-01-30 Lam Research Corporation Back side deposition apparatus and applications
US9514954B2 (en) 2014-06-10 2016-12-06 Lam Research Corporation Peroxide-vapor treatment for enhancing photoresist-strip performance and modifying organic films
CN106920727B (zh) * 2015-12-24 2018-04-20 中微半导体设备(上海)有限公司 等离子体处理装置及其清洗方法
KR102528559B1 (ko) 2016-07-26 2023-05-04 삼성전자주식회사 대면적 기판 제조 장치
CN111341657A (zh) * 2018-12-19 2020-06-26 夏泰鑫半导体(青岛)有限公司 等离子体处理方法
CN109727857B (zh) * 2018-12-29 2021-06-15 上海华力集成电路制造有限公司 干法刻蚀方法
JP2023509451A (ja) 2020-01-03 2023-03-08 ラム リサーチ コーポレーション 裏面反り補償堆積のステーション間制御
JP7645891B2 (ja) 2020-01-30 2025-03-14 ラム リサーチ コーポレーション 局所応力調整のためのｕｖ硬化
CN113031409B (zh) * 2021-03-03 2024-12-31 苏州子山半导体科技有限公司 一种氧化钒热成像芯片制造中的聚酰亚胺光刻胶去除方法

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Also Published As

Publication number Publication date
TW200741861A (en) 2007-11-01
KR20080106474A (ko) 2008-12-05
WO2007111837A2 (en) 2007-10-04
US20070224826A1 (en) 2007-09-27
US7432209B2 (en) 2008-10-07
CN101536155A (zh) 2009-09-16
EP1997127A4 (en) 2010-06-02
CN101536155B (zh) 2012-03-21
WO2007111837A3 (en) 2008-10-09
JP2009530851A (ja) 2009-08-27
EP1997127A2 (en) 2008-12-03

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