KR101019697B1 - 반도체 소자의 제조방법 - Google Patents
반도체 소자의 제조방법 Download PDFInfo
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- KR101019697B1 KR101019697B1 KR1020040049477A KR20040049477A KR101019697B1 KR 101019697 B1 KR101019697 B1 KR 101019697B1 KR 1020040049477 A KR1020040049477 A KR 1020040049477A KR 20040049477 A KR20040049477 A KR 20040049477A KR 101019697 B1 KR101019697 B1 KR 101019697B1
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- Prior art keywords
- photoresist pattern
- film
- gate
- hard mask
- nitride film
- Prior art date
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- 238000000034 method Methods 0.000 title claims abstract description 5
- 239000004065 semiconductor Substances 0.000 title abstract description 9
- 238000004519 manufacturing process Methods 0.000 title abstract description 8
- 150000004767 nitrides Chemical class 0.000 claims abstract description 48
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 33
- 229920005591 polysilicon Polymers 0.000 claims abstract description 33
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 29
- 239000000758 substrate Substances 0.000 claims abstract description 28
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 17
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 17
- 239000010703 silicon Substances 0.000 claims abstract description 17
- 238000005530 etching Methods 0.000 claims abstract description 14
- 230000004888 barrier function Effects 0.000 claims abstract description 13
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 5
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims description 6
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims description 3
- 238000007796 conventional method Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/2807—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being Si or Ge or C and their alloys except Si
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02362—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment formation of intermediate layers, e.g. capping layers or diffusion barriers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
Claims (2)
- 실리콘 기판 상에 게이트 산화막을 형성하는 단계;상기 게이트 산화막 상에 캡핑 질화막을 형성하는 단계;상기 캡핑 질화막 상에 게이트 형성 영역을 노출시키는 제1감광막 패턴을 형성하는 단계;상기 제1감광막 패턴을 식각장벽으로 이용해서 캡핑 질화막을 식각하는 단계;상기 제1감광막 패턴을 제거하는 단계;상기 기판 결과물 전면 상에 게이트 폴리실리콘막과 하드마스크 질화막을 차례로 형성하는 단계상기 하드마스크 질화막 상에 게이트 영역을 한정하는 제2감광막 패턴을 형성하는 단계;상기 제2감광막 패턴을 식각장벽으로 이용하면서 캡핑 질화막이 노출되도록 하드마스크 질화막 및 게이트 폴리실리콘막을 식각하는 단계;상기 제2감광막 패턴을 제거하는 단계; 및상기 하드마스크 질화막과 캡핑 질화막을 동시에 제거하는 단계를 포함하는 것을 특징으로 하는 반도체 소자의 제조방법.
- 제 1 항에 있어서, 상기 하드마스크 질화막과 캡핑 질화막을 제거하는 단계 는 인산(H3PO4) 용액을 사용하여 수행하는 것을 특징으로 하는 반도체 소자의 제조방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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KR1020040049477A KR101019697B1 (ko) | 2004-06-29 | 2004-06-29 | 반도체 소자의 제조방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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KR1020040049477A KR101019697B1 (ko) | 2004-06-29 | 2004-06-29 | 반도체 소자의 제조방법 |
Publications (2)
Publication Number | Publication Date |
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KR20060000565A KR20060000565A (ko) | 2006-01-06 |
KR101019697B1 true KR101019697B1 (ko) | 2011-03-07 |
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Application Number | Title | Priority Date | Filing Date |
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KR1020040049477A KR101019697B1 (ko) | 2004-06-29 | 2004-06-29 | 반도체 소자의 제조방법 |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20000045304A (ko) * | 1998-12-30 | 2000-07-15 | 김영환 | 반도체 소자의 게이트 전극 형성방법 |
KR20010084672A (ko) * | 2000-02-28 | 2001-09-06 | 윤종용 | 감광막 패턴을 사용하는 자기정렬 콘택 형성방법 |
KR20030059950A (ko) * | 2002-01-04 | 2003-07-12 | 삼성전자주식회사 | 스플릿 게이트 플래쉬 메모리 소자의 제조방법 |
KR20040002189A (ko) * | 2002-06-29 | 2004-01-07 | 주식회사 하이닉스반도체 | 반도체 소자의 게이트 형성 방법 |
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2004
- 2004-06-29 KR KR1020040049477A patent/KR101019697B1/ko active IP Right Grant
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20000045304A (ko) * | 1998-12-30 | 2000-07-15 | 김영환 | 반도체 소자의 게이트 전극 형성방법 |
KR20010084672A (ko) * | 2000-02-28 | 2001-09-06 | 윤종용 | 감광막 패턴을 사용하는 자기정렬 콘택 형성방법 |
KR20030059950A (ko) * | 2002-01-04 | 2003-07-12 | 삼성전자주식회사 | 스플릿 게이트 플래쉬 메모리 소자의 제조방법 |
KR20040002189A (ko) * | 2002-06-29 | 2004-01-07 | 주식회사 하이닉스반도체 | 반도체 소자의 게이트 형성 방법 |
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Publication number | Publication date |
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KR20060000565A (ko) | 2006-01-06 |
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