KR100966686B1 - Device with board abnormality detecting circuit - Google Patents

Abstract

It is possible to reliably detect and prevent incorrect mounting of the DSA and poor connection of the connector in the semiconductor test apparatus. Motherboard 20 having a set of DSAs 10a and 10b mounted with a socket board 11 and a connector to which the connectors 14 of each socket board 11 of the set of DSAs 10a and 10b are connected. (1) A semiconductor test apparatus having a), each of which is provided in a set of DSAs 10a and 10b, for setting an ID number assigned to the DSAs 10a and 10b, and outputting an ID signal indicating the ID number. Input the board, the ID signal output from the ID setting board, the matching circuit which detects the mismatch of the ID signal, and the signal from one of the connectors 21 on the motherboard 20 side, A daisy chain circuit is provided which sequentially transmits signals to all the connectors 21 and 14 via the connector 14 on the DSA side and detects the presence or absence of an output signal.

Daisy Chain Circuit, DSA, ID Match Circuit, Socket Board, Motherboard, Connector

Description

DEVICE WITH BOARD ABNORMALITY DETECTING CIRCUIT}

1 is an exploded perspective view showing a semiconductor test apparatus having a substrate abnormality detection circuit according to an embodiment of the present invention.

2 is a diagram showing a semiconductor test apparatus having a substrate abnormality detection circuit according to an embodiment of the present invention, where (a) is a front view of a state in which the DSA is removed from the motherboard side, and (b) is (a) Bottom view of the DSA shown in.

3 is a cross-sectional front view of principal parts conceptually showing a board for setting ID and a board for contact pins in a semiconductor test apparatus having a substrate abnormality detection circuit according to an embodiment of the present invention;

4 is a block diagram conceptually showing an ID setting board and an ID matching circuit in a semiconductor test apparatus having a substrate abnormality detection circuit according to an embodiment of the present invention.

Fig. 5 is a circuit diagram showing details of an ID matching circuit in a semiconductor test apparatus having a substrate abnormality detection circuit according to an embodiment of the present invention.

6 is an explanatory diagram conceptually showing a daisy chain circuit in a semiconductor test apparatus having a substrate abnormality detection circuit according to an embodiment of the present invention.

7 is a block diagram conceptually illustrating a utility board in a semiconductor test apparatus having a substrate abnormality detection circuit according to an embodiment of the present invention;

8 is an explanatory diagram conceptually showing a semiconductor test apparatus proposed by the present applicant in Japanese Patent Application No. 2002-047186, (a) is a front view of a state in which the DSA is removed from the motherboard side, and (b) is ( Bottom view of the DSA shown in a).

TECHNICAL FIELD This invention relates to the apparatus which operates by connecting the board | substrate with 1 or 2 or more connectors to the corresponding counterpart board | substrate, for example like a semiconductor test apparatus for testing a semiconductor component.

Particularly, in the present invention, in a device in which a plurality of substrates are formed into one pair and connected to the counterpart substrate, a comparison means such as a matching circuit that detects a mismatch of a combination of the substrates by inputting an ID signal indicating the combination of the substrates of the pair By providing a plurality of socket boards, a plurality of socket boards can easily and reliably detect the use of different substrates in combination, and can prevent damages, failures, and the like of the boards, sockets, and mounting parts due to incorrect mounting of the boards. The apparatus provided with the abnormality detection circuit suitable for the semiconductor test apparatus used by combining two or more DSAs provided simultaneously.

The present invention also relates to a device in which a board having one or more connectors is connected to a counterpart board having a corresponding one or more connectors, and transmits a signal via all of the connected connectors, By providing a daisy chain circuit that detects the output result, it is possible to easily and reliably detect a connection failure or dropout of a corresponding connector, thereby preventing an operation failure or a decrease in work efficiency due to a connection failure of a connector. The present invention relates to an apparatus having an abnormality detection circuit suitable for a semiconductor test apparatus including a motherboard and a socket board to which a plurality of connectors are simultaneously connected.

Generally, in the semiconductor test apparatus which tests a semiconductor component, the semiconductor component used as a test object is mounted on the board | substrate called a socket board, and this socket board is connected to the board | substrate called the motherboard on the test apparatus main body side, Through the board, a predetermined electrical signal necessary for the test is inputted and outputted to the socket board so that the semiconductor component can be tested.

Here, in the conventional semiconductor test apparatus, the socket board on which the semiconductor component is mounted and the motherboard on the test apparatus main body side are electrically connected by wire or soldering, and the socket board and the motherboard are inseparably inseparable. It was made up. In the conventional semiconductor test apparatus in which such a socket board and a mother board are inseparably connected, a problem arises in that it is difficult to detach and replace a socket board alone, and it is difficult to cope with a test of various semiconductor parts with remarkable diversification. .

In recent years, with the progress of increasing the complexity and density of semiconductor components, many semiconductor components having different package structures and fin structures have been developed and provided. In order to test semiconductor components having various different structures, the interface of semiconductor components is used. It was necessary to change the socket board to correspond to the pin structure and the package structure of each semiconductor component. However, in the conventional semiconductor test apparatus, as described above, since the socket board is soldered to the mother board on the apparatus main body side and connected inseparably, only the socket board cannot be attached or detached, and thus different semiconductors are used. In order to test the components, the entire test apparatus including the motherboard had to be replaced.

In the conventional semiconductor test apparatus requiring the replacement of the entire apparatus as described above, the introduction of a new test apparatus takes time, not only prolongs the test period, but also requires the introduction and replacement of a large amount of test apparatus for each semiconductor component. This has resulted in an increase in test costs and waste of resources. For this reason, it has become very difficult to cope with all of the recent semiconductor parts with remarkable progress in diversification by replacing the test apparatus.

Accordingly, the applicant of the present application, in the Japanese Patent Application No. 2002-047186, after a thorough study, adopts a connector that can be detachably connected to each other as a connection structure such as a socket board and a mother board in a semiconductor test apparatus, thereby providing a mother board. It came to devise the semiconductor test apparatus which made the board detachable and replaceable.

Fig. 8 is an explanatory diagram conceptually showing a semiconductor test apparatus proposed by the present applicant in Japanese Patent Application No. 2002-047186, (a) is a front view of an exploded state, and (b) is provided with a plurality of socket boards. A bottom view of one DSA. As shown in these figures, in this semiconductor test apparatus, the DSA 110 and the mother board 120 mounted with the plurality of socket boards 111 are configured to be detachable.

The DSA (Device Specific Adapter) 110 is a socket board substrate in which a plurality of socket boards 111 and connectors 114 are mounted and fixed to the SB (socket board) frame 112 and are integrally united.

The DSA 110 is arranged on the SB frame 112 on which the plurality of socket boards 111 are the bases, and as shown in FIG. 8 (b), a corresponding motherboard ( A plurality of connectors 114 fitted to a connector (not shown) on the 120 side are exposed. As shown in Fig. 8A, the DSA 110 is mounted on the motherboard 120, so that each connector 114 on the bottom surface of the DSA is connected to the corresponding connector 121 on the motherboard side. Each is fitted and connected, and the some socket board 111 on DSA is electrically connected to the motherboard 120 side. In addition, in order to test a plurality of semiconductor components at the same time, the DSA 110 is equipped with a plurality of DSAs of the same configuration and two sets of four groups on one motherboard. In b), the arrangement | positioning state of two sets of DSA 110 is shown.

According to such a semiconductor test apparatus, since the DSA 110 equipped with the plurality of socket boards 111 can be detachably connected to the motherboard 120 via the connector 114, any DSA ( The 110 may be attached to or detached from the motherboard 120, and for example, when testing a semiconductor component having a different package structure or a fin structure, the DSA 110 is removed from the motherboard 120 (Fig. 8 (a)), it is possible to change to another DSA 110 mounted with the socket board 111 corresponding to the semiconductor component to be tested.

Therefore, in this semiconductor test apparatus, by replacing only the DSA on which the socket board is mounted, it is possible to cope with a test of different kinds of semiconductor components, and the replacement of the entire apparatus including the motherboard as in the conventional apparatus, etc. It became unnecessary, and the semiconductor test apparatus excellent in versatility was realizable at low cost.

By the way, in the semiconductor test apparatus which can attach / detach a DSA to a motherboard side as mentioned above, in order to test many semiconductor components simultaneously as mentioned above, in order to test many semiconductor components simultaneously, a plurality of DSAs equipped with the same kind of socket board are mounted on a motherboard. There was a case to mount. By the way, since DSA has the same external appearance and external appearance itself, even if the type, structure, etc. of the socket board mounted are mutually different, it may not be distinguishable in DSA unit. For this reason, two or more DSAs provided with the socket boards of different types or structures could be mounted on the same motherboard by miscombination.

When DSAs equipped with different types of socket boards are mounted on the same motherboard, the semiconductor structures to be tested and the socket structures of the socket boards are not suitable. Physical damage to the socket guide, device (semiconductor component), change kit for device replacement, and the like may occur. Therefore, it was necessary to prevent such misfit of DSA.

Here, as a means of preventing the misuse of the DSA mounted with these two types of socket boards in combination, for example, pins and pin holes or irregularities are formed in the frame of the DSA, and the right combination between the DSAs can be used. Only, it is conceivable to engage the pin and the concave-convex shape. However, in the method of forming the irregularities and the fitting structure in the frame of the DSA in this way, the type of the socket board and the fitting structure must be changed, so that the frame of the DSA is renewed every time the semiconductor component having different types is tested. The problem of having to design and manufacture has arisen.

In addition, when a fitting structure or irregularities are formed in the frame of the DSA in this way, or a pin is attached, the thickness of the frame of the DSA becomes thinner, resulting in a weaker strength.

On the other hand, in the DSA detachable semiconductor test apparatus, as shown in Fig. 8, a plurality of socket boards and connectors are arranged in a predetermined number on a frame, and unitized (see Fig. 8 (b)). A large number of connectors were provided on the DSA, and a plurality of connectors were also provided on the corresponding motherboard side. For this reason, when a DSA is attached to and detached from a motherboard, a fitting failure or a connection failure may occur in many connectors connected between a socket board and a motherboard.

And when such a connection defect of a connector etc. generate | occur | produced, normal test could not be performed, work efficiency worsened, and there existed a possibility that the reliability about a test apparatus might fall.

From the above circumstances, like the semiconductor test apparatus on the DSA detachment side, a device in which the same type of substrate (DSA) needs to be used in error-free combination or a device in which a plurality of connectors are attached or detached between the substrates are repeated. In this regard, the occurrence of misalignment and misuse of the board, the occurrence of poor connection or poor connection of the connector, etc. have been found beforehand, and the development of a new means capable of effectively preventing this has been required. Therefore, the applicant of the present invention, after further research of another example, can reliably prevent the misalignment and the like of the plurality of substrates as described above, and also create the present invention which can reliably find conduction defects between the plurality of connectors. It came to the following.

SUMMARY OF THE INVENTION The present invention has been proposed to solve the above problems, and in a device in which a plurality of substrates are formed into one pair and connected to the counterpart substrate, the combination of the combinations of the substrates is input by inputting an ID signal indicating the combination of the pair of substrates. By providing a comparison means such as a coincidence circuit for detecting inconsistencies, it is possible to detect heterogeneous substrates in combination easily and reliably, thereby preventing damage, failure, etc. of a substrate, a socket, a mounting component, or the like due to incorrect mounting of the substrate. It is an object of the present invention to provide an apparatus having an abnormality detection circuit suitable for a semiconductor test apparatus which can be prevented from, in particular, a plurality of DSAs having a plurality of socket boards used in combination.

The present invention also relates to a device in which a board having one or more connectors is connected to a counterpart board having a corresponding one or more connectors, and transmits a signal via all of the connected connectors, By providing a daisy chain circuit that detects the output result, it is possible to easily and reliably detect a connection failure or dropout of a corresponding connector, thereby preventing an operation failure or a decrease in work efficiency due to a connection failure of a connector. In particular, it is an object of the present invention to provide an apparatus having an abnormality detection circuit suitable for a semiconductor test apparatus having a motherboard and a socket board to which a plurality of connectors are simultaneously connected.

In order to achieve the above object, an apparatus having a substrate abnormality detection circuit of the present invention is a device having at least one set of substrate groups in which a plurality of substrates are combined, and a counterpart side substrate to which the substrate groups are connected. It is provided in each board | substrate, It sets in predetermined ID number given with respect to the said board | substrate group, It is provided in the board for ID setting which outputs the ID signal which shows the said ID number, and the counterpart board corresponding to the said board | substrate group. And comparison means for inputting an ID signal input board for inputting each ID signal output from the ID setting board and each ID signal output from the ID signal input board, and comparing the ID signals of the corresponding respective boards. It has a structure which detects the abnormality of combination of the board | substrate in the said board | substrate group.

According to the apparatus with the board | substrate abnormality detection circuit of this invention which consists of such a structure, it is equipped with a board | substrate by comparing means, such as an ID setting board and the matching circuit which detects the agreement of the ID signal output from this ID setting board, and a board | substrate. By simply giving an ID number indicating that two or more boards constituting the group satisfy a predetermined combination, the ID number can be input from each board to compare and determine the mismatch. Thereby, the combination of multiple board | substrates can be discriminated by ID number peculiar to a board | substrate group, without changing the structure of a board | substrate, an external appearance, etc., and it can detect easily and reliably that a heterogeneous board | substrate is combined, It is possible to reliably prevent breakage, failure and the like of the board, the socket and the mounting component.

Further, by inputting the ID signal from the substrate side in this way, by determining whether the combination of the substrates is correct, the substrate is mounted on the apparatus side and the consistency of the combination can be judged, so that a faster determination process can be made. It becomes possible to perform the original work and process which mount a board | substrate in an apparatus, and perform it efficiently.

In addition, since the board number can be specified by assigning an ID number, even when the type and number of boards are increased or decreased, it is possible to easily cope with the addition and deletion of the ID number, and thus an abnormality detection circuit having excellent versatility and expandability. Can be realized.

On the other hand, an apparatus having an abnormality detection circuit of the present invention is a device having a substrate provided with a connector and a mating board having a connector to which each connector of the board is connected, the apparatus comprising the mating board or one connector of the board. A daisy chain circuit for inputting signals and sequentially transmitting signals to all connectors via corresponding connectors to detect the presence or absence of output signals, and detecting abnormality in connection of all connectors of the substrate and the counterpart substrate. I make it a constitution.

According to the apparatus having the board abnormality detection circuit of the present invention having such a configuration, a daisy chain circuit for transmitting a signal via all the connectors of one or two or more connectors can be used to prevent a poor connection, abnormality, or the like between any one connector. If so, this can be detected immediately. In addition, by detecting a connection failure or the like by transmitting a signal between the connectors connected in this way, it is possible to determine whether there is a problem at the same time as the connectors between the boards are connected and the connection failure can be found quickly, It is possible to efficiently perform the original work and processing performed by connecting the connector between the two.

As a result, even when a large number of connectors are connected at the same time, it is possible to easily and reliably find a connection failure or dropout, so that a highly reliable device can be provided without operation failure due to a poor connection of a connector or a decrease in work efficiency. It can be realized.

Moreover, the apparatus which has a board | substrate abnormality detection circuit of this invention is equipped with the board | substrate of the at least 1 set of board | substrate which the several board | substrate with a connector is combined, and the counterpart board | substrate provided with the connector to which the connector of each board | substrate of this board | substrate group is connected. An apparatus having: an ID setting board provided on each substrate of the substrate group, for setting a predetermined ID number assigned to the substrate group, and for outputting an ID signal indicating the ID number; It is provided in the board | substrate of a counterpart corresponding to a group, and inputs the ID signal input board which inputs each ID signal output from the said ID setting board, and each ID signal output from the said ID signal input board, and respond | corresponds to each said board | substrate. A comparison means for comparing an ID signal of a signal, and a signal is inputted from the mating substrate or one connector of the substrate, and A daisy chain circuit for transmitting signals sequentially to all connectors to detect the presence or absence of an output signal, detecting abnormal combinations of the boards in the board group, and abnormal connection of all the connectors of the board and the counterpart board. Is configured to detect.

According to the apparatus having the substrate abnormality detection circuit of the present invention having such a configuration, both of comparison means such as a matching circuit for determining the coincidence of ID numbers given to the substrate group, and a daisy chain circuit for detecting a poor connection of a connector By providing this, it is possible to reliably detect the abnormality of the combination of the boards, and to detect the poor connector connection between the board and the counterpart board. Thereby, in the apparatus in which several board | substrates are combined and used and each board | substrate is equipped with the some connector, and is connected to a counterpart, ID number is attached | subjected and the abnormality of combination between board | substrates is detected reliably, The poor connection of a connector can also be found easily, and the device which is more versatile, expandable, and highly reliable can be provided.

In particular, in an apparatus having an abnormality detection circuit, a plurality of boards for setting the ID signal are provided on the board, and one ID number of the board is set and output by the plurality of boards for setting the ID signal. I make it a constitution.

According to the apparatus having the substrate abnormality detection circuit of the present invention having such a configuration, a plurality of ID signal setting boards may be provided, and one ID number may be formed of all the numbers set in the plurality of ID signal setting boards. The arbitrary ID number can be set freely according to the number, type, etc. of the board | substrate to be used. As a result, even when the type and number of substrates are increased or decreased, addition, deletion, change, etc. of ID numbers can be performed more easily, and an abnormality detection circuit excellent in versatility and expandability can be provided.

On the other hand, in an apparatus having an abnormality detection circuit, the daisy chain circuit is configured such that one or two or more pins of the connector of the substrate and the counterpart substrate are connected by shorting in the board and the counterpart substrate.

According to the apparatus having the substrate abnormality detection circuit of the present invention having such a configuration, by using the existing pins of the connectors provided between the substrates to be interconnected, each pin is shorted in the substrate, thereby signaling the signals through all the connectors. It is possible to configure a daisy chain circuit of the present invention for transmitting the. As a result, the daisy chain circuit according to the present invention can detect a connection failure, a connection abnormality, etc. of a plurality of connectors without providing a special circuit, means, or the like, without increasing the size and complexity of the board or device. In addition, it is possible to provide a highly reliable device that can detect a poor connection between the boards to be mounted.

And in the apparatus with an abnormality detection circuit, the said board | substrate consists of a DSA which has 1 or 2 or more socket boards with which the semiconductor component as a test object is mounted and connected, and the said board | substrate board | substrate mounts and connects, It is set as the structure which consists of a motherboard of a semiconductor test apparatus.

Moreover, in the apparatus with an abnormality detection circuit, the said board | substrate consists of DSA which has 1 or 2 or more or more socket boards with which the semiconductor component as a test object is mounted and connected, The said board | substrate group consists of the said DSA, It is set as the structure which consists of the board | substrate of the semiconductor test apparatus which combines and the said counterpart side board | substrate which the several DSA which comprises the said board | substrate group is integrally mounted and connected.

According to the apparatus with the substrate abnormality detection circuit of this invention which consists of such a structure, the board | substrate group which makes a board | substrate which concerns on this invention as a DSA, a counterpart board | substrate is comprised as a mother board on which DSA is mounted, and is equipped with a some board | substrate. By configuring DSA as a group of DSAs provided with a plurality of DSAs, the DSA detachable semiconductor test apparatus can be configured as a device having an abnormality detection circuit according to the present invention. As a result, in a semiconductor test apparatus that can cope with a test of various other semiconductor parts by exchanging a DSA provided with a socket board alone, by using the abnormality detection circuit of the present invention, confusion of DSA, dropping of a connector, poor contact, etc. It is possible to provide a semiconductor test apparatus capable of easily and reliably detecting a semiconductor device, and to prevent the occurrence of incorrect mounting or mounting failure in advance and to test a highly reliable semiconductor component.

EMBODIMENT OF THE INVENTION Hereinafter, the preferable Example of the apparatus with a board | substrate abnormality detection circuit which concerns on this invention is described, referring FIGS.

1 is an exploded perspective view illustrating a semiconductor test apparatus having a substrate abnormality detection circuit according to an embodiment of the present invention. 2 is a diagram showing a semiconductor test apparatus having a substrate abnormality detection circuit according to the present embodiment, in which (a) is a front view of a state in which the DSA is removed from the motherboard side, and (b) is in (a). Bottom view of the illustrated DSA.

As shown in these drawings, an apparatus having a substrate abnormality detection circuit according to the present embodiment is a device for connecting a plurality of connectors provided on the same surface of a substrate to a plurality of connectors of corresponding mating substrates. The semiconductor test apparatus includes a DSA 10 having a plurality of socket boards 11 mounted thereon and a mother board 20 serving as a counterpart to which the DSA 10 is connected. The present embodiment includes an abnormality detection circuit that detects confusion of the DSA 10 and a poor connector connection between the DSA 10 and the motherboard 20 in this semiconductor test apparatus.

[Semiconductor Test Device]

First, with reference to FIG. 1 and FIG. 2, the semiconductor test apparatus which comprises the apparatus with a board | substrate abnormality detection circuit which concerns on a present Example is demonstrated. As shown in the figure, the semiconductor test apparatus according to the present embodiment has a configuration substantially the same as that of the semiconductor test apparatus shown in Fig. 8, and includes a socket board on which semiconductor components (not shown) to be tested are mounted ( The DSA 10 provided with 11) is detachably comprised with respect to the motherboard 20, and it becomes a test apparatus which can respond to the test of other types of semiconductor components by replacing only the DSA 10 independently. .

As shown in FIG. 1, the DSA (Device Specific Adapter) 10 includes a plurality of socket boards 11, and a connector 14 is disposed on the bottom side of the socket board (see FIG. 2B). ), The plurality of socket boards 11 and the corresponding connectors 14 are integrally united in a single board shape. Usually, the DSA is used as a unit to manufacture, attach, and replace the same. have. As described above, by treating the plurality of socket boards in unitized DSA units, for example, the socket boards corresponding to the unitized DSA units are prepared for semiconductor components having different package structures or pin structures. By attaching or detaching the DSA to and from the motherboard, it is possible to test a variety of different semiconductor components.

In such a DSA detachable semiconductor test apparatus, one set of two DSAs and one set of four DSAs having a socket board having the same configuration on one motherboard can be used to simultaneously test a plurality of semiconductor components. A plurality of DSAs can be mounted and used as a set. In this embodiment, as shown in Fig. 1, two DSAs 10 (DSA-A 10a and DSA-B 10b) are used as one set, and these two sets of DSAs 10 It is mounted on the mother board 20 integrally and connected. Specifically, in the DSA 10 according to the present embodiment, a plurality of socket boards 11 are arranged on a frame-shaped SB frame (socket board frame) 12 serving as a base substrate, and an SB frame ( In the frame space of 12, the connector 14 connected corresponding to each socket board 11 is arrange | positioned.

Each socket board 11 consists of a board | substrate provided with the component mounting connection part (socket part) which mounts and electrically connects the semiconductor component to be tested, respectively, so that one semiconductor component may be mounted to each socket board 11 one by one. It is. The plurality of socket boards 11 are mounted on and fixed to the frame portion of the SB frame 12, respectively.

The SB frame 12 is a frame member made of metal or the like, and has a plurality of spaces (see FIG. 2 (b)). In this embodiment, as shown in FIG. It is provided with 16 spatial areas. As shown in FIG. 2B, the connectors 14 connected to the socket boards 11 are accommodated in the spaces of the SB frame 12, respectively. Here, in the DSA 10 according to the present embodiment, as shown in Figs. 1 and 2, the SB frames 12 are provided with two columns of one space and eight columns, for a total of 16 space areas. In total, 32 socket boards 11 and 2 corresponding connectors 14 are provided. However, the number of socket boards 11 and connectors 14, the number of spaces of the SB frame 12, and the like are not particularly limited.

By storing the connector 14 in the SB frame 12 as described above, the connector 14 is arranged on the bottom side of each socket board 11, and each connector 14 has a corresponding socket on the SB frame 12. In addition to being connected to the board 11, it is fixed on the same plane at the bottom of the socket board, and with respect to the corresponding connector 21 (see FIG. 1) on the motherboard 20 side, all connectors are detached at the same time. have. Therefore, when the connector 14 on the DSA 10 side and the connector 21 on the motherboard 20 are both properly fitted and not connected, the connector is poorly connected and the connector is poor. The presence or absence is detected by the daisy chain circuit 40 mentioned later.

Each socket board mounted on the SB frame 12 has the shape which cut | disconnected the four corner | substrates of the board | substrate of each socket board, as shown in FIG. 1, From this cut-out part, the frame part of the SB frame 12 In the exposed part of this SB frame 12, the positioning hole 15 into which the positioning pin 22 which protrudes toward the mother board 20 and is provided is formed. By inserting the positioning pin 22 into the positioning hole 15, the DSA 10 is positioned and fixed with respect to the motherboard 20 at a predetermined position. In this embodiment, the positioning holes 15 (and the positioning pins 22) are formed so as to be positioned at two left and right positions in the longitudinal direction of the SB frame 12 in this embodiment (see FIG. 2). As long as 10) is positioned at a predetermined position, the positioning pin 22 and the positioning hole 15 can be formed at any position, and the number thereof is not particularly limited.

In addition, in this SB frame 12, as shown in FIG. 2, the ID number of the DSA 10 is set in the area | region which does not interfere with each connector 14 of a connector arrangement surface, and the said ID number An ID setting board 13 for outputting an ID signal indicating is provided.

The detail of this ID setting board 13 is mentioned later.

In the DSA 10 having the above-described configuration, two DSA-A 10a and DSA-B 10b in which the socket board 11 of the same structure is mounted are combined as one pair, and these two pieces are combined. One set of DSA 10 is integrally mounted on the motherboard 20. In other words, in the present embodiment, for example, "DSA-A and B", "DSA-C and D", "DSA-E," according to the type of the DSA 10 and the socket board 11 of two pieces. F 」. In this manner, two DSAs 10 equipped with socket boards 11 of the same structure are used in combination. Therefore, in this case, for example, the combination of "DSA-A and DSA-C" and "DSA-B and DSA-D" means that the socket boards 11 of different types are arranged on the motherboard 20. It is mounted and becomes abnormal as a combination of DSA10.

The mismatch of the combination of the DSAs 10 is detected by the ID matching circuit 30 through the ID setting board 13 described later.

The mother board 20 is a board | substrate with which the main body side of a semiconductor test apparatus is provided, as shown in FIG. 1, and responds to the DSA 10 side which united the some socket board 11 as mentioned above. A plurality of connectors 21 are provided (see FIG. 1). When the DSA 10 is connected to the motherboard 20 via a connector, predetermined electrical signals necessary for the test are inputted and outputted through the motherboard 20 on the DSA side, so that testing of semiconductor components on each socket board 11 is performed. It is supposed to be done.

In the present embodiment, the board for contact pins contacting the ID setting board 13 on the DSA 10 side in an area of the upper surface of the motherboard 20 that does not interfere with the plurality of connectors 21. 23) is arranged. The details of the contact pin board 23 will be described later together with the ID setting board 13 on the DSA 10 side.

In addition, the part shown as the motherboard 20 in this Example generally includes SPCF, a metal plate, a performance board, a utility board, etc. in addition to the motherboard provided on the main body of a semiconductor test apparatus, and is mentioned later. As described above, in this embodiment, the abnormality detection circuit is provided in the utility board 20a in the mother board 20. Therefore, the "mother board" referred to in the present embodiment means the counterpart substrate according to the present invention in which the united DSA 10 is detachably connected. In addition, although detailed description is abbreviate | omitted, the structure and function with which the semiconductor test apparatus of a present Example is equipped in addition to the above-mentioned DSA 10 and the motherboard 20 are the same as that of the conventional semiconductor test apparatus.

[ID Setting Board]

Next, the ID setting board 13 according to the present embodiment will be described with reference to FIGS. 3 and 4. 3 is a sectional front view of the main part conceptually showing the ID setting board 13 and the contact pin board 23 according to the present embodiment. 4 is a block diagram conceptually showing the relationship between the ID setting board 13 and the ID matching circuit 30 according to the present embodiment.

The ID setting board 13 shown in these figures sets the ID number which shows the combination of each DSA 10 (DSA-A and B, DSA-C and D ...), and shows the ID scene which shows this ID number. It is a board | substrate which outputs an arc, and is provided in the connector arrangement surface side of the DSA10.

This ID setting board 13 is arrange | positioned in the area | region which does not interfere with each connector 14 of the connector arrangement surface of the SB frame 12, In this embodiment, as shown in FIG. Similarly, eight ID setting boards 13 are arranged in each of the DSAs 10 (10a, 10b).

On the side of the motherboard 20 that the ID setting board 13 faces, a contact pin board 23 serving as an ID signal input board is provided. As shown in Fig. 1, the contact pin boards 23 each correspond to two DSAs 10a and 10b at positions corresponding to the respective ID setting boards 13 and 16 contacts in total. Like the ID board 13, the pin board 23 is arrange | positioned in the area | region which does not interfere with each connector 21 of the motherboard plurality, respectively. Thus, when the DSA 10 is mounted on the motherboard 20, the ID signal output pad 13a of the corresponding ID setting board 13 and the contact pin 23a of the contact pin board 23 are in contact with each other. As described later, the ID signal is automatically output to the ID matching circuit 30 at the same time as the DSA 10 is mounted.

As shown in FIG. 3, each of the ID setting boards 13 is disposed on a surface of the DSA 10 that faces the motherboard 20 side by a fixing means such as a bolt and is fixed to two substrate surfaces. A pair of ID signal output pads 13a are provided. The pair of ID signal output pads 13a are connected to two pairs of ID number setting pads 13c on the substrate back surface side (DSA 10 side), respectively, through the through holes 13b.

Each ID number setting pad 13c is connected to the GND pad 13e via the jumper wire 13d, respectively. The GND pad 13e is grounded to, for example, a bolt for fixing the ID setting board 13 through a conductor pattern (not shown). The ID number setting pad 13c can be set to GND or OPEN depending on whether or not the jumper wire 13d is connected to this GND pad 13e.

Specifically, when the ID number setting pad 13c is set to GND (connected to the GND pad 13e), the signal output from the ID signal output pad 13a to the ID matching circuit 30 described later is the input side. Is LOW (0) because it is grounded. On the other hand, when the ID number setting pad 13c is set to OPEN (not connected to the GND pad 13e), the signal output from the ID signal output pad 13a to the ID matching circuit 30 is the ID matching circuit ( 30 is set to HIGH (1) by the power supply voltage Vcc (see FIG. 5).

As described above, in the ID setting board 13 according to the present embodiment, the signal output from the ID signal output pad 13a connected to the ID number setting pad 13c in accordance with the presence or absence of the connection of the jumper wire 13d. Can be switched to LOW (0) / HIGH (1). Then, by setting an arbitrary LOW (0) / HIGH (1) signal for this ID setting board 13, an ID signal indicating a desired ID number can be input to the ID matching circuit 30 (Fig. 4).

In this embodiment, as shown in Fig. 2, eight ID setting boards 13 are arranged in each of the DSAs 10 (10a, 10b), and each of the ID setting boards 13 is provided. And two ID signal output pads 13a. As a result, the ID number that can be set by the ID setting board 13a can allocate a 16-bit signal to a set of DSAs 10 (10a, 10b). Of the 16-bit signals, the higher (or lower) 14-bit signals are allocated as ID signals indicating ID numbers.

For example, an ID number indicating a combination of "DSA-A and B" is set to "00000000000001", and an ID number indicating "DSA-C and D" is set to "00000000000010". Can be numbered

As shown in FIG. 4, this 14-bit ID signal is output from each of the DSAs 10a and 10b, and is supplied to the ID matching circuit 30 through the contact pin board 23 on the motherboard 20 side. It is supposed to be input.

The number of bits of the ID signal indicating the ID number of the DSA 10 is not limited to the case of 14 bits in this embodiment, but can be arbitrarily set according to the type of the DSA 10, and is also necessary. The number of ID setting boards 13 and the number of output pads can be changed in accordance with the number of bits. For example, in the case of a semiconductor test apparatus in which 1000 types of DSAs 10 are used, since there are 1000 ID numbers, when a 10-bit signal is used, 1024 IDs can be given. In this case, therefore, as long as the number of output boards is " 2 " as in the ID setting board 13 of the present embodiment, five pieces may be provided for each DSA. On the other hand, in the case of a semiconductor test apparatus in which 10000 types of DSA 10 can be used, 10000 ID numbers are also required. As in this embodiment, 16384 ID numbers can be assigned by using a 14-bit signal. Can be. In this way, the ID setting board 13 according to the present embodiment can arbitrarily set which bit among the number of installations, the number of output bits, and the number of usable bits to allocate as the ID signal.

In addition, setting of the ID number to this ID setting board 13 is performed before assembling the DSA 10, and after the kind of the socket board 11 mounted in the DSA 10 is set, the corresponding two 1s is set. It is preferable to attach the ID setting board 13 which set the same ID number to a predetermined | prescribed location of the DSA 10 in a tank. In addition, since the ID number which has been set once does not usually need to be changed later, and there is a case in which incorrect mounting of the DSA 10 may occur due to an unprepared ID change, the ID setting board 13 As shown in this embodiment, it is preferable to fix to a DSA 10 side using a bolt etc. and to attach detachably.

[ID matching circuit]

Next, with reference to FIG. 5, the ID matching circuit 30 which concerns on this embodiment is demonstrated. 5 is a circuit diagram showing details of the ID matching circuit 30 according to the present embodiment.

As shown in Fig. 5, the ID matching circuit 30 according to the present embodiment is a circuit for detecting a match mismatch between a set of DSAs 10 (10a, 10b) and serves as a comparison means for comparing ID signals. have. In this embodiment, each 14-bit ID signal input from each ID setting board 13 of the DSAs 10a and 10b is input. Specifically, as shown in Fig. 5, the ID matching circuit 30 is composed of 14 XOR circuits, 7 NOR circuits, and 1 AND circuit for inputting ID signals of 14 bits each. The 14-bit ID signal input from the ID setting board 13 of 10a, 10b is compared between corresponding bits, and the signal of HIGH (1) is output only when all the bits match. In this case, a LOW (0) signal is output. As a result, a match of the combination of the DSAs 10 mounted on the motherboard 20 is detected. When the DSAs 10 having different types are combined, an abnormal signal (LOW (0) signal) is output. Since it is possible to do this, it becomes possible to perform a process corresponding to an abnormal occurrence. In the present embodiment, as described later, the lock mechanism for locking the DSA 10 to the motherboard 20 side is controlled to be in a locked state, and the display indicating ID number mismatch is performed.

In addition, in this embodiment, when this ID matching circuit 30 is provided in the utility board 20a of the motherboard 20 side (refer FIG. 4, FIG. 7), when the discrepancy of ID signal is detected, As will be described later, the utility board 20a is processed as "there is an ID number or more".

As the comparison means for comparing the ID signals, it is also possible to adopt a configuration other than the ID matching circuit 30 described in this embodiment. That is, the comparison means may employ any circuit, device, or the like as long as it can detect that the DSAs having different types are combined by comparing the ID signals.

[Daisy chain circuit]

Next, with reference to FIG. 6, the daisy chain circuit 40 which concerns on a present Example is demonstrated. 6 is an explanatory diagram conceptually showing the daisy chain circuit 40 according to the present embodiment.

As shown in FIG. 6, the daisy chain circuit 40 inputs a signal from one connector 21 (the connector 21 on the left end of FIG. 6) on the motherboard 20 side, and corresponds to the corresponding DSA 10. The signal is sequentially transmitted to the motherboard 20 and all the connectors 21 and 14 of the DSA 10 via the connector 14 on the side of FIG. It has a circuit for detecting the presence or absence. Specifically, the daisy chain circuit 40 assigns pins corresponding to each of the connector 21 on the motherboard 20 side and the connector 14 on the DSA 10 side for the daisy chain, and all connectors By forming the transmission lines so that are sequentially connected in series, in this embodiment, as shown in FIG. 6, the connectors 21 on the motherboard 20 side and the connectors 14 on the DSA 10 side are shown. All connectors are connected in series by shorting two pins, respectively.

First, on the motherboard 20 side, two pins (or os type pins in FIG. 6) of each connector 21 are allocated for the daisy chain, one being the input side and the other being the output side. Then, between the adjacent connectors 21, the daisy chain output pin of one connector 21 and the daisy chain input pin of the other connector 21 are connected via short circuit lines 21a. have. Also, on the DSA 10 side, two pins (measured pins in Fig. 6) of each connector 14 are also allocated for the daisy chain, one for the input side and the other for the output side. In this case, the input side and the output side are connected by a short circuit line 14a.

As the pins for daisy chains in the connectors 21 and 14, empty pins and the like which are not used in each connector can be used, and dedicated pins can also be provided for the daisy chains.

According to this daisy chain circuit 40, the input side and the output side of the daisy chain circuit 40 become conductive only when all corresponding connectors on the motherboard 20 side and the DSA 10 side are normally connected, When there is a connection failure in either connector, the daisy chain circuit 40 will not conduct. Therefore, by applying a voltage to the input side of the daisy chain circuit 40, a normal signal (HIGH (1) signal) is outputted at the same time when the connectors are connected and when there is no connection failure in all the connectors. By monitoring the presence or absence of a signal, it is possible to detect whether or not all corresponding connectors on the motherboard 20 side and the DSA 10 side are normally connected. Thereby, the connector connection abnormality between the motherboard 20 and the DSA 10 is detected at the same time the DSA 10 is mounted on the motherboard 20 side and the connectors are connected.

And the output signal from this daisy chain circuit 40 is input to the utility board 20a (refer FIG. 7), and as mentioned later, it is abnormal in the utility board 20a simultaneously with the mismatch of ID signal. It is judged whether there is any occurrence, and if it is abnormal, it is treated as "Daisy Chain Error".

In this embodiment, the daisy chain circuit 40 assigns two pins to each of the connectors on the motherboard 20 side and the DSA 10 side for the daisy chain, but this is particularly limited to the two pins. It doesn't happen. In other words, as long as the daisy chain circuit 40 can form a transmission line such that all connectors on the motherboard 20 side and the DSA 10 side are sequentially connected in series, the number of pins and the connection method used are particularly limited. It doesn't happen. Thus, for example, when the DSA 10 and the motherboard 20 have coaxial connectors, the SIG line and GND line of the coaxial connector are shorted so that the SIG line is assigned to the input side of the daisy chain and the GND line to the output side. It is also possible to configure the daisy chain circuit 40.

In the present embodiment, the input and output of the daisy chain circuit 40 are performed on the motherboard 20 side, but the input and output of signals to the daisy chain circuit 40 can also be performed on the DSA 10 side.

[Utility Board]

Next, with reference to FIG. 7, the utility board 20a which concerns on a present Example is demonstrated. 7 is a block diagram conceptually showing the utility board 20a in the semiconductor test apparatus having the substrate abnormality detection circuit according to the present embodiment.

The utility board 20a of the present embodiment is a substrate provided on the motherboard 20 side. As shown in FIG. 7, an output signal from the daisy chain circuit 40 is input, and an ID setting board ( An ID matching circuit 30 to which an ID signal from 13) is inputted. 7, the utility board 20a includes one AND circuit 33 for inputting the output signal of the daisy chain circuit 40 and the ID matching circuit 30, and the daisy chain circuit 40. And an ID number abnormal signal input section 35 for inputting an output signal of the ID matching circuit 30 and a daisy chain abnormal signal input section 34 for inputting an output signal of the "

The AND circuit 33 supplies a signal indicating a "no abnormality" (HIGH (1) signal) only when the signal input from the daisy chain circuit 40 and the ID matching circuit 30 is HIGH (1), that is, normal. Output By the output signal of this AND circuit 33, it is detected whether there is no ID mismatch of the DSA 10, and whether there is no connection failure in all the connectors of the DSA 10 and the motherboard 20, None "control is performed. In this embodiment, when the "no abnormality" signal is output from this AND circuit 33, the lock mechanism which locks the DSA 10 to the motherboard 20 side is controlled to the locked state LOCK.

On the other hand, in the daisy chain abnormal signal input unit 34 or the ID number abnormal signal input unit 35, when the input signal is LOW (0), that is, the abnormal signal, a signal indicating "there is an abnormality" is output. Thereby, it is detected that there is a connection failure in any of the connectors of the DSA 10 and the motherboard 20, and there is a mismatch in the ID of the DSA 10, and the "Daisy Chain error" or "ID number" is detected. There is an abnormality ”. In this embodiment, the lock mechanism that locks the DSA 10 to the motherboard 20 side is controlled to the non-locking state (FREE) by the "is abnormal" signal, and "There is a Daisy Chain abnormality" or The LED or the like corresponding to "there is an ID number error" is turned on to notify the outside of the device of an abnormality occurrence.

[Error detection operation]

Next, the abnormality detection operation in the semiconductor test apparatus having the substrate abnormality detection circuit according to the present embodiment having the above configuration will be described.

First, two DSAs 10 are prepared as a set of two, mounted at predetermined positions on the motherboard 20, and the connectors 21 on the motherboard 20 side and the connectors 14 of the respective DSAs 10. FIG. Fit and connect them. When the DSA 10 is mounted on the motherboard 20, the ID signal output pad 13a of the ID setting board 13 of each DSA 10 is connected to the board for contact pins on the corresponding motherboard 20 side ( It contacts the contact pin 23a of 23, and outputs the ID signal which shows the ID number of the said DSA10.

The output ID signal is input to the ID matching circuit 30 of the utility board 20a via the contact pin 23a, and the ID signals of the two DSAs 10 are compared to detect a match mismatch. The result is input to the AND circuit 33 and the ID number abnormal signal input unit 35 of the utility board 20a.

In addition, when the DSA 10 is mounted on the motherboard 20 and the respective connectors of the DSA 10 and the motherboard 20 are connected and the daisy chain circuit 40 is conducted, a daisy chain signal is output, and the utility It is input to the AND circuit 33 and the daisy chain abnormal signal input part 34 of the board 20a.

The AND circuit 33 of the utility board 20a outputs a signal indicating a "no abnormality" (HIGH (1) signal) when the signal input from each circuit is HIGH (1), that is, normal.

Thereby, there is no inconsistency in the IDs of the two sets of DSA 10 mounted on the motherboard 20, and all the connectors of the DSA 10 and the motherboard 20 are normally connected, and there is no abnormality. As a lock, a lock mechanism for locking the DSA 10 to the motherboard 20 side locks the DSA 10. Therefore, in this state, the test of the semiconductor component using the DSA 10 and the motherboard 20 can be performed.

On the other hand, in the daisy chain error signal input part 34 or ID number error signal input part 35, when LOW (0), ie, an abnormal signal is input, it connects to either the connector of the DSA 10 and the motherboard 20. There is a defect and a combination of the DSA 10 mounted on the mother board 20 is abnormal, and a signal indicating "There is an abnormality" is output. As a result, processing of the corresponding "Daisy Chain abnormality" or "ID number abnormality" is performed.

That is, while the locking mechanism for locking the DSA 10 to the motherboard 20 side is controlled to the non-locking state (FREE), the LED corresponding to "Daisy Chain abnormality" or "ID number abnormality", etc. Lights up, and an abnormal occurrence is notified outside the apparatus. Therefore, in this state, the semiconductor test apparatus cannot be used, and the semiconductor test is performed as it is with the DSA 10 confused with the combination mounted on the motherboard 20, or the test is performed as it is with the connection of some connectors being poor. There is no case to be done.

As described above, according to the apparatus having the substrate abnormality detection circuit according to the present embodiment, the ID setting board 13 indicating the combination of the DSA 10 and the ID signal output from the ID setting board 13 are used. By providing the ID matching circuit 30 which detects the coincidence, a predetermined ID number is given, and the coincidence mismatch between the ID numbers is only determined, so that the two sets of DSAs 10 are in a predetermined combination. Can be determined.

As a result, by assigning a unique ID number to each DSA 10 without changing the configuration, appearance, or the like of the DSA 10, it is possible to determine whether the combination of the DSAs 10 is correct, The confusion can be easily and surely detected, and damages, failures, and the like of sockets, mounting components, and the like due to incorrect mounting of the DSA 10 can be reliably prevented.

In this embodiment, since the ID signal from the DSA 10 side is input and it is determined whether the combination of the DSA 10 is correct, the DSA 10 is mounted on the motherboard 20 side. At the same time, the suitability of the combination can be judged, and a quick determination process can be performed, and the original test work, processing, etc. by the semiconductor test apparatus can be efficiently performed.

In addition, since the combination of the DSA 10 can be specified by assigning an ID number, even when the type or number of the DSA 10 is increased or decreased, the ID number can be easily added and deleted to cope with it. The abnormality detection circuit excellent in the expandability can be realized.

In addition, in this embodiment, since the daisy chain circuit 40 which transmits a signal via all the connectors of the DSA 10 and the motherboard 20 is provided, a connection failure or connection abnormality between any one connector is performed. Etc., it can detect this immediately.

In addition, by detecting a connection failure or the like by the daisy chain circuit 40 which transmits signals between all connectors, the connector between the DSA 10 and the motherboard 20 is connected, and at the same time, it is possible to determine whether there are any defects or problems. have.

As a result, even in the semiconductor test apparatus provided with the DSA 10 and the motherboard 20 having a large number of connectors, it is possible to easily and reliably find a connection failure or a dropout, and thus an operation failure due to a connection failure of a connector. It is possible to realize a highly reliable test apparatus without deteriorating work efficiency. In particular, in the present embodiment, by providing both the ID matching circuit 30 and the daisy chain circuit 40, the abnormality of the combination of the DSA 10 can be reliably detected and the DSA 10 and the motherboard Poor connector connection between 20 can also be detected simultaneously.

As a result, in the semiconductor test apparatus in which a plurality of DSAs 10 are used in combination, and each of the DSAs 10 includes a plurality of connectors 14, an ID number is assigned to prevent the combination of the DSAs 10 or more. While reliably detecting, connection defects of a large number of connectors can be easily found, and thus a semiconductor test apparatus with more general purpose, expandability and high reliability can be provided.

As mentioned above, although the preferable embodiment was shown and demonstrated about the apparatus with the board | substrate abnormality detection circuit of this invention, the apparatus with the board | substrate abnormality detection circuit which concerns on this invention is not limited only to embodiment mentioned above, It goes without saying that various modifications can be made in the scope.

For example, in the above embodiment, the board for setting ID was used only for setting and outputting the ID number of a set of DSAs, but it can also be used as a number setting means for setting and outputting an arbitrary number used for other purposes. . That is, in the above embodiment, while the ID setting board sets and outputs a 2-bit signal, all of these 2-bit signals are used as ID signals indicating ID numbers. If a 6-bit signal is set and outputable, the 2 bits can be used as the ID signal according to the present invention and the remaining 4 bits can be allocated for other signals. Thereby, for example, it can be set as a number means for inputting and setting arbitrary serial number, user number, arrangement number, etc. at the user side.

In addition, in the semiconductor test apparatus described in the above embodiment, by providing both the ID matching circuit and the daisy chain circuit, the abnormality of the combination of the DSA is detected and the connector connection failure between the DSA and the motherboard is also detected. Of course, this may be either one.

In addition, in the above embodiment, as an example of the board group in which the combination is determined by the ID matching circuit, two sets of DSAs are taken as an example. However, this is not limited to one set of two sheets. Of course, one word may be used. Similarly, although the number of connectors for which connection failure is detected in the daisy chain circuit is a plurality of connectors in the above embodiment, at least one connector may be provided between the boards to be connected.

In the above embodiment, the board abnormality detection circuit according to the present invention has been described taking the socket board and the connector of the mother board into and out of the semiconductor test apparatus as an example. It is not limited to the semiconductor test apparatus provided with a motherboard. That is, an apparatus having a substrate abnormality detection circuit of the present invention operates by connecting two or more substrates to a mating side substrate or connecting a substrate having one or more connectors to a mating side substrate having a corresponding connector. As long as the device, the application does not interfere with any substrate or device.

As described above, according to the apparatus having the substrate abnormality detection circuit of the present invention, in a device in which a plurality of substrates are one pair and connected to the counterpart substrate, the combination of the substrates is input by inputting an ID signal indicating the combination of the one pair of substrates. By providing a comparison means such as a matching circuit for detecting a mismatch of s, it is possible to easily and reliably detect that the different substrates are used in combination. This prevents damage, failure, etc. of the substrate, the socket, the mounting component, and the like due to incorrect mounting of the substrate. Particularly, a semiconductor test apparatus in which a plurality of DSAs having a plurality of socket boards are combined and used simultaneously is used. It becomes suitable.

In addition, according to the apparatus having the board abnormality detection circuit of the present invention, in a device in which a board having one or more connectors is connected to a counterpart board having a corresponding one or more connectors, via all the connectors to be connected. By providing a daisy chain circuit for transmitting a signal and detecting an output result of the signal, it is possible to easily and reliably detect a connection failure or dropout of a corresponding connector. As a result, it is possible to prevent an operation failure due to a poor connection of a connector, a decrease in work efficiency, and the like, and is particularly suitable for a semiconductor test apparatus including a motherboard and a socket board to which a plurality of connectors are simultaneously connected.

Claims (7)

delete In the DSA including a plurality of socket boards on which the semiconductor component to be tested is mounted and connected, and a plurality of connectors, A plurality of DSAs are combined and connected to the counter substrate, A predetermined ID number included in the DSA and assigned to the combination of the plurality of DSAs is set, the corresponding ID number is displayed, and whether or not the ID signal of the plurality of DSAs matches the ID signal of another DSA is detected. A plurality of ID setting board for outputting an ID signal, Each of the plurality of ID setting boards, An ID setting board substrate, a pair of ID signal output pads disposed on a surface of the counter substrate side in the ID setting board substrate; A pair of ID number setting pads connected to the pair of ID signal output pads and disposed on a rear surface of the ID setting board substrate; With a grounded GND pad, Each of the plurality of setting boards outputs a high or low signal by setting the ID number setting pad to GND or OPEN depending on whether or not the ID number setting pad and the GND pad are connected by a jumper wire. DSA. The method of claim 2, The ID setting board substrate is fixed by bolts, And the GND pad is grounded to the bolt. delete delete delete delete

Images