JPH11160392A - Bias testing furnace for semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a bias testing furnace in which a plurality of kinds of tests can be executed simultaneously by a method wherein power-supply lines which are connected mutually are installed at a connector and at a plurality of test boards for bias test and the test boards are connected in series via the connector. SOLUTION: A bias-testing-furnace connector 1 is formed to be a female connector, it is connected to a VDD1 and to a power supply 8 at a GND, and power-supply lines 20 which are used to apply a bias from the power supply 8 are installed. Single power-supply lines 21 which can apply the VDD1 and which are of one kind of type are formed at a plurality of test boards 4, 5, 6,... Male connector 7a and female connectors 7b are installed alternately at both end parts. The connectors 7b on the other side are fitted to the connectors 7a on one side. Thereby, the plurality of test boards 4, 5, 6,... are connected in series. The power-supplylines 20 are connected to the power-supply lines 21 of the test boards 4, 5, 6,.... In addition, a plurality of sockets 3 to which a semiconductor device is attached are connected in parallel with the respective power-supply lines 21.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device bias test furnace used mainly for performing a reliability test of a semiconductor device.

[0002]

2. Description of the Related Art In a conventional bias test furnace, as shown in FIG. 3, a single power supply line 104/105 is provided on a bias test furnace connector 101 and a single test board 102, and the test board 102 Connector 1 at the end of
06, and by inserting this connector 106 into the bias test furnace connector 101, the test board 102 is connected to the bias test furnace connector 101, and both power lines 104 and 105 are electrically connected.
Further, a plurality of sockets 103 for mounting a semiconductor device are provided on the test board 102, and these sockets 10 are provided.
3 was connected in parallel to the power supply line 105 of the test board 102, and a bias test was performed by applying a bias to each socket 103 via the power supply line 105.

[0003]

In such a conventional test furnace for bias test, only one type of test can be performed on one connector 101 of the bias test furnace. Therefore, there is a disadvantage that the bias test furnace connector 101 must be secured according to the number of types of tests. Further, since the number of sockets 103 provided per test board is constant, when the number of semiconductor devices to be tested is large, a large number of bias test furnace connectors 101 and test There is a problem that the substrate 102 is required. On the other hand, when the number of semiconductor devices to be tested is small, there is a problem that the efficiency is poor because a vacant socket is generated.

An object of the present invention is to provide a bias test furnace for semiconductor devices which has solved these problems.

[0005]

According to the present invention, a power supply line interconnected to a connector in a bias test furnace and a plurality of test boards for bias test provided with a socket for mounting a semiconductor device is provided. , And these test boards are connected in series via a connector.

[0006]

The bias test furnace for a semiconductor device according to the present invention has a test board for a bias test divided into a plurality of test boards, and any number of these test boards can be connected by a connector. Accordingly, test substrates can be connected in series. In addition, while providing multiple power lines to the bias test furnace connector and the test board,
By providing a plurality of sockets provided on each test board and making the connection form between the power supply line and the socket different for each test board, a plurality of types of tests can be simultaneously performed.

[0007]

Next, a first embodiment of the present invention will be described with reference to FIG. In this figure,
The bias test furnace connector 1 is a female connector, which is connected to a power supply 8 of VDD1 and GND, and is provided with one power supply line 20 for applying a bias from the power supply 8. In the present embodiment, a plurality of test boards are provided, and each test board 4.
Are formed in one type provided with a single power supply line 21 to which VDDl can be applied, and a male connector 7a and a female connector are provided at both ends thereof. 7b are provided alternately, and by fitting the female connector 7b of the other test board to the male connector 7a of one test board, a plurality of test boards 4 and 5 are provided.
.. Are connected in series, and the power supply line 20 of the power supply 8 and the power supply line 2 of each test board 4, 5, 6,.
1 are connected.

Further, each of the test substrates 4, 5, 6,...
Is provided with a plurality of sockets 3 to which a semiconductor device is attached.
.. Are connected in parallel to the respective power supply lines 21 every 5.

In the thus configured bias test furnace of the present embodiment, the number of connected test substrates 4, 5, 6,... Is selected according to the number of semiconductor devices to be tested. The number of sockets 3 corresponding to the number can be secured.

Next, a second embodiment of the present invention will be described with reference to FIG. In the bias test furnace shown in this figure, the bias test furnace connector 31 is a female socket, and a plurality of power supply lines 31, 32, 33 are provided.
Are provided, and power supplies 9, 10, and 11 are provided for the respective power supply lines 31, 32, and 33. Also, male connectors 7a and female connectors 7b are provided alternately at both ends of the test boards 34, 35, 36,.
The power supply lines 31.3 provided in the bias test furnace connector 31 are provided on the test boards 34, 35, 36,.
Two types of power supply lines 37, 38,
39 are provided, and a plurality of test substrates 34, 35, 36,... Are connected in series with each other by fitting the male connector 7a and another female connector 7b, and a bias test furnace is provided. Each power line 31 of the connector 31
32, 33 and the power supply lines 37, 38, 39 of the test boards 34, 35, 36,...

Each of the test boards 34, 35, 36,...
Are provided with a plurality of sockets 3. In the present embodiment, each socket 3 and each power supply line 37, 38.
The connection form with 39 is different from each other, for example,
In the test board 34, each socket 3 is connected in parallel to the power supply line 37, in the test board 35, each socket 3 is connected in parallel to the power supply line 38, and in the test board 36, each socket 3 is connected. The power line 39
And connected in parallel.

Also in this embodiment having the above-described configuration, an appropriate number of sockets is secured by selecting the number of connections of the test boards 34, 35, 36,... According to the number of semiconductor devices to be tested. Power supply lines 37, 38, 39 and socket 3 according to the type of test.
By selecting the connection form with the setting, setting according to various test forms becomes possible.

[0013]

As described above, according to the bias test furnace for a semiconductor device of the present invention, a test board for a bias test is divided into a plurality of test boards, and any number of these test boards can be connected by a connector. Thereby, test substrates can be connected in series according to the required number of tests of the semiconductor device. In addition, by providing a plurality of power supply lines on the bias test furnace connector and the test board, and by providing a plurality of sockets provided on each test board, the connection form between the power supply line and the socket is different for each test board. , Multiple types of tests can be performed simultaneously.

[Brief description of the drawings]

FIG. 1 is a plan view showing a first embodiment of the present invention.

FIG. 2 is a plan view showing a second embodiment of the present invention.

FIG. 3 is a plan view showing a conventional example.

[Explanation of symbols]

1.30 Bias test furnace connector 3 Socket 4.5.5.34.35.36 Test board 7a Male connector 7b Female connector 8.9.10.11 Power supply 31.32.33 Power supply line for bias test furnace connector 37 ・ 38 ・ 39 Power supply line for test board

Claims (6)

[Claims] A power supply line is provided for interconnecting a connector in a bias test furnace and a plurality of bias test test boards provided with sockets on which semiconductor devices are mounted. A bi-ice test furnace for semiconductor devices, which is connected in series via a connector. 2. The bias test furnace for a semiconductor device according to claim 1, wherein male connectors and female connectors are alternately provided at both ends of the test board and can be connected to each other. 3. The power supply line provided on the connector and each test board in the bias test furnace is a single power supply line, and these power supply lines are interconnected via the connector. Or a bias test furnace for a semiconductor device according to claim 2. 4. The semiconductor device according to claim 3, wherein a plurality of sockets provided on each of the test boards are provided, and each socket is connected in parallel to the power supply line. For bias test furnace. 5. A plurality of power supply lines are provided on a connector and each test board in the bias test furnace, and these power supply lines are connected to each other via the connector. The bias test furnace for a semiconductor device according to claim 1 or 2. 6. The bias test furnace for a semiconductor device according to claim 5, wherein the plurality of test substrates have different connection configurations between a plurality of sockets provided therein and a plurality of power supply lines, respectively.