KR100932408B1 - 스위치 매트릭스를 통한 데이터 전송을 개선하는 흐름 제어방법 - Google Patents

스위치 매트릭스를 통한 데이터 전송을 개선하는 흐름 제어방법 Download PDF

Info

Publication number
KR100932408B1
KR100932408B1 KR1020077020415A KR20077020415A KR100932408B1 KR 100932408 B1 KR100932408 B1 KR 100932408B1 KR 1020077020415 A KR1020077020415 A KR 1020077020415A KR 20077020415 A KR20077020415 A KR 20077020415A KR 100932408 B1 KR100932408 B1 KR 100932408B1
Authority
KR
South Korea
Prior art keywords
master
slave
data
slaves
request
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020077020415A
Other languages
English (en)
Korean (ko)
Other versions
KR20070104929A (ko
Inventor
제이 프라카시 수브라마니암 가나산
페리 윌만 주니어 레마클루스
Original Assignee
퀄컴 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 퀄컴 인코포레이티드 filed Critical 퀄컴 인코포레이티드
Publication of KR20070104929A publication Critical patent/KR20070104929A/ko
Application granted granted Critical
Publication of KR100932408B1 publication Critical patent/KR100932408B1/ko
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4022Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0038System on Chip
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
  • Communication Control (AREA)
  • Credit Cards Or The Like (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
  • Optical Communication System (AREA)
  • Small-Scale Networks (AREA)
KR1020077020415A 2005-02-10 2006-02-09 스위치 매트릭스를 통한 데이터 전송을 개선하는 흐름 제어방법 Expired - Fee Related KR100932408B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/055,922 US7246188B2 (en) 2005-02-10 2005-02-10 Flow control method to improve bus utilization in a system-on-a-chip integrated circuit
US11/055,922 2005-02-10
PCT/US2006/004936 WO2006086732A1 (en) 2005-02-10 2006-02-09 Flow control method to improve data transfer via a switch matrix

Publications (2)

Publication Number Publication Date
KR20070104929A KR20070104929A (ko) 2007-10-29
KR100932408B1 true KR100932408B1 (ko) 2009-12-17

Family

ID=36588894

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020077020415A Expired - Fee Related KR100932408B1 (ko) 2005-02-10 2006-02-09 스위치 매트릭스를 통한 데이터 전송을 개선하는 흐름 제어방법

Country Status (12)

Country Link
US (1) US7246188B2 (enExample)
EP (1) EP1846831B1 (enExample)
JP (3) JP4861339B2 (enExample)
KR (1) KR100932408B1 (enExample)
CN (1) CN100595744C (enExample)
AT (1) ATE491993T1 (enExample)
DE (1) DE602006018862D1 (enExample)
ES (1) ES2355054T3 (enExample)
IL (1) IL185067A0 (enExample)
MX (1) MX2007009732A (enExample)
PL (1) PL1846831T3 (enExample)
WO (1) WO2006086732A1 (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2407662B (en) * 2003-11-03 2006-02-22 Compxs Uk Ltd Two way serial communication
US7788625B1 (en) * 2005-04-14 2010-08-31 Xilinx, Inc. Method and apparatus for precharacterizing systems for use in system level design of integrated circuits
DE102005026436B4 (de) * 2005-06-08 2022-08-18 Austriamicrosystems Ag Schnittstellenanordnung, insbesondere für ein System-on-Chip, und deren Verwendung
US20070255874A1 (en) * 2006-04-28 2007-11-01 Jennings Kevin F System and method for target device access arbitration using queuing devices
US7908412B2 (en) * 2006-05-10 2011-03-15 Microsoft Corporation Buffer passing mechanisms
KR100854973B1 (ko) * 2007-02-13 2008-08-28 삼성전자주식회사 버스 매트릭스를 포함하는 시스템
DE102007015122A1 (de) * 2007-03-29 2008-10-02 Bayerische Motoren Werke Aktiengesellschaft Verfahren zum Transfer von Daten in mehrere Steuergeräte
US20100115323A1 (en) * 2007-04-11 2010-05-06 Panasonic Corporation Data store system, data restoration system, data store method, and data restoration method
US8156273B2 (en) * 2007-05-10 2012-04-10 Freescale Semiconductor, Inc. Method and system for controlling transmission and execution of commands in an integrated circuit device
CN101453313B (zh) * 2007-12-06 2013-03-20 鸿富锦精密工业(深圳)有限公司 主从设备通信电路
WO2010113291A1 (ja) * 2009-03-31 2010-10-07 富士通株式会社 データ転送回路及びデータ転送方法
US8984195B2 (en) * 2011-12-02 2015-03-17 Atmel Corporation Microcontroller including alternative links between peripherals for resource sharing
TWI617164B (zh) * 2012-10-19 2018-03-01 菲爾卻德半導體公司 用於操作與切換一單一導體介面之裝置及方法
WO2014156282A1 (ja) * 2013-03-25 2014-10-02 三菱電機株式会社 バスマスタ、バスシステム及びバス制御方法
GB2540610B (en) * 2015-07-23 2017-12-06 Advanced Risc Mach Ltd Gathering monitoring data relating to the operation of a data processing system
GB2551806B (en) * 2016-06-30 2020-06-03 Advanced Risc Mach Ltd Interface with buffered and direct pathways
CN111797051B (zh) * 2020-06-04 2022-05-17 深圳云天励飞技术股份有限公司 片上系统、数据传送方法及广播模块
DE102021106379A1 (de) * 2021-03-16 2022-09-22 Infineon Technologies Ag Master, Slave, Master-Slave-Kommunikations-System, On-Chip-Interconnect-System, Verfahren zum Betreiben eines Masters, Verfahren zum Betreiben eines Slaves, Verfahren zum Betreiben eines Master-Slave-Kommunikations-Systems und Verfahren zum Betreiben eines On-Chip-Interconnect-Systems
CN113765824A (zh) * 2021-10-15 2021-12-07 合肥移瑞通信技术有限公司 基于mbim接口的响应消息发送方法、装置、mbb设备及介质

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003014948A1 (en) 2001-08-07 2003-02-20 Broadlight Ltd. System architecture of a high bit rate switch module between functional units in a system on a chip

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5956524A (en) * 1990-04-06 1999-09-21 Micro Technology Inc. System and method for dynamic alignment of associated portions of a code word from a plurality of asynchronous sources
DE69323861T2 (de) 1993-01-25 1999-10-07 Bull Hn Information Systems Italia S.P.A., Pregnana Milanese Multiprozessorsystem mit gemeinsamem Speicher
US5581729A (en) * 1995-03-31 1996-12-03 Sun Microsystems, Inc. Parallelized coherent read and writeback transaction processing system for use in a packet switched cache coherent multiprocessor system
US5907485A (en) * 1995-03-31 1999-05-25 Sun Microsystems, Inc. Method and apparatus for flow control in packet-switched computer system
US5761516A (en) * 1996-05-03 1998-06-02 Lsi Logic Corporation Single chip multiprocessor architecture with internal task switching synchronization bus
US6516442B1 (en) * 1997-12-07 2003-02-04 Conexant Systems, Inc. Channel interface and protocols for cache coherency in a scalable symmetric multiprocessor system
US6065077A (en) * 1997-12-07 2000-05-16 Hotrail, Inc. Apparatus and method for a cache coherent shared memory multiprocessing system
US6347344B1 (en) * 1998-10-14 2002-02-12 Hitachi, Ltd. Integrated multimedia system with local processor, data transfer switch, processing modules, fixed functional unit, data streamer, interface unit and multiplexer, all integrated on multimedia processor
US6715023B1 (en) * 1999-09-23 2004-03-30 Altera Corporation PCI bus switch architecture
US6441479B1 (en) * 2000-03-02 2002-08-27 Micron Technology, Inc. System-on-a-chip with multi-layered metallized through-hole interconnection
KR100716950B1 (ko) * 2000-08-11 2007-05-10 삼성전자주식회사 버스 시스템
JP4024484B2 (ja) * 2001-03-13 2007-12-19 株式会社リコー バスアービタ
JP2003030134A (ja) * 2001-07-12 2003-01-31 Matsushita Electric Ind Co Ltd バスアービタ及びバスアービトレーション方法
US6857035B1 (en) * 2001-09-13 2005-02-15 Altera Corporation Methods and apparatus for bus mastering and arbitration
DE60211874T2 (de) * 2002-06-20 2007-05-24 Infineon Technologies Ag Anordnung von zwei Geräten, verbunden durch einen Kreuzvermittlungsschalter
JP2004126646A (ja) * 2002-09-30 2004-04-22 Canon Inc バス制御方法
JP2005234932A (ja) * 2004-02-20 2005-09-02 Oki Electric Ind Co Ltd マトリックス状バス接続システムとその低電力方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003014948A1 (en) 2001-08-07 2003-02-20 Broadlight Ltd. System architecture of a high bit rate switch module between functional units in a system on a chip

Also Published As

Publication number Publication date
CN100595744C (zh) 2010-03-24
JP5456632B2 (ja) 2014-04-02
WO2006086732A1 (en) 2006-08-17
JP2012038325A (ja) 2012-02-23
MX2007009732A (es) 2007-09-26
EP1846831B1 (en) 2010-12-15
PL1846831T3 (pl) 2011-04-29
JP2008530694A (ja) 2008-08-07
ES2355054T3 (es) 2011-03-22
JP2011048838A (ja) 2011-03-10
WO2006086732A9 (en) 2006-10-19
CN101203839A (zh) 2008-06-18
HK1114213A1 (zh) 2008-10-24
EP1846831A1 (en) 2007-10-24
ATE491993T1 (de) 2011-01-15
US7246188B2 (en) 2007-07-17
KR20070104929A (ko) 2007-10-29
DE602006018862D1 (de) 2011-01-27
JP4861339B2 (ja) 2012-01-25
IL185067A0 (en) 2007-12-03
US20060179192A1 (en) 2006-08-10
JP5456743B2 (ja) 2014-04-02

Similar Documents

Publication Publication Date Title
KR100932408B1 (ko) 스위치 매트릭스를 통한 데이터 전송을 개선하는 흐름 제어방법
US5790813A (en) Pre-arbitration system allowing look-around and bypass for significant operations
JP2002530744A (ja) 多重レベル接続識別を備えた通信のシステムおよび方法
KR20050043426A (ko) 파이프라인 버스 시스템에서 커맨드 전송 방법 및 장치
KR100644596B1 (ko) 버스 시스템 및 그 버스 중재방법
JP4184614B2 (ja) バスシステム及びその実行順序の調整方法
US9135195B2 (en) Prediction of electronic component behavior in bus-based systems
EP1564646A2 (en) Configurable embedded processor
TWI464598B (zh) 預設為猜測式資料交易的匯流排裝置及其非猜測的延伸
CN101258476B (zh) 延迟的存储器访问请求仲裁
US7913013B2 (en) Semiconductor integrated circuit
US7031337B2 (en) Data processing apparatus and slave interface mechanism for controlling access to a slave logic unit by a plurality of master logic units
EP2280349A1 (en) Processor and data transfer method
US7167939B2 (en) Asynchronous system bus adapter for a computer system having a hierarchical bus structure
HK1114213B (en) System-on-chip integrated circuit, electronic system and method of transferring data therein
TWI724608B (zh) 微控制器架構及架構內資料讀取方法
JP2009169559A (ja) データ転送装置
JPS60147866A (ja) バス制御方式
JPS62175851A (ja) メモリ管理システム

Legal Events

Date Code Title Description
A201 Request for examination
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U12-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

FPAY Annual fee payment

Payment date: 20121129

Year of fee payment: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

FPAY Annual fee payment

Payment date: 20131129

Year of fee payment: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

FPAY Annual fee payment

Payment date: 20141128

Year of fee payment: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

FPAY Annual fee payment

Payment date: 20150930

Year of fee payment: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

FPAY Annual fee payment

Payment date: 20161125

Year of fee payment: 8

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

FPAY Annual fee payment

Payment date: 20170929

Year of fee payment: 9

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 9

FPAY Annual fee payment

Payment date: 20180928

Year of fee payment: 10

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 10

FPAY Annual fee payment

Payment date: 20190924

Year of fee payment: 11

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 11

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 12

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 13

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 14

PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20231210

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20231210