KR100813801B1 - Image sensor with improved light sensitivity and fabricating method of the same - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image sensor, and more particularly, to provide an image sensor and a method of manufacturing the same, which can improve light sensitivity by increasing the photodiode area of a unit pixel. layer; A plurality of neighboring first conductive channel stop regions extending from the surface of the semiconductor layer to the first depth in the semiconductor layer; And a photodiode formed at a second depth from the surface of the semiconductor layer and having one side and the other side in contact with the neighboring channel stop region, respectively.

In addition, the present invention includes forming a plurality of channel stop regions of the first conductive type adjacent to a first depth in contact with the surface of the semiconductor layer inside the semiconductor layer of the first conductive type; Forming a first impurity region for a photodiode of a second conductivity type in a second depth in the semiconductor layer, the one side and the other side of which are in contact with the neighboring channel stop region; Forming a gate electrode on the semiconductor layer between the adjacent channel stop regions; Forming a second impurity region for a photodiode of a second conductivity type on the first impurity region in the semiconductor layer such that one side thereof is in contact with the channel stop region and the other side thereof is aligned with one side of the gate electrode; And forming a third impurity region for a photodiode of a first conductivity type at an interface in contact with the semiconductor layer above the second impurity region.

Photodiode, light sensitivity, channel stop area, floating sensing node.

Description

Image sensor with improved light sensitivity and fabricating method of the same}             

1 is a unit pixel circuit diagram of a conventional CMOS image sensor;

2 is a cross-sectional view showing an image sensor according to the prior art,

3A to 3E are cross-sectional views illustrating an image sensor manufacturing process according to an embodiment of the present invention;

4 is a sectional view showing an image sensor according to the present invention;

Explanation of symbols on the main parts of the drawings

Sub: Semiconductor Layer

PD: Photodiode

CST: Channel Stop Area

FD: floating sensing node

Fox: Field Insulation

Tx: gate electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor devices, and more particularly to an image sensor, and more particularly, to an image sensor capable of improving light sensitivity and a method of manufacturing the same.

In general, an image sensor is a semiconductor device that converts an optical image into an electrical signal. In a double charge coupled device (CCD), individual metal-oxide-silicon (MOS) capacitors are very different from each other. A device in which charge carriers are stored and transported in a capacitor while being located in close proximity, and CMOS (Complementary MOS) image sensor is a CMOS technology that uses a control circuit and a signal processing circuit as peripheral circuits. Is a device that employs a switching method that creates MOS transistors by the number of pixels and sequentially detects the output using them.

In the manufacture of such various image sensors, efforts are being made to increase the photo sensitivity of the image sensor, one of which is a condensing technology. For example, a CMOS image sensor is composed of a photodiode for detecting light and a portion of a CMOS logic circuit for processing the detected light into an electrical signal to make data. To increase light sensitivity, the ratio of the photodiode to the total image sensor area is increased. Efforts have been made to increase (usually referred to as Fill Factor).                         

FIG. 1 is a unit pixel circuit diagram of a conventional CMOS image sensor, and a submicron CMOS Epi process is applied to increase sensitivity and reduce cross talk effects between unit pixels.

The unit pixel is composed of one low voltage buried photodiode and four NMOS transistors. Unlike the conventional photo gate structure, the low voltage buried photodiode has a polysilicon with a light sensing region. Not only is it covered, it has excellent light sensitivity for short wavelength blue light as well as increase the depth of depletion in the light sensing area, so the light sensitivity for long wavelength red or infrared light is also excellent. On the other hand, the low-voltage buried photodiode structure allows photogenerated charges in the photosensitive area to be completely transported to the Floating Sensing Node, which significantly increases the charge transfer efficiency. There are advantages to it.

In addition, the transfer gate (Tx), that is, the gate electrode and the reset gate (Rx), which transfer photocharges among the four transistors, is caused by a voltage drop due to a positive threshold voltage. In order to prevent the loss of charge transport efficiency, the NMOS transistor has a negative threshold voltage. In this case, the N-LDD ion implantation is omitted so that the overlap capacitance between the gate electrode and the reset gate and the floating sensing node is reduced. (Overlap Capacitance) can be lowered, so that the potential change of the floating sensing node can be amplified according to the amount of charge carried. (△ V-ΔQ / C)                         

Meanwhile, the drive gate (Sx) serving as a source follower is composed of a general submicron NMOS transistor. This structure was constructed with minimal changes to the submicron CMOS Epi process, and the thermal cycle was designed to be completely unchanged. On the other hand, a color filter array composed of red, green, blue, or yellow, magenta, cyan, and the like on a unit pixel array for implementing a color image. (Color Filter Array) The process of forming.

The operation principle of obtaining an output from such a unit pixel is as follows.

end. Turn off Tx, Rx, Sx. The low voltage buried photodiode is then fully depletion.

I. Photogenerated charge is collected in a low voltage buried photo diode.

All. After a proper integration time, the Rx is turned on to reset the floating sensing node first.

la. The unit pixel is turned on by turning on Sx.

hemp. Measure the output voltage (V1) of the source follower buffer. This value simply means the CD level shift of the Floating Sensing Node (FD).

bar. Turn on Tx.

four. All photogenerated charges are shipped in FD.                         

Ah. Turn off Tx.

character. Measure the output voltage (V2) of the source follower buffer.

car. The output signals V1-V2 are the result of the photocharge transport resulting from the difference between V1 and V2 and are pure signal values without noise. This method is called CDS (Corelated Double Sampling).

Ka. Repeat the process of 'a' to 'tea'. However, the low voltage buried photodiode is fully depleted during the 'dead' process.

2 is a cross-sectional view showing an image sensor according to the prior art.

Referring to FIG. 2, a P0 and an n- structure photodiode (hereinafter referred to as PD) are formed in the semiconductor layer 10 through a process such as ion implantation, and the data interference between neighboring PDs is prevented. A P-type channel stop region (hereinafter referred to as CST) is formed to prevent cross talk, and CST is typically formed under the field insulating film Fox through P-type impurity ion implantation. In addition, a transfer gate (hereinafter referred to as Tx) is formed on the semiconductor layer 10 in which one side is in contact with the PD, and an FD is formed in contact with the other side of the Tx.

Here, the semiconductor layer 10 includes a structure in which a high concentration of P ++ layer P-Epi layer is stacked or a P-well.

On the other hand, in the conventional image sensor as described above, the PD is not present in the lower portion of the Tx and Fox, but exists only in a certain portion, so that the ratio of PD in the unit pixel area is small, resulting in low light sensitivity. do.

The present invention proposed to solve the problems of the prior art as described above, an object of the present invention is to provide an image sensor and a manufacturing method that can improve the light sensitivity by increasing the photodiode area in the unit pixel.

In order to achieve the above object, the present invention, the first conductive semiconductor layer; A plurality of neighboring first conductive channel stop regions extending from the surface of the semiconductor layer to the first depth in the semiconductor layer; And a photodiode formed at a second depth from the surface of the semiconductor layer and having one side and the other side in contact with the neighboring channel stop region, respectively.

In addition, to achieve the above object, the present invention includes the steps of forming a plurality of first conductive type channel stop region adjacent to the first depth in contact with the surface of the semiconductor layer inside the semiconductor layer of the first conductive type; Forming a first impurity region for a photodiode of a second conductivity type in a second depth in the semiconductor layer, the one side and the other side of which are in contact with the neighboring channel stop region; Forming a gate electrode on the semiconductor layer between the adjacent channel stop regions; Forming a second impurity region for a photodiode of a second conductivity type on the first impurity region in the semiconductor layer such that one side thereof is in contact with the channel stop region and the other side thereof is aligned with one side of the gate electrode; And forming a third impurity region for a photodiode of a first conductivity type at an interface in contact with the semiconductor layer on the second impurity region.

The present invention is characterized by improving the light sensitivity of the photodiode by extending the low concentration N-type impurity region below the gate electrode and the floating sensing node to maximize the area of the photodiode in the image sensor constituting the unit pixel. .

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. 4 is a cross-sectional view showing an image sensor of the present invention.

Referring to FIG. 4, the image sensor of the present invention has a P-type semiconductor layer Sub in which a high concentration P ++ substrate and a P epi layer are stacked, and is extended from the surface of the semiconductor layer Sub in the semiconductor layer Sub to 2 μm. A plurality of neighboring P-type channel stop regions P + and CST formed to a depth of ˜5 μm and a depth of 2 μm to 4 μm from the surface of the semiconductor layer Sub, and adjacent channel stop regions CST. ) And a gate electrode (for example, a transfer gate, hereinafter referred to as Tx) formed on the semiconductor layer Sub between one side and the other side and the adjacent channel stop region CST. The photodiode PD is in contact with the channel stop region CST and formed at a depth of 2 μm to 4 μm from the surface of the semiconductor layer Sub, and the other side thereof is adjacent to the channel stop region CST. N-type impurity region (n-) in contact with one side is in contact with channel stop region (CST), and the other side is gated The P-type impurity region P0 is aligned on one side of the electrode Tx and formed at an interface in contact with the semiconductor layer Sub on the n− region.

In the image sensor of the present invention having the above-described configuration, the n-region constituting the PD is extended to the lower portion of the Tx and the FD, so that the light sensitivity can be improved as the area thereof becomes wider.

Meanwhile, the manufacturing process of the image sensor having the above configuration will be described in detail with reference to FIGS. 3A to 3E.

First, as shown in FIG. 3A, a field insulating film 21 having a shallow trench isolation (STI) structure is formed on a P-type semiconductor layer 20, and then an ion implantation mask 22 for forming a channel stop region is formed. do. Subsequently, a channel stop region (CST, hereinafter referred to as CST) is narrowly and deeply formed under the semiconductor layer 20 by ion implantation of a high concentration of P-type (P +) impurities using the ion implantation mask 22. In order to prevent crosstalk, it is preferable to align the center portion of the field insulating film 21 to a depth of 2 µm to 5 µm.

Here, since the semiconductor layer 20 uses a stacked P ++ layer and a P- epi layer having a high concentration, it is omitted for the sake of simplicity.

Next, as shown in FIG. 3B, the ion implantation mask 22 for forming the CST is removed, and then an N-type impurity ion implantation mask 23 for the photodiode is formed, and high energy is applied to contact the neighboring CST. N1-region is formed in the lower part of the semiconductor layer 20 by the depth of 2 micrometers-5 micrometers from a surface.                     

Therefore, the region of the PD is formed over all regions such as Tx and FD formed by the subsequent process.

Next, as shown in FIG. 3C, the ion implantation mask 23 is removed, and then a gate electrode Tx including the gate insulating film and the gate conductive film 25 is formed on the semiconductor layer 20 between CSTs. Next, an ion implantation mask is formed. Subsequently, an n2-region for photodiode aligned with Tx and in contact with CST is formed using an ion implantation mask, and the PD is formed by n1-region extending to the lower CST and n2-region aligned to the upper Tx. The area of n-area occupies in the unit pixel is enlarged.

Next, as shown in FIG. 3D, the ion implantation mask 26 is removed, and then the P-type implantation mask 28 is formed, and then, through the high concentration and low energy ion implantation using the ion implantation mask 28. A P0 region is formed in contact with the semiconductor layer 20 over the n2-region.

In this case, the process may be performed in a blanket without the P0 forming ion implantation mask 28 for the purpose of process simplification.

Next, as shown in FIG. 3E, the P0 ion implantation mask 28 is removed, and a high concentration of N-type FD (n +), which is in contact with Tx and CST, is formed. It is desirable to.

The present invention described above has been found through the embodiment that the light sensitivity of the image sensor can be improved by extending the PD area in the unit pixel by extending the n-region of the PD to the lower Tx and FD.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

The present invention described above can improve the light sensitivity of the photodiode by widening the area of the photodiode occupied in the unit pixel, and ultimately, the excellent effect of greatly improving the performance of the image sensor can be expected.

Claims (10)

delete delete A first conductive semiconductor layer; A plurality of neighboring first conductive channel stop regions extending from the surface of the semiconductor layer to the first depth in the semiconductor layer; And A gate electrode formed on the semiconductor layer between the adjacent channel stop regions; A first impurity region of a second conductivity type for a photodiode, the one side of which is in contact with the channel stop region and is formed at a second depth shallower than the first depth from the surface of the semiconductor layer, the other side of which is in contact with the adjacent channel stop region; A second impurity region of a second conductive type for photodiode, wherein one side of the channel stop region is in contact with the channel stop region and the other side of the semiconductor layer is aligned with one side of the gate electrode; And A third impurity region of the first conductive type for photodiode formed at an interface in contact with the semiconductor layer above the second impurity region Image sensor comprising a. The method of claim 3, wherein The first depth is 2㎛ to 5㎛, the second depth is an image sensor, characterized in that 2㎛ to 4㎛. The method according to claim 3 or 4, The first conductive type is a P-type, the second conductive type is an image sensor, characterized in that the N-type. Forming a plurality of channel stop regions of a first conductive type adjacent to a first depth in contact with a surface of the semiconductor layer in a first conductive semiconductor layer; Forming a first impurity region of a second type of photoconductor for the photodiode at a second depth smaller than the first depth in the semiconductor layer, the one side and the other side of which are in contact with the neighboring channel stop region; Forming a gate electrode on the semiconductor layer between the adjacent channel stop regions; Forming a second impurity region of a second conductive type for photodiode on the first impurity region in the semiconductor layer such that one side of the channel stop region is in contact with another side thereof and is aligned with one side of the gate electrode; And Forming a third impurity region of a first conductivity type for a photodiode at an interface in contact with the semiconductor layer on the second impurity region; Image sensor manufacturing method comprising. The method of claim 6, And ion implantation in the forming of the first to third impurity regions and the channel stop region. The method of claim 6, The first depth is 2㎛ to 5㎛, the second depth is 2㎛ to 4㎛ manufacturing method of the image sensor. The method of claim 6, After forming the gate electrode, Forming a second conductive floating sensing node in contact with the other side of the gate electrode and the channel stop region through ion implantation, but having a third depth shallower than the second depth; Image sensor manufacturing method. The method according to claim 6 or 9, The first conductive type is a P-type, the second conductive type is an image sensor manufacturing method, characterized in that the N-type.

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