KR100739082B1 - 피막 형성 방법 - Google Patents
피막 형성 방법 Download PDFInfo
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- KR100739082B1 KR100739082B1 KR1020010003715A KR20010003715A KR100739082B1 KR 100739082 B1 KR100739082 B1 KR 100739082B1 KR 1020010003715 A KR1020010003715 A KR 1020010003715A KR 20010003715 A KR20010003715 A KR 20010003715A KR 100739082 B1 KR100739082 B1 KR 100739082B1
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Classifications
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
- H01L21/02216—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (4)
- 반도체 웨이퍼 또는 유리 기판과 같은 판상(板狀) 피처리물의 표면에 유기 SOG 또는 무기 SOG를 도포하는 단계;쿨 플레이트(cool plate)에 근접시켜 상기 판상 피처리물의 표면 온도가 200℃까지 상승하기 전에 분위기 중의 산소 농도를 1% 이하로 낮추는 단계;상기 분위기 중의 산소 농도를 1% 이하에 유지한 채 상기 판상 피처리물을 400℃ 이상으로 되기까지 가열하는 단계; 및상기 판상 피처리물의 표면 온도가 200℃로 떨어질 때까지 상기 분위기 중의 산소 농도를 1% 이하로 유지하는 단계를 포함하는 것을 특징으로 하는 피막 형성 방법.
- 제 1 항에 있어서, N2 가스를 퍼징(purging)하여 상기 분위기 중의 산소 농도를 1% 이하로 낮추는 것을 특징으로 하는 피막 형성 방법.
- 제 1 항에 있어서, 상기 피막 형성 방법이, 상부에 핫 플레이트(hot plate)가 배치되어 있고, 하부에 쿨 플레이트(cool plate)가 배치되어 있는 하나의 베이킹 노(爐) 내에서 행해지고, 그 베이킹 노 내에서, 승강 수단에 의해 상기 판상 피처리물이 선택적으로 상기 핫 플레이트와 상기 쿨 플레이트 중 어느 하나에 근접되는 것을 특징으로 하는 피막 형성 방법.
- 제 1 항 내지 제 3 항 중 어느 한 항에 있어서, 상기 피막 형성 방법이 다마신법(damascene method)에 의해 층간절연막을 형성하는데 적용되는 것을 특징으로 하는 피막 형성 방법.
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JP2000018261A JP3973335B2 (ja) | 2000-01-27 | 2000-01-27 | 被膜形成方法 |
JP2000-18261 | 2000-01-27 |
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KR20010078073A KR20010078073A (ko) | 2001-08-20 |
KR100739082B1 true KR100739082B1 (ko) | 2007-07-13 |
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KR1020010003715A KR100739082B1 (ko) | 2000-01-27 | 2001-01-26 | 피막 형성 방법 |
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US (2) | US20010038884A1 (ko) |
JP (1) | JP3973335B2 (ko) |
KR (1) | KR100739082B1 (ko) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
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JP3631236B2 (ja) | 2002-07-12 | 2005-03-23 | 東京応化工業株式会社 | シリカ系有機被膜の製造方法 |
JP5128044B2 (ja) | 2003-12-10 | 2013-01-23 | 東京応化工業株式会社 | シリコン基板又は金属配線パターンが設けられたシリコン基板被覆用シリカ系被膜形成用材料の製造方法 |
JP2008078617A (ja) * | 2006-08-25 | 2008-04-03 | Canon Inc | 構造体の製造方法 |
JP2011114165A (ja) * | 2009-11-26 | 2011-06-09 | Ube Nitto Kasei Co Ltd | 素子分離材料用塗布液の作製方法、素子分離材料用塗布液、素子分離層用薄膜、素子分離層用薄膜の形成方法、基板、及び、基板の形成方法 |
JP2011114164A (ja) * | 2009-11-26 | 2011-06-09 | Ube Nitto Kasei Co Ltd | 素子分離材料用塗布液の作製方法、素子分離材料用塗布液、素子分離層用薄膜、素子分離層用薄膜の形成方法、基板、及び、基板の形成方法 |
JP2011114163A (ja) * | 2009-11-26 | 2011-06-09 | Ube Nitto Kasei Co Ltd | 素子分離材料用塗布液、素子分離材料用塗布液の作製方法、素子分離層用薄膜、素子分離層用薄膜の形成方法、基板、及び、基板の形成方法 |
JP5462603B2 (ja) * | 2009-11-26 | 2014-04-02 | 宇部エクシモ株式会社 | 素子分離材料用塗布液、素子分離材料用塗布液の作製方法、素子分離層用薄膜、素子分離層用薄膜の形成方法、基板、及び、基板の形成方法 |
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JPH09199503A (ja) | 1996-01-23 | 1997-07-31 | Sony Corp | 半導体装置およびその製造方法 |
JP3209072B2 (ja) | 1996-02-07 | 2001-09-17 | ソニー株式会社 | 絶縁膜の形成方法 |
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JPH1187510A (ja) | 1997-07-10 | 1999-03-30 | Kawasaki Steel Corp | 配線構造およびこの配線構造の形成方法ならびにこの配線構造を適用する半導体集積回路 |
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US6387825B2 (en) * | 1998-11-12 | 2002-05-14 | Advanced Micro Devices, Inc. | Solution flow-in for uniform deposition of spin-on films |
US6225240B1 (en) * | 1998-11-12 | 2001-05-01 | Advanced Micro Devices, Inc. | Rapid acceleration methods for global planarization of spin-on films |
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US6143360A (en) * | 1999-12-13 | 2000-11-07 | Dow Corning Corporation | Method for making nanoporous silicone resins from alkylydridosiloxane resins |
WO2001084621A1 (en) * | 2000-04-27 | 2001-11-08 | Ebara Corporation | Rotation holding device and semiconductor substrate processing device |
-
2000
- 2000-01-27 JP JP2000018261A patent/JP3973335B2/ja not_active Expired - Fee Related
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2001
- 2001-01-23 US US09/768,195 patent/US20010038884A1/en not_active Abandoned
- 2001-01-26 KR KR1020010003715A patent/KR100739082B1/ko active IP Right Grant
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Patent Citations (2)
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JPH0245929A (ja) * | 1988-08-05 | 1990-02-15 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
JPH1098037A (ja) * | 1996-09-19 | 1998-04-14 | Sony Corp | Sog材料の成膜方法及びsog材料の成膜装置 |
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US20050009363A1 (en) | 2005-01-13 |
US20010038884A1 (en) | 2001-11-08 |
US7300889B2 (en) | 2007-11-27 |
JP2001210633A (ja) | 2001-08-03 |
JP3973335B2 (ja) | 2007-09-12 |
KR20010078073A (ko) | 2001-08-20 |
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