KR100689317B1 - 자기장 결정화방법 - Google Patents
자기장 결정화방법 Download PDFInfo
- Publication number
- KR100689317B1 KR100689317B1 KR1020040088964A KR20040088964A KR100689317B1 KR 100689317 B1 KR100689317 B1 KR 100689317B1 KR 1020040088964 A KR1020040088964 A KR 1020040088964A KR 20040088964 A KR20040088964 A KR 20040088964A KR 100689317 B1 KR100689317 B1 KR 100689317B1
- Authority
- KR
- South Korea
- Prior art keywords
- crystallization
- amorphous silicon
- layer
- magnetic field
- semiconductor layer
- Prior art date
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B30/00—Production of single crystals or homogeneous polycrystalline material with defined structure characterised by the action of electric or magnetic fields, wave energy or other specific physical conditions
- C30B30/04—Production of single crystals or homogeneous polycrystalline material with defined structure characterised by the action of electric or magnetic fields, wave energy or other specific physical conditions using magnetic fields
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/0257—Doping during depositing
- H01L21/02573—Conductivity type
- H01L21/02576—N-type
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/0257—Doping during depositing
- H01L21/02573—Conductivity type
- H01L21/02579—P-type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/326—Application of electric currents or fields, e.g. for electroforming
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Recrystallisation Techniques (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
Claims (7)
- 기판상에 버퍼층을 형성하는 단계;상기 버퍼층상에 반도체층을 형성하는 단계;상기 반도체층상에 3족 또는 5족 이온으로 구성된 불순물 이온을 포함시키는 단계; 및상기 반도체층에 교번자기장을 인가하면서 결정화하는 단계를 포함하는 것을 특징으로 하는 결정화 방법.
- 제 1항에 있어서, 상기 반도체층은 비정질실리콘층인 것을 특징으로 하는 결정화 방법.
- 삭제
- 제 1항에 있어서, 상기 3족이온은 붕소이온인 것을 특징으로 하는 결정화 방법.
- 제 4항에 있어서, 상기 반도체층에 주입되는 붕소이온의 농도는 1010/㎠~ 1013/㎠인 것을 특징으로 하는 결정화 방법.
- 제 1 항에 있어서, 상기 반도체층 형성단계와 상기 반도체층상에 불순물이온을 포함시키는 단계는 동시에 이루어지는 것을 특징으로 하는 결정화 방법.
- 제 6항에 있어서, 상기 반도체층 형성단계는플라즈마상태의 반도체입자가 증착되는 단계에서 상기 불순물이온이 동시에 혼합증착되는 것을 특징으로 하는 결정화 방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020040088964A KR100689317B1 (ko) | 2004-11-03 | 2004-11-03 | 자기장 결정화방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020040088964A KR100689317B1 (ko) | 2004-11-03 | 2004-11-03 | 자기장 결정화방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20060039753A KR20060039753A (ko) | 2006-05-09 |
KR100689317B1 true KR100689317B1 (ko) | 2007-03-08 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1020040088964A KR100689317B1 (ko) | 2004-11-03 | 2004-11-03 | 자기장 결정화방법 |
Country Status (1)
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KR (1) | KR100689317B1 (ko) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101288116B1 (ko) * | 2006-12-19 | 2013-07-18 | 엘지디스플레이 주식회사 | 폴리 실리콘 액정표시장치용 어레이 기판 및 그 제조방법 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004172610A (ja) | 2002-11-08 | 2004-06-17 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法、半導体装置及びレーザ照射装置 |
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2004
- 2004-11-03 KR KR1020040088964A patent/KR100689317B1/ko active IP Right Grant
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004172610A (ja) | 2002-11-08 | 2004-06-17 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法、半導体装置及びレーザ照射装置 |
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KR20060039753A (ko) | 2006-05-09 |
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