KR100651806B1 - 리이드 프레임, 리이드 프레임을 구비한 반도체 팩키지및, 반도체 팩키지의 제조 방법 - Google Patents
리이드 프레임, 리이드 프레임을 구비한 반도체 팩키지및, 반도체 팩키지의 제조 방법 Download PDFInfo
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- KR100651806B1 KR100651806B1 KR1020040052305A KR20040052305A KR100651806B1 KR 100651806 B1 KR100651806 B1 KR 100651806B1 KR 1020040052305 A KR1020040052305 A KR 1020040052305A KR 20040052305 A KR20040052305 A KR 20040052305A KR 100651806 B1 KR100651806 B1 KR 100651806B1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
Claims (7)
- 다이 패드;상기 다이 패드의 주변부에서 연장되는 복수개의 이너 리이드; 및,상기 다이 패드 표면의 일측에 접착된 접착 테이프;를 구비하고,상기 접착 테이프는 리이드 프레임을 구비한 반도체 팩키지의 엔캡슐레이션 작업시에 몰드 안에서 몰딩 수지가 균일하게 유동할 수 있도록 유동 저항을 제공하고,상기 접착 테이프의 두께는, 상기 다이 패드의 표면에 부착될 반도체 다이와 반도체 팩키지 표면 사이의 거리가 상기 접착 테이프의 표면과 상기 반도체 팩키지 표면 사이의 거리와 실질적으로 같도록 설정되는 것을 특징으로 하는 리이드 프레임.
- 삭제
- 제 1 항에 있어서,상기 접착 테이프는 상기 리이드 프레임을 구비한 반도체 팩키지의 몰딩후의 반도체 팩키지의 열적 팽창 및, 수축시에 반도체 팩키지내의 국부적인 크랙을 방지할 수 있는 것을 특징으로 하는 리이드 프레임.
- 삭제
- 제 1 항에 있어서,상기 접착 테이프는 "l" 자 형상, "ㅁ" 자 형상, "역의 ㄴ" 자 형상, 또는 " 역의 ㄷ" 자 형상들중 하나의 형상을 구비하는 것을 특징으로 하는 리이드 프레임.
- 다이 패드;상기 다이 패드의 주변부에서 연장되는 복수개의 이너 리이드;상기 다이 패드의 표면에 부착된 반도체 다이;상기 다이 패드 표면에서 상기 반도체 다이의 위치에 따라서 정해지는 일측의 위치에 접착된 접착 테이프;상기 반도체 다이의 전극과 상기 이너 리이드를 연결하는 골드 와이어; 및,상기 다이 패드, 이너 리이드, 반도체 다이 및, 골드 와이어를 둘러싸서 외장을 형성하는 엔캡슐레이션;을 구비하고,상기 접착 테이프는 리이드 프레임을 구비한 반도체 팩키지의 엔캡슐레이션 작업시에 몰드 안에서 몰딩 수지가 균일하게 유동할 수 있도록 유동 저항을 제공하고,상기 접착 테이프의 두께는, 상기 다이 패드의 표면에 부착될 반도체 다이와 반도체 팩키지 표면 사이의 거리가 상기 접착 테이프의 표면과 상기 반도체 팩키지 표면 사이의 거리와 실질적으로 같도록 설정되는 것을 특징으로 하는 반도체 팩키지.
- 삭제
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KR1020040052305A KR100651806B1 (ko) | 2004-07-06 | 2004-07-06 | 리이드 프레임, 리이드 프레임을 구비한 반도체 팩키지및, 반도체 팩키지의 제조 방법 |
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KR1020040052305A KR100651806B1 (ko) | 2004-07-06 | 2004-07-06 | 리이드 프레임, 리이드 프레임을 구비한 반도체 팩키지및, 반도체 팩키지의 제조 방법 |
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KR20060003424A KR20060003424A (ko) | 2006-01-11 |
KR100651806B1 true KR100651806B1 (ko) | 2006-12-01 |
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KR1020040052305A KR100651806B1 (ko) | 2004-07-06 | 2004-07-06 | 리이드 프레임, 리이드 프레임을 구비한 반도체 팩키지및, 반도체 팩키지의 제조 방법 |
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