KR100596832B1 - 적층된커패시터내의확산을최소화하기위해실리콘플러그상에형성된장치및방법 - Google Patents

적층된커패시터내의확산을최소화하기위해실리콘플러그상에형성된장치및방법 Download PDF

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Publication number
KR100596832B1
KR100596832B1 KR1019980056378A KR19980056378A KR100596832B1 KR 100596832 B1 KR100596832 B1 KR 100596832B1 KR 1019980056378 A KR1019980056378 A KR 1019980056378A KR 19980056378 A KR19980056378 A KR 19980056378A KR 100596832 B1 KR100596832 B1 KR 100596832B1
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KR
South Korea
Prior art keywords
layer
silicon
oxide layer
forming
plug
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1019980056378A
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English (en)
Korean (ko)
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KR19990063238A (ko
Inventor
크리스틴 뎀
스티븐 케이. 로
카로스 마주르
Original Assignee
인터내셔널 비지네스 머신즈 코포레이션
지멘스 악티엔게젤샤프트
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Application filed by 인터내셔널 비지네스 머신즈 코포레이션, 지멘스 악티엔게젤샤프트 filed Critical 인터내셔널 비지네스 머신즈 코포레이션
Publication of KR19990063238A publication Critical patent/KR19990063238A/ko
Application granted granted Critical
Publication of KR100596832B1 publication Critical patent/KR100596832B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H10D1/696—Electrodes comprising multiple layers, e.g. comprising a barrier layer and a metal layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H10B12/0335—Making a connection between the transistor and the capacitor, e.g. plug
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/914—Doping
    • Y10S438/922—Diffusion along grain boundaries

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1019980056378A 1997-12-19 1998-12-19 적층된커패시터내의확산을최소화하기위해실리콘플러그상에형성된장치및방법 Expired - Fee Related KR100596832B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US8/994,275 1997-12-19
US08/994,275 1997-12-19
US08/994,275 US6228701B1 (en) 1997-12-19 1997-12-19 Apparatus and method for minimizing diffusion in stacked capacitors formed on silicon plugs

Publications (2)

Publication Number Publication Date
KR19990063238A KR19990063238A (ko) 1999-07-26
KR100596832B1 true KR100596832B1 (ko) 2006-11-30

Family

ID=25540496

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019980056378A Expired - Fee Related KR100596832B1 (ko) 1997-12-19 1998-12-19 적층된커패시터내의확산을최소화하기위해실리콘플러그상에형성된장치및방법

Country Status (7)

Country Link
US (1) US6228701B1 (enExample)
EP (1) EP0926717B1 (enExample)
JP (1) JPH11261031A (enExample)
KR (1) KR100596832B1 (enExample)
CN (1) CN1167118C (enExample)
DE (1) DE69841923D1 (enExample)
TW (1) TW406408B (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0986095A3 (de) * 1998-09-08 2005-08-17 Infineon Technologies AG Schichtanordnung mit einer Materialschicht und einer im Bereich der Korngrenzen der Materialschicht angeordneten Diffusionsbarrierenschicht, und Verfahren zur Herstellung derselben
KR100351451B1 (ko) * 1999-12-30 2002-09-09 주식회사 하이닉스반도체 반도체메모리장치의 커패시터제조방법
US6686298B1 (en) * 2000-06-22 2004-02-03 Micron Technology, Inc. Methods of forming structures over semiconductor substrates, and methods of forming transistors associated with semiconductor substrates
US6833329B1 (en) * 2000-06-22 2004-12-21 Micron Technology, Inc. Methods of forming oxide regions over semiconductor substrates
US6649543B1 (en) 2000-06-22 2003-11-18 Micron Technology, Inc. Methods of forming silicon nitride, methods of forming transistor devices, and transistor devices
US6660657B1 (en) 2000-08-07 2003-12-09 Micron Technology, Inc. Methods of incorporating nitrogen into silicon-oxide-containing layers
US6383943B1 (en) * 2000-10-16 2002-05-07 Taiwan Semiconductor Manufacturing Company Process for improving copper fill integrity
US6399401B1 (en) * 2001-07-24 2002-06-04 Advanced Micro Devices, In. Test structures for electrical linewidth measurement and processes for their formation
US6878585B2 (en) 2001-08-29 2005-04-12 Micron Technology, Inc. Methods of forming capacitors
US6723599B2 (en) * 2001-12-03 2004-04-20 Micron Technology, Inc. Methods of forming capacitors and methods of forming capacitor dielectric layers
KR100543655B1 (ko) * 2003-06-30 2006-01-20 주식회사 하이닉스반도체 반도체 소자의 제조방법
CN104465519B (zh) * 2013-09-23 2017-07-28 中芯国际集成电路制造(上海)有限公司 嵌入式源/漏mos晶体管的制造方法
DE102021106691A1 (de) * 2021-03-18 2022-09-22 Infineon Technologies Austria Ag Verfahren zum herstellen einer halbleitervorrichtung und halbleitervorrichtung

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08335681A (ja) * 1995-06-06 1996-12-17 Texas Instr Inc <Ti> 高誘電定数材料と接着層を用いた半導体構造とこれを形成する方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2786071B2 (ja) * 1993-02-17 1998-08-13 日本電気株式会社 半導体装置の製造方法
US5392189A (en) * 1993-04-02 1995-02-21 Micron Semiconductor, Inc. Capacitor compatible with high dielectric constant materials having two independent insulative layers and the method for forming same
US5381302A (en) 1993-04-02 1995-01-10 Micron Semiconductor, Inc. Capacitor compatible with high dielectric constant materials having a low contact resistance layer and the method for forming same
JPH0714993A (ja) * 1993-06-18 1995-01-17 Mitsubishi Electric Corp 半導体装置およびその製造方法
JPH0794600A (ja) * 1993-06-29 1995-04-07 Mitsubishi Electric Corp 半導体装置およびその製造方法
US5504041A (en) 1994-08-01 1996-04-02 Texas Instruments Incorporated Conductive exotic-nitride barrier layer for high-dielectric-constant materials
KR0168346B1 (ko) * 1994-12-29 1998-12-15 김광호 고유전율 재료를 이용한 커패시터 및 그 제조방법
US5786248A (en) * 1995-10-12 1998-07-28 Micron Technology, Inc. Semiconductor processing method of forming a tantalum oxide containing capacitor
KR100285066B1 (ko) * 1997-12-06 2001-04-02 윤종용 고유전체 물질을 갖는 커패시터의 형성방법
US6037235A (en) * 1998-09-14 2000-03-14 Applied Materials, Inc. Hydrogen anneal for curing defects of silicon/nitride interfaces of semiconductor devices

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08335681A (ja) * 1995-06-06 1996-12-17 Texas Instr Inc <Ti> 高誘電定数材料と接着層を用いた半導体構造とこれを形成する方法

Also Published As

Publication number Publication date
EP0926717A3 (en) 2003-04-02
KR19990063238A (ko) 1999-07-26
CN1225506A (zh) 1999-08-11
EP0926717B1 (en) 2010-10-06
CN1167118C (zh) 2004-09-15
US6228701B1 (en) 2001-05-08
JPH11261031A (ja) 1999-09-24
DE69841923D1 (de) 2010-11-18
TW406408B (en) 2000-09-21
EP0926717A2 (en) 1999-06-30

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