KR100595416B1 - Manufacturing Method of Liquid Crystal Display Using Diffraction Exposure - Google Patents

Abstract

DETAILED DESCRIPTION OF THE INVENTION The present invention uses a diffraction exposure technique in manufacturing an active matrix liquid crystal display device using a thin film transistor as a switch, when forming a contact hole exposing a drain electrode in a protective film to connect a pixel electrode to a drain electrode of a TFT. To protect the drain electrode from the etchant. According to an exemplary embodiment of the present invention, when a protective layer covering a source-drain metal is formed to form a contact hole exposing a portion of the source-drain metal, a photoresist having a thickness such as a gate insulating layer is formed on the contact hole exposing a portion of the source-drain metal. By performing etching in the remaining state, the contact hole exposing the gate material is formed by removing the passivation layer and the gate insulating layer, and the contact hole exposing the source-drain material is formed by removing the remaining photoresist and the passivation layer. .

Description

Method of manufacturing a liquid crystal display using diffraction exposure.

The present invention relates to a method of manufacturing a liquid crystal display. In particular, in the manufacture of an active matrix liquid crystal display (or active matrix liquid crystal display) using a thin film transistor (or TFT: thin film transistor) as a switch, the pixel electrode is a drain (or source) of the TFT. When forming a contact hole for exposing a drain electrode in a protective film to be connected to an electrode, the present invention relates to a method of protecting a drain electrode from an etchant using a diffraction exposure technique.

Among the display devices for displaying image information on the screen, the CRT (or Cathode Ray Tube (CRT)) has been the most used so far, which is inconvenient to use because it is bulky and heavy compared to the display area. Therefore, even if the display area is large, the thin film type flat panel display device which has a small thickness and can be easily used in any place has been developed, and is gradually replacing the CRT display device. In particular, the liquid crystal display (or liquid crystal display) has the highest resolution than other flat panel displays, and the quality of the moving picture is faster than that of CRT. to be.

The driving principle of the liquid crystal display device is to use the optical anisotropy and polarization property of the liquid crystal. Since the structure is thin and long, the direction of the molecular arrangement can be controlled by artificially applying an electromagnetic field to liquid crystal molecules having directionality and polarization in the molecular arrangement. Accordingly, when the alignment direction is arbitrarily adjusted, light may be transmitted or blocked in accordance with the arrangement direction of the liquid crystal molecules by optical anisotropy of the liquid crystal, thereby applying the screen display device. Nowadays, the active matrix liquid crystal display device in which a thin film transistor (or TFT) and pixel electrodes connected thereto are arranged in a matrix manner is excellent in providing image quality and natural colors. The structure of the liquid crystal panel, which is a basic component of a general liquid crystal display, will be described in detail as follows. 1 is a perspective view illustrating a general structure of a liquid crystal panel, and FIG. 2 is a diagram illustrating a cross section of a liquid crystal panel taken by cutting line II-II of FIG. 1.

In the liquid crystal panel, two panels 3 and 5 provided with various elements are attached to each other and the liquid crystal layer 10 is sandwiched therebetween. One panel of the liquid crystal display includes elements that implement color. This is often called "color filter panel 3". In the color filter panel 3, red (R), green (G), and blue (B) color filters 7 are sequentially arranged along the positions of pixels designed in a matrix arrangement on the first transparent substrate 1a. have. Between these color filters 7, a very fine black matrix 9 is formed. This prevents the appearance of mixed colors between each color. And the common electrode 8 which covers the color filter 7 is formed. The common electrode 8 serves as one electrode forming an electric field applied to the liquid crystal 10.

On the other panel of the liquid crystal display, switch elements and wirings for generating an electric field for driving the liquid crystal are formed. This is often referred to as "active panel 5". In the active panel 5, a pixel electrode 41 is formed along a position of a pixel designed in a matrix manner on the second transparent substrate 1b. The pixel electrode 41 faces the common electrode 8 formed on the color filter panel 3 and serves as the other electrode forming an electric field applied to the liquid crystal 10. The signal wires 13 are formed along the horizontal array direction of the pixel electrodes 41, and the data wires 23 are formed along the vertical array direction. In the active matrix liquid crystal display device, the thin film transistor 19 which is a switch element for applying an electric field signal to the pixel electrode 41 is formed in one corner of the pixel electrode 41. In the case of an active matrix liquid crystal display device, the gate electrode 11 of the thin film transistor 19 is connected to the signal wiring 13 (hence, the signal wiring is also referred to as "gate wiring"), and the source electrode ( 21 is connected to the data line 23 (hence the data line is also referred to as the "source line"). The drain electrode 31 of the thin film transistor 19 is connected to the pixel electrode 41. In the thin film transistor 19, a semiconductor layer 33 is formed between the source electrode 21 and the drain electrode 31, and the source electrode 21, the semiconductor layer 33, the drain electrode 31, and the semiconductor layer are formed. 33 each make an ohmic contact. At the ends of the gate wiring 13 and the source wiring 23, gate pads 15 and source pads 25, which are terminal terminals (or terminals) for receiving signals applied from the outside, are formed, respectively. Further, a gate pad terminal 57 and a source pad terminal 67 are further formed on the gate pad 15 and the source pad 25, respectively.

When an external electrical signal applied to the gate pad 15 is applied to the gate electrode 11 along the gate wiring 13, image information applied to the source pad 25 is source electrode 21 along the source wiring 23. Is applied to the drain electrode 31. On the other hand, when no signal is applied to the gate wiring 13, the source electrode 21 and the drain electrode 31 are disconnected. Therefore, whether the data signal is applied to the drain electrode 31 can be determined by adjusting the signal of the gate electrode 11. Therefore, the data signal can be artificially transferred to the pixel electrode 41 connected to the drain electrode 31. That is, the thin film transistor 19 serves as a switch for driving the pixel electrode. A gate insulating film 17 is formed between the layer on which the gate wiring 13 and the like are formed and the layer on which the source wiring 23 and the like are formed, and a protective film for protecting the device even on the layer on which the source wiring 23 and the like are formed. (37) is formed.

The two panels thus made (the color filter panel 3 and the active panel 5) are opposed to each other at a predetermined interval (referred to as "cell gap"), and the liquid crystal material ( 10) is filled. In order to keep the cell gap between the two panels 3 and 5 constant and to prevent the liquid crystal material from leaking out, the edge portions of the two substrates are sealed with a seal 81 such as epoxy. Thus, the liquid crystal panel which is the main part of the liquid crystal display device is completed.

In such a liquid crystal panel, an active panel having a TFT and a pixel electrode, which are a switching element that plays a key role in driving liquid crystal, is most important. Therefore, how the active panel is made or the performance of the active panel has a decisive influence on the overall quality of the liquid crystal panel. Therefore, almost all technologies related to liquid crystal display devices are focused on how to make an active panel. The present invention also relates to a method of manufacturing an active substrate. A method of manufacturing a conventional active substrate related to the present invention and its problems will be described as follows. 3 is a plan view of the active substrate and a conventional method of manufacturing the active substrate is shown in FIG.

The gate electrode 11, the gate wiring 13, the gate pad 15, and the like are formed of a metal containing aluminum on the transparent glass substrate 1. A gate insulating layer 17 is formed by depositing silicon oxide (SiOx) or silicon nitride (SiNx) on the substrate 1 on which the gate material (gate electrode 11, gate wiring 13, and gate pads 15) are formed. do. An intrinsic semiconductor material such as pure silicon is deposited on the gate insulating layer 17 and patterned to form a semiconductor layer 33 on the gate electrode 11. On the semiconductor layer 33, a source electrode 21 and a drain electrode 31 are formed of a metal including chromium or molybdenum, and the source wiring 23 and the source wiring connecting the source electrode 21 are formed. 23) The source pad 25 is formed at the end. In this case, the source electrode 21 and the drain electrode 31 respectively make ohmic contact through the impurity semiconductor layer 35 between the semiconductor layer 33 at both side portions of the semiconductor layer 33. do. As described above, silicon oxide (SiOx) or silicon nitride (SiNx) is formed on the substrate 1 on which the thin film transistor and the wirings including the gate electrode 11, the source electrode 21, and the drain electrode 31 serve as switches. It deposits and forms the protective film 37 (FIG. 4A).

Only portions of the passivation layer 37 that cover the drain electrode 31, the gate pad 15, and the source pad 25 are removed to form a drain contact hole, a gate contact hole, and a source contact hole exposing the portions. do. In this case, a photo-lithography (or photo-lithography) method is generally used. First, the photoresist 91 is evenly applied on the protective film 37. The photoresist 91 is selectively irradiated with light such as infrared rays to be cured by using a mask 93 having an open pattern corresponding to the shape of the contact holes. Since the photoresist 91 is selectively cured in the shape of the mask 93, the shape of the photoresist 91 in which only the protective layer 37 of the portion where the contact holes are to be formed is exposed by removing the uncured portions as shown in FIG. 4B. Can be obtained.

In order to remove the protective layer 37, the gate contact hole 51 may be removed by removing only portions of the protective layer 37 exposed by using an etchant mixed with SF ₆ and O ₂ having good reactivity with the protective layer 37. Source contact holes 61 and drain contact holes 71 are formed (FIG. 4C).

In this case, even after the drain contact hole 71 and the source contact hole 61 are formed, the gate contact hole 51 does not yet expose the gate pad 15, and the gate insulating layer 17 remains exposed. . In general, since the protective film 37 and the gate insulating film 17 are substantially the same material, etching is continued in the current state to etch the gate insulating film 17 to completely form the gate contact hole 51 (FIG. 4D).

After removing all of the photoresist 91, ITO (Indium Tin Oxide) is deposited on the entire surface of the substrate and patterned to form a pixel electrode 41 and a source contact hole (not shown) in contact with the drain electrode 31 through the drain contact hole 71. A source pad terminal 67 is formed in contact with the source pad 25 through 61, and a gate pad terminal 57 is formed in contact with the gate pad 15 through the gate contact hole 51. This completes the active panel (Fig. 4E).

The drain electrode 31 and the source pad 25 exposed to the drain contact hole 71 and the source contact hole 61 while the gate insulating layer 17 is continuously etched to complete the formation of the gate contact hole 51. The damage is caused to the mixture consisting of SF ₆ and O ₂ , which are the etchant of the protective film 37 and the gate insulating film 17.

As described above, the source-drain electrode is inevitably damaged by an etchant used to expose the drain electrode, the source pad, and the gate pad. 5 illustrates a problem that may appear in such a case. When chromium is used as the source-drain material, foreign matter 81 is formed on the surface of the chromium by the attack of the etchant, and the contact resistance with the pixel electrode 41 has a resistance value of about 1.7 MΩ, which is a problem in the transmission of electrical signals. Occurs (FIG. 5A). Alternatively, when molybdenum is used as the source-drain material, since molybdenum is highly reactive to the mixture of SF ₆ and O ₂ , which is an etchant of the protective film 37 and the gate insulating film 17, both of them are etched away. The portion where the pixel electrode 41 is in contact with each other is not completely in contact with each other, and a gap 83 is formed therebetween so that the contact itself is not normally made (FIG. 5B).

To avoid this attack, two mask processes may be used, but this is not a fundamental solution as the manufacturing process becomes more complicated, and the manufacturing cost increases and manufacturing time increases. Previously, the present applicant has applied for a method for manufacturing an active panel having a structure in which chromium and molybdenum are laminated with a source-drain material and a structure of the active panel by the method as one method for solving such a problem. (Application number).

An object of the present invention is to provide a method for preventing the source-drain material from being damaged by an etched mixture of SF ₆ and O ₂ during the etching process of exposing the gate pad using a diffraction exposure technique. Another object of the present invention is to provide a manufacturing method for maintaining a contact state and a contact resistance of a drain electrode and a pixel electrode by preventing the source-drain material from being damaged by an etchant etching the gate pad.

In order to achieve the above objects, the present invention is to pattern the passivation layer covering the source-drain metal to form a contact hole exposing a portion of the source-drain metal, and thus etching may be performed in a state where some photoresist remains on the contact hole. The contact hole exposing the gate material is formed by removing the passivation layer and the gate insulating layer, and the contact hole exposing the source-drain material is formed by removing the remaining photoresist and the passivation layer. In order to implement such a method, the present invention is applied to a photoresist on an active substrate having a gate material, a gate insulating film covering the gate material, a source-drain material formed on the gate insulating film, and a protective film covering the entire surface of the substrate on which the materials are formed. Exposing and then exposing the photoresist with a mask comprising a lattice opening pattern for use of a diffraction exposure technique; and over the contact hole portion that develops the exposed photoresist to expose a source-drain material. Exposing the protective film by completely removing the photoresist on the contact hole portion exposing the gate material and leaving the photoresist with the thickness of the protective film; and the exposed protective film and the gate insulating layer under the contact hole portion exposing the gate material. Remove the source The contact hole that exposes a portion lane material and removing the remaining photoresist as a protective film.

Hereinafter, the present invention will be described in detail with reference to FIG. 6, which is a diagram illustrating a method of manufacturing an active panel according to the present invention.

The gate electrode 111, the gate wiring 113, the gate pad 115, and the like are formed of a metal including aluminum on the transparent glass substrate 101. A gate insulating layer 117 is formed by depositing silicon oxide (SiOx) or silicon nitride (SiNx) on the substrate 101 on which the gate material (gate electrode 111, gate wiring 113, and gate pad 115) are formed. do. An intrinsic semiconductor material such as pure silicon is deposited on the gate insulating layer 117 and patterned to form a semiconductor layer 133 on the gate electrode 111. On the semiconductor layer 133, a source electrode 121 and a drain electrode 131 are formed of a metal including chromium or molybdenum, and a source wiring 123 and a source wiring connecting the source electrode 121 are formed. The source pad 125 is formed at the end of 123. In this case, the source electrode 121 and the drain electrode 131 may be in ohmic contact through the impurity semiconductor layer 135 between the semiconductor layer 133 at both side portions of the semiconductor layer 133. do. In this manner, a protective film 137 is formed by depositing silicon oxide (SiOx) or silicon nitride (SiNx) on a substrate on which a thin film transistor and wirings serving as a switch are formed (FIG. 6A).

The photoresist 191 is evenly coated on the passivation layer 137 by about 1 μm. The gate contact hole has an open pattern corresponding to its shape, and the drain contact hole and the source contact hole have a lattice opening pattern 195 corresponding to its shape. The photoresist 191 is selectively irradiated with light such as infrared rays to be cured by using the mask 193. Since the photoresist 191 is selectively cured and developed, the photoresist 191 may have a shape corresponding to the shape of the mask 193. At this time, the photoresist of the portion where the gate contact hole is to be formed is removed to expose the protective film 137. However, the photoresist of the portion where the drain contact hole and the source contact hole are to be formed has some photoresist remaining due to the diffraction effect of light used in the exposure process due to the lattice pattern of the mask. If the photoresist used is made of a material having the same etching selectivity as the protective film, it is preferable to form the photoresist to a level that is equal to or slightly larger than the thickness of the protective film. The thickness of the remaining photoresist can be adjusted by adjusting the grating spacing of the mask. In this embodiment, the thickness of the gate insulating film 117 is about 4000 kPa, the thickness of the protective film 137 is about 3000 kPa, and the thickness of the remaining photoresist 191 is about 4000 kPa (FIG. 6B).

When the mask having the lattice opening pattern is used as described above, the photoresist is not completely removed and the thinness is left because the ultraviolet rays used for exposure show diffraction effect on the lattice pattern and thus the photoresist is not completely exposed. Such an exposure technique is commonly referred to as a diffraction exposure technique, and the applicant has already filed a technical patent related thereto with the Korean Patent Office under the application number 96-21099. The lattice here is designed so that its spacing is kept shorter than the resolution of the exposure machine. For example, when using Nikon's FX-510 (resolution 2.4 μm (independent), 3 μm (L / S)), it is desirable to design and use a lattice spacing of 2 μm or less.

SF _{6 which} is highly reactive with the passivation layer 137, the gate insulating layer 117, and the photoresist 191 to form the gate contact hole 151, the source contact hole 161, and the drain contact hole 171. An etchant mixed with O ₂ is used. The 3000 Å protective film 137 and the 3000 Å photoresist 191 exposed on the gate pad 115 are removed. As a result, the gate insulating layer 117 is exposed on the gate pad 115, and the photoresist 191 of about 1000 mV remains on the drain electrode 131 and the source pad 125 (FIG. 6C).

If the etching is continued in the present state, the gate insulating film 117 4000Å and the photoresist 191 4000Å on the gate pad 115 are removed. At this time, the photoresist 191 on the drain electrode 131, the source pad 125, and the protective film 137 3000Å are removed. As a result, a drain contact hole 171 exposing the drain electrode 131, a source contact hole 161 exposing the source pad 125, and a gate contact hole 151 exposing the gate pad 115 are formed ( 6d).

After removing all of the remaining photoresist 191, indium tin oxide (ITO) is deposited on the entire surface of the substrate and patterned to contact the drain electrode 131 through the drain contact hole 171 and the source contact. A source pad terminal 167 contacting the source pad 125 through the hole 161 and a gate pad terminal 157 contacting the gate pad 115 through the gate contact hole 151 are formed. This completes the active panel (Fig. 6E).

FIG. 7 is an enlarged view of a portion where the pixel electrode 141 and the drain electrode 131 contact each other in the active panel according to the present invention. In the active panel according to the present invention, since the source-drain material is not damaged by the etchant, when chromium is used as the exposed source-drain material, foreign substances are not formed on the surface thereof due to the reaction between the etchant and the chromium. It can maintain a normal level of about 500KΩ. In addition, even if only the molybdenum is used as the source-drain material, the etching solution is not damaged, and thus the contact shape between the source-drain material and the pixel electrode can be maintained in normal state (FIG. 7).

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of exposing, in one etching step, a gate insulating film and a gate pad covered by a protective film having similar etching rates, and a source-drain material covered only in a protective film. By providing a thickness almost equal to that of the insulating film, a method of preventing the source-drain material from being damaged by the etchant is provided. Therefore, in the active panel according to the present invention, the contact resistance between the source-drain electrode and the pixel electrode is maintained in a normal state so that an electric signal transmission is not disturbed. In addition, it is possible to use a material having a lower resistance than chromium such as molybdenum alone in the source-drain material. Therefore, the manufacturing method of the liquid crystal display body according to the present invention can expect the effect of reducing the manufacturing cost and improving the quality of the product.

1 is a perspective view illustrating a structure of a general liquid crystal display device.

2 is a cross-sectional view illustrating a structure of a general liquid crystal display device.

3 is an enlarged plan view of a conventional active panel.

4 is a cross-sectional view illustrating a conventional manufacturing method of an active panel used in a liquid crystal display device.

FIG. 5 is enlarged cross-sectional views illustrating contact failure between a pixel electrode and a drain electrode in an active panel made by a conventional method.

6 are cross-sectional views illustrating a method of manufacturing an active panel for use in a liquid crystal display according to the present invention.

7 are enlarged cross-sectional views illustrating a good contact state between a pixel electrode and a drain electrode in the active panel according to the present invention.

<Description of the reference numerals for the main parts of the drawings>

1, 101: substrate 11, 111: gate electrode

13, 113: gate wiring 15, 115: gate pad

17, 117: gate insulating film 21, 121: source electrode

23, 123: source wiring 25, 125: source pad

31 and 131: drain electrodes 33 and 133: semiconductor layer

35, 135: impurity semiconductor layers 37, 137: protective film

41, 141: pixel electrode 51, 151: gate contact hole

57, 157: gate pad terminals 61, 161: source contact holes

67 and 167: source pad terminals 71 and 171: drain contact hole

81: foreign matter 83: voids

91, 191: photoresist 93, 193: mask

195 grid pattern

Claims (11)

Applying a photoresist on an active substrate having a gate material, a gate insulating film covering the gate material, a source-drain material formed on the gate insulating film, and a protective film covering the entire surface of the substrate on which the materials are formed; Covering the photoresist with a mask including a lattice opening pattern and then exposing the photoresist; Developing the exposed photoresist to leave photoresist over the contact holes exposing the source-drain material and completely removing and exposing the photoresist over the contact holes exposing the gate material; Removing the exposed passivation layer, the gate insulating layer and the passivation layer under the contact hole exposing the gate material, and removing the remaining photoresist and the passivation layer at the contact hole exposing the source-drain material. Liquid crystal display manufacturing method. The method of claim 1, And the photoresist, the passivation layer, and the gate insulating layer include a material having substantially the same etching rate. The method of claim 1, The thickness of the photoresist is thicker than the thickness of the gate insulating film, so that the thickness of the photoresist remaining on the contact hole exposing the source-drain material after development is the same as the thickness of the gate insulating film. Device manufacturing method. The method of claim 1, The lattice spacing of the lattice opening pattern of the mask is a spacing narrower than the resolution of the exposure machine used in the exposure step. The method of claim 1, A pixel electrode connected to the drain material through the drain contact hole by depositing and patterning ITO on the substrate on which the contact holes are formed, a source pad terminal connected to the source material through the source contact hole, and through the gate contact hole And forming a gate pat terminal connected to the gate material. The method of claim 1, And the source-drain material comprises molybdenum only. Applying a photoresist on a substrate having a first metal layer, a first insulating film covering the first metal layer, a second metal layer formed on the first insulating film, and a second insulating film covering the entire surface of the substrate on which the elements are formed; Exposing and then exposing the photoresist with a mask including an opening pattern at a narrower interval than the resolution of an exposure machine; Developing the exposed photoresist to leave the photoresist on the contact hole exposing the second metal layer, and completely removing the photoresist on the contact hole exposing the first metal layer to expose the second insulating film; ; In the contact hole exposing the first metal layer, the exposed second insulating layer, the first insulating layer and the second insulating layer underneath are removed, and in the contact hole exposing the second metal layer, the remaining photoresist and the And removing the second insulating film. The method of claim 7, wherein And the photoresist, the first insulating film and the second insulating film include a material having substantially the same etching rate. The method of claim 7, wherein The thickness of the photoresist is thicker than the thickness of the first insulating film so that the thickness of the photoresist remaining on the contact hole exposing the second metal layer after development is the same as the thickness of the first insulating film. Display device manufacturing method. The method of claim 7, wherein The opening pattern of the mask is a lattice pattern manufacturing method of a liquid crystal display device. The method of claim 7, wherein The material of the second metal layer includes only molybdenum.