KR20010109681A - Method for manufacturing fringe field switchinge lcd - Google Patents

Abstract

The present invention discloses a method of manufacturing a fringe field drive liquid crystal display device which can shorten the manufacturing process. Disclosed is a method of forming a counter electrode, a gate bus line, a common electrode line, and a pad of a fringe field driving liquid crystal display device, the method comprising: forming a transparent conductive layer on a lower substrate; Depositing a metal film on the transparent conductive layer; Applying a photoresist film on the metal film; Exposing and developing the photoresist film with a predetermined mask to form a photoresist pattern having two portions having different thicknesses; Defining a counter electrode by patterning the metal film and the transparent conductive layer using the photoresist pattern as a mask; Removing a portion of the photoresist pattern having a relatively low thickness; Patterning the metal layer using the remaining photoresist pattern as a mask to form a gate bus line; And removing the photoresist pattern for the gate bus line.

Description

Manufacturing method of fringe field drive liquid crystal display {METHOD FOR MANUFACTURING FRINGE FIELD SWITCHINGE LCD}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a fringe field drive liquid crystal display device, and more particularly, to a fringe field drive liquid crystal display device which can reduce a manufacturing process.

In general, a high aperture ratio and a high transmittance liquid crystal display have been proposed to improve the low aperture ratio and transmittance of a general IPS mode liquid crystal display, and have been filed in Korean Patent Application No. 98-9243.

Such a high aperture ratio and high transmittance liquid crystal display device forms a counter electrode and a pixel electrode with a transparent conductor, and forms a gap between the counter electrode and the pixel electrode to be smaller than a gap between the upper and lower substrates, thereby forming a fringe field on the counter electrode and the pixel electrode. (fringe field) is formed.

With reference to FIG. 1, the manufacturing method of the conventional fringe field drive liquid crystal display device is demonstrated.

Referring to FIG. 1, an indium tin oxide (ITO) layer is formed on a transparent lower insulating substrate 1 by a sputtering method using an Ar gas, an O ₂ gas, and an ITO target. Next, the ITO layer is patterned to form a comb tooth shape or a plate shape to form a counter electrode 2 (first mask process).

Then, an opaque metal film is formed on the lower substrate 1 on which the counter electrode 2 is formed by sputtering. Thereafter, the opaque metal film is partially patterned to form a gate bus line 3 and a common electrode line (not shown). (2nd mask process). At this time, the common electrode line (not shown) is in electrical contact with the counter electrode 2.

Thereafter, the gate insulating film 4, the amorphous silicon film 5 for the channel, and the doped amorphous silicon film 6 are sequentially stacked on the transparent insulating substrate 1 on which the gate bus line 3 is formed, and then the thin film transistor Patterned in the form of (third mask process).

Subsequently, the ITO layer is deposited on the resultant by sputtering, and then the ITO layer is patterned to form a comb on the counter electrode 2 to form the pixel electrode 7 (fourth mask process).

Then, the gate insulating film on the gate pad portion formed outside the substrate is removed to open the gate pad portion (a fifth mask process).

Subsequently, an opaque metal film is deposited on the resultant by sputtering, and then partially etched to form a source, drain electrodes 8a and 8b and a data bus line (not shown) (a sixth mask process). The exposed doped amorphous silicon layer 7 is then removed in a known manner. Here, at the time of forming the source, the drain electrodes 8a and 8b and the data bus line (not shown), the gate pad portion and the metal film for the data bus line are opened.

However, in the conventional fringe field driving liquid crystal display device as described above, six mask processes are required to form the lower substrate structure.

In this case, the mask process is a photolithography process as known, and includes a resist coating process, an exposure process, a developing process, an etching process, and a resist removing process only by its own process. Accordingly, it takes a long time to proceed with one mask process.

For this reason, a very long time is required for manufacturing a fringe field drive liquid crystal display device including the sixth mask process, and the manufacturing cost is increased, and the yield is lowered.

Accordingly, an object of the present invention is to provide a method for manufacturing a fringe field drive liquid crystal display device which can shorten the manufacturing process.

1 is a cross-sectional view of a fringe field driving liquid crystal display device according to the prior art.

2A to 2F are cross-sectional views of respective processes for explaining a method of manufacturing a fringe field driving liquid crystal display device according to the present invention.

(Explanation of symbols for the main parts of the drawing)

20-lower substrate 21-ITO layer

23-metal film 25-photoresist pattern

100-Halftone Mask 101-Transmissive Area

103-Cutoff Area 105-Halftone Area

210-Counter Electrode 230-Gate Bus Line

In order to achieve the above object of the present invention, an embodiment of the present invention is a method of forming a counter electrode, a gate bus line, a common electrode line and a pad of a fringe field driving liquid crystal display device, and a transparent conductive layer on a lower substrate. Forming; Depositing a metal film on the transparent conductive layer; Applying a photoresist film on the metal film; Exposing and developing the photoresist film with a predetermined mask to form a photoresist pattern having two portions having different thicknesses; Defining a counter electrode by patterning the metal film and the transparent conductive layer using the photoresist pattern as a mask; Removing a portion of the photoresist pattern having a relatively low thickness; Patterning the metal layer using the remaining photoresist pattern as a mask to form a gate bus line; And removing the photoresist pattern for the gate bus line.

In addition, according to another embodiment of the present invention, the step of sequentially stacking a transparent conductive layer and a metal film on the lower substrate; Forming a photoresist pattern having a different height on the metal layer to simultaneously define a counter electrode, a gate bus line, a common electrode line, and a pad; Patterning the transparent conductive layer and the metal film in the form of the photoresist pattern to form a counter electrode; Removing a portion of the photoresist pattern having a relatively low thickness; Patterning a metal film using the remaining photoresist pattern as a mask to form a gate bus line, a common electrode line, and a pad; Removing the photoresist pattern; Stacking the gate insulating layer, the channel layer, and the ohmic layer, and then patterning the channel layer and the ohmic layer in the form of a thin film transistor region; Depositing a transparent conductor on a substrate resultant, and patterning the transparent conductor to exist on one side of the thin film transistor region to form a pixel electrode; Etching a predetermined portion of the gate insulating film to open a pad; And depositing the metal layer on the resultant, and then patterning a predetermined portion to form a source, a drain region, and a data bus line.

According to the present invention, a photoresist pattern capable of simultaneously defining a counter electrode and a gate bus line is formed by using a halftone mask having a different transmittance. Accordingly, in manufacturing a fringe field driving liquid crystal display device, it is possible to manufacture five masks in which one mask process is reduced than before. Thus, manufacturing cost and manufacturing air are reduced. Accordingly, a fringe field drive liquid crystal display device can be manufactured by five mask steps, which require one less process than in the related art.

(Example)

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2A to 2F are cross-sectional views illustrating a method of manufacturing a fringe field driving liquid crystal display device according to the present invention. In this embodiment, the counter electrode and the gate bus line (common electrode line and pad) are formed at the same time to reduce the mask step by one, and the subsequent steps except for the step of forming the counter electrode and the gate electrode are conventional. Same as technology.

Referring to FIG. 2A, the counter electrode ITO layer 21 is formed on the lower substrate 20 made of glass by sputtering. Subsequently, a gate bus line metal film 23 is formed on the ITO layer 21 to a predetermined thickness. At this time, as the metal film for the gate bus line, a film having excellent conductivity such as Mo, Cr, Al, and MoW is used. Thereafter, a photoresist film is applied over the gate bus line metal film 23. Subsequently, in order to form a photoresist pattern for simultaneously defining the counter electrode and the gate bus line, a halftone mask 100 made of a material having different transmittances is disposed to face the photoresist film. Here, the halftone mask 100 includes an area 101 (transmission area) where light is 100% transmitted, an area where 100% light is blocked (103: a blocking area), and an area where about 30 to 70% of light is transmitted 105 Halftone region). In this case, the transmissive region 101 is disposed to define a region where the counter electrode and the gate bus line are not formed, and the blocking region 103 is disposed to define the region where the gate bus line, the common electrode line, and the pad are to be formed, and the half The tone region 105 is arranged to define the region where the counter electrode is to be formed. Thereafter, the photoresist film is exposed and developed using the halftone mask 100 to form the photoresist pattern 25. At this time, since the photoresist pattern 25 is formed using the halftone mask 100 having different transmittances, a predetermined step is generated. That is, all of the photoresist film of the portion corresponding to the transmission region 101 is removed, and the first photoresist pattern 25a of the portion corresponding to the blocking region 103 is formed to have a first thickness d1. Since the second photoresist pattern 25b of the portion corresponding to the halftone region 105 has more light than the blocking region 103, the second photoresist pattern 25b has a second thickness d2 smaller than the first thickness d1. It is formed to have. The halftone region 105 may be formed of a material that transmits light by a predetermined value, for example, an SOG, SiON, MoSiN, or MoSiON film. In addition, the halftone region 105 has the same effect even when formed in the form of a blocking material in the form of dots or strips having a line width of resolution or less.

Subsequently, as shown in FIG. 2B, the gate bus line metal film 23 is dry etched using the photoresist pattern 25 to expose the ITO layer 21.

Subsequently, as shown in FIG. 2C, the exposed ITO layer 21 is wet etched in the form of the photoresist pattern 25 to limit the counter electrode 210 formed of the ITO layer.

Then, as shown in FIG. 2D, the second photoresist pattern 25b having the second thickness d2 is removed by a known plasma ashing method. Then, only the thickness of the second photoresist pattern 25b is removed and the first photoresist pattern 25a is left. Thereafter, using the remaining first photoresist pattern 25a as a mask, the gate bus line metal film 23 is patterned by dry etching. Accordingly, as shown in FIG. 2E, a gate bus line 230, a common electrode line (not shown), and a pad (not shown) are defined on the counter electrode 210.

As shown in Fig. 2F, the first photoresist pattern 25a is removed by a known method.

Thereafter, although not shown in the figure, the gate insulating layer, the channel layer and the ohmic layer are sequentially stacked on the resultant, and then the channel layer and the ohmic layer are patterned in the form of a thin film transistor (second mask process). Then, the ITO layer is deposited on the lower substrate having the thin film transistor region defined thereon, and then patterned to exist on one side of the thin film transistor region to form a pixel electrode (third mask process). Thereafter, a predetermined portion of the gate insulating film is etched to open the pad formed on the outer periphery of the substrate (fourth mask process), and then a metal film is deposited on the resultant, and patterned in the form of a source, a drain electrode and a data bus line ( 5th mask process) and the 5th mask process, the liquid crystal display device which drives to a fringe field is completed.

As described in detail above, according to the present invention, using a halftone mask having a different transmittance, a photoresist pattern capable of simultaneously defining a counter electrode and a gate bus line is formed. Accordingly, in manufacturing a fringe field driving liquid crystal display device, it is possible to manufacture five masks in which one mask process is reduced than before. Thus, manufacturing cost and manufacturing air are reduced.

Accordingly, a fringe field drive liquid crystal display device can be manufactured by five mask steps, which require one less process than in the related art.

Claims (16)

A method of forming a counter electrode, a gate bus line, a common electrode line, and a pad of a fringe field drive liquid crystal display device, Forming a transparent conductive layer on the lower substrate; Depositing a metal film on the transparent conductive layer; Applying a photoresist film on the metal film; Exposing and developing the photoresist film with a predetermined mask to form a photoresist pattern having two portions having different thicknesses; Defining a counter electrode by patterning the metal film and the transparent conductive layer using the photoresist pattern as a mask; And Removing a portion of the photoresist pattern having a relatively low thickness; Patterning the metal layer using the remaining photoresist pattern as a mask to form a gate bus line; And And removing the photoresist pattern for the gate bus line. The method of claim 1, wherein the forming of the photoresist pattern having different thicknesses comprises: transmitting regions that transmit the photoresist film at 100% light, blocking regions that block 100% light, and halftones transmitting a predetermined amount of light. Exposing with a halftone mask comprising a region to form a photoresist pattern, wherein the blocking region is arranged to define a gate bus line and a common electrode line region, and the halftone region is arranged to define the counter electrode. And the photoresist pattern exposed by the halftone region is smaller in thickness than the photoresist pattern exposed by the blocking region. The method of manufacturing a fringe field driving liquid crystal display device according to claim 2, wherein the transparent conductive layer is an ITO film. The method of claim 2, wherein the metal layer is one selected from Mo, Cr, Al, and MoW. The method according to any one of claims 1 to 4, wherein the step of defining the counter electrode by patterning the metal film and the transparent conductive layer using the photoresist pattern as a mask, wherein the photoresist pattern is used as a mask And dry etching the metal film and wet etching the transparent conductive layer using the photoresist pattern and the patterned metal film as a mask. 3. The method of claim 2, wherein the halftone region of the halftone mask is a material that transmits 30 to 70% of light. 7. The method of claim 6, wherein the halftone region is one selected from SOG, SiON, MoSiN, and MoSiON. The method of claim 6, wherein the halftone region is formed of a blocking material and is formed in a dot or strip shape having a line width less than or equal to the resolution of an exposure apparatus. Sequentially depositing a transparent conductive layer and a metal film on the lower substrate; Forming a photoresist pattern having a different height on the metal layer to simultaneously define a counter electrode, a gate bus line, a common electrode line, and a pad; Patterning the transparent conductive layer and the metal film in the form of the photoresist pattern to form a counter electrode; Removing a portion of the photoresist pattern having a relatively low thickness; Patterning a metal film using the remaining photoresist pattern as a mask to form a gate bus line, a common electrode line, and a pad; Removing the photoresist pattern; Stacking the gate insulating layer, the channel layer, and the ohmic layer, and then patterning the channel layer and the ohmic layer in the form of a thin film transistor region; Depositing a transparent conductor on a substrate resultant, and patterning the transparent conductor to exist on one side of the thin film transistor region to form a pixel electrode; Etching a predetermined portion of the gate insulating film to open a pad; And Forming a source, a drain region and a data bus line by depositing the metal layer on the resultant part and patterning a predetermined portion thereof. 10. The method of claim 9, wherein forming a photoresist pattern having different heights simultaneously defining the counter electrode, the gate bus line, the common electrode line, and the pad comprises: applying a photoresist film on the metal film; Exposing and developing the photoresist film by a halftone mask comprising a transmission region for transmitting light at 100%, a blocking region for blocking 100%, and a halftone region for transmitting a predetermined amount of light; The blocking region may be arranged to define a gate bus line and a common electrode line region, the halftone region may be disposed to define the counter electrode, and the photoresist pattern exposed by the halftone region may be formed by the blocking region. A method of manufacturing a fringe field drive liquid crystal display device, the thickness of which is smaller than that of the exposed photoresist pattern. The method of manufacturing a fringe field driving liquid crystal display device according to claim 10, wherein the transparent conductive layer is an ITO film. The method of claim 11, wherein the metal film is one selected from Mo, Cr, Al, and MoW. The method according to any one of claims 9 to 12, wherein the step of defining the counter electrode by patterning the metal film and the transparent conductive layer using the photoresist pattern as a mask, and using the photoresist pattern as a mask And dry etching the metal film and wet etching the transparent conductive layer using the photoresist pattern and the patterned metal film as a mask. 11. The method of claim 10, wherein the halftone region of the halftone mask is a material that transmits 30 to 70% of light. 15. The method of claim 14, wherein the halftone region is one of SOG, SiON, MoSiN, and MoSiON. The fringe field driving liquid crystal display device of claim 14, wherein the halftone region is formed of a blocking material and is formed in a dot or strip shape having a line width equal to or less than the resolution of an exposure apparatus.