KR100588217B1 - 반도체 소자의 게이트 산화막 형성 방법 - Google Patents

반도체 소자의 게이트 산화막 형성 방법 Download PDF

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KR100588217B1
KR100588217B1 KR1020040117846A KR20040117846A KR100588217B1 KR 100588217 B1 KR100588217 B1 KR 100588217B1 KR 1020040117846 A KR1020040117846 A KR 1020040117846A KR 20040117846 A KR20040117846 A KR 20040117846A KR 100588217 B1 KR100588217 B1 KR 100588217B1
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oxide film
implant
gate oxide
substrate
sacrificial oxide
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임태홍
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동부일렉트로닉스 주식회사
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Abstract

반도체 소자의 게이트 산화막 형성 방법을 개시한다. 본 방법은, (a) 반도체 기판에 웰 형성을 위한 이온 주입 공정을 거친 임플란트 희생 산화막을 습식 식각 공정 및 세정 공정을 통해 소정의 두께를 남기고 제거하는 단계, (b) 상기 기판을 수소 분위기에서 베이킹하여 남아 있는 상기 임플란트 희생 산화막을 제거하는 단계, 및 (c) 상기 기판 위에 게이트 산화막을 열산화 공정에 의해 성장시키는 단계;를 포함한다. 따라서, 기판 위에 잔존하는 임플란트 희생 산화막을 완전히 제거할 수 있으므로 막질이 우수하고 두께가 균일한 게이트 산화막을 용이하게 형성할 수 있다.

Description

반도체 소자의 게이트 산화막 형성 방법{Method for Forming Gate Oxide in Semiconductor Device}
도 1은 본 발명에 따른 게이트 산화막 형성 방법을 설명하기 위한 공정 흐름도이다.
본 발명은 반도체 소자의 제조 기술에 관한 것으로서, 보다 자세하게는, 반도체 소자의 웰 형성 공정에서 사용한 임플란트 희생 산화막을 제거하고 반도체 기판 위에 새로운 게이트 산화막을 형성하는 방법에 관한 것이다.
종래의 반도체 트랜지스터 소자의 제조 과정 중에서, 게이트 산화막을 형성하기 전에 웰(Well) 형성을 위한 이온 주입 공정을 실시하게 된다. 이 때, 이온 주입에 의해 기판 표면 근처의 결정이 상당히 손상될 수 있다. 이러한 손상을 방지하기 위하여 임플란트 희생 산화막을 형성하게 된다. 이와 같은, 임플란트 희생 산화막은 이온 주입에 대한 장벽으로도 기능하여 불순물이 주입되는 깊이를 제어하는 데에 이용된다.
한편, 임플란트 희생 산화막은 열산화 공정에 의해 형성되는데, 통상 급속 열처리 장치를 이용하여 산화막을 형성하고, 그 후 형성된 산화막을 보다 조밀하게 하기 위하여 어닐링(Annealing)을 행하게 된다.
이와 같이, 임플란트 희생 산화막을 형성한 후에는, 게이트 산화막 및 다결정 실리콘층을 형성하고 이들을 패터닝하여 게이트 전극을 형성하게 된다. 여기서, 게이트 산화막을 형성하기 위해서는, 먼저 이온 주입 공정 등에 의해 오염된 임플란트 희생 산화막을 제거해야 한다. 임플란트 희생 산화막을 제거하기 위하여, 종래에는 불산을 함유한 화학 용액을 이용한 습식 식각 공정을 통해 상당 두께의 임플란트 희생 산화막을 제거하였다. 그 후, 기판을 과수(H2O2)를 함유한 화학 용액으로 세정하게 된다.
한편, 막질이 우수하고 두께가 균일한 게이트 산화막을 성장시키기 위하여는 임플란트 희생 산화막을 완전히 제거하고 편평한 기판의 표면을 노출시켜야 한다. 그러나, 종래의 습식 식각 공정을 이용하는 경우에, 임플란트 희생 산화막을 완전히 제거하기 위하여 지나치게 식각 공정을 진행하게 되면 기판(10)을 손상시키거나 오염시킬 수 있다. 따라서, 약 3 ~ 10Å 정도의 임플란트 희생 산화막을 남긴 상태에서 식각 작업을 종료할 수 있도록 조절해야 한다. 또한 세정 공정을 거친 후 남아 있는 임플란트 희생 산화막의 편평도는 그리 만족할 만한 수준이 되지 못한다. 즉, 습식 식각 공정 및 세정 공정을 통한 종래의 임플란트 희생 산화막의 제거 방법은 균일한 두께의 게이트 산화막을 얻는데 한계가 있다.
본 발명의 목적은 임플란트 희생 산화막을 안전하고 또한 효과적으로 제거함으로써 막질이 우수하고 두께 균일도가 우수한 게이트 산화막을 형성하는 방법을 제공하는 것이다.
본 발명에 따른 반도체 소자의 게이트 산화막 형성 방법은, (a) 반도체 기판에 웰 형성을 위한 이온 주입 공정을 거친 임플란트 희생 산화막을 습식 식각 공정 및 세정 공정을 통해 소정의 두께를 남기고 제거하는 단계, (b) 상기 기판을 수소 분위기에서 베이킹하여 남아 있는 상기 임플란트 희생 산화막을 제거하는 단계, 및 (c) 상기 기판 위에 게이트 산화막을 열산화 공정에 의해 성장시키는 단계;를 포함한다. 따라서, 기판 위에 잔존하는 임플란트 희생 산화막을 완전히 제거할 수 있으므로 막질이 우수하고 두께가 균일한 게이트 산화막을 용이하게 형성할 수 있다.
여기서, (b) 단계는, 열처리 장치의 노(furnace) 내부를 질소 가스를 이용하여 퍼징하여 산소를 제거하는 (b1) 단계와, 상기 노 내부에 수소 가스를 인입하고 소정의 온도에서 베이킹하는 (b2) 단계로 진행된다. 또한 베이킹 온도는 수소 가스가 임플란트 희생 산화막에 포함된 산소와 반응하여 H2O를 형성하는 온도이고, 바람직하게는 약 900℃다.
이하 첨부한 도면을 참조하여 본 발명의 바람직한 실시예를 설명한다.
도 1에서 보듯이, 먼저 종래의 방법과 같이 임플란트 희생 산화막을 불산을 포함하는 화학 용액을 이용하여 상당 두께를 습식 식각한다. 그 후, 기판을 과수(H2O2)를 포함하는 세정액으로 세정한다.(S10) 이와 같이 종래의 습식 방법을 통해 제거되고 남은 임플란트 희생 산화막은 약 3 ~ 10Å 정도의 두께가 된다. 그러나, 앞에서 설명한 바와 같이 남아 있는 임플란트 희생 산화막은 편평도가 좋지 않게 된다.
따라서, 잔존하는 임플란트 희생 산화막을 완전히 제거하기 위한 수소 베이킹 공정을 실시한다. 여기의 수소 베이킹 공정은 다음과 같은 방식으로 진행된다.
즉, 임플란트 희생 산화막의 습식 식각 및 세정 공정을 거친 후, 웨이퍼를 게이트 산화막을 형성하기 위한 열처리 장치의 노(Furnace) 내에 장입한다. 그 후, 노 내부의 산소 기체를 제거하기 위하여 질소 가스를 이용하여 노 내부를 퍼징(purging)한다.(S20) 그리고 나서, 노 온도를 약 900℃까지 승온시키고, 상기 노(furnace)에 연결된 인입관 및 배출관을 통해 수소 가스를 노 내부에 인입 및 방출시킴으로써, 수소 분위기에서 웨이퍼를 베이킹한다.(S30) 이 때, 약 3 ~ 10Å 정도의 두께로 남아 있는 임플란트 희생 산화막에서 산소가 수소와 반응하여 환원된다. 즉, H2O가 생성되어 배출관을 통해 방출된다. 이 때, 베이킹 시간은 잔존하는 산화막의 두께에 따라 적절히 선택될 수 있다. 또한 온도 조건은 산소 및 수소의 반응이 보다 잘 일어날 수 있는 온도로 선택될 수 있다.
이렇게 소정의 시간동안 수소 베이킹 공정을 실시하여 잔존하는 임플란트 희생 산화막을 제거한 다음, 열산화 공정을 진행하여 기판 위에 게이트 산화막을 성장시킨다.(S40) 여기의 열산화 공정은 일반적으로 사용되는 방법에 의하므로 자세한 설명은 생략한다.
본 발명에 따르면, 반도체 기판에 웰을 형성하기 위하여 사용하였던 임플란트 희생 산화막을 기판의 오염 및 손상을 야기하지 않고도 완전히 제거할 수 있다. 또한, 게이트 산화막을 형성하기 전에 기판의 편평도를 균일하게 할 수 있다. 따라서, 막질이 우수하고 두께가 균일한 게이트 산화막을 용이하게 형성할 수 있다.
지금까지 본 발명의 바람직한 실시예에 대해 설명하였으나, 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자는 본 발명의 본질적인 특성을 벗어나지 않는 범위 내에서 변형된 형태로 구현할 수 있을 것이다. 그러므로 여기서 설명한 본 발명의 실시예는 한정적인 관점이 아니라 설명적인 관점에서 고려되어야 하고, 본 발명의 범위는 상술한 설명이 아니라 특허청구범위에 나타나 있으며, 그와 동등한 범위 내에 있는 모든 차이점은 본 발명에 포함되는 것으로 해석되어야 한다.

Claims (5)

  1. (a) 반도체 기판에 웰 형성을 위한 이온 주입 공정을 거친 임플란트 희생 산화막을 습식 식각 공정 및 세정 공정을 통해 소정의 두께를 남기고 제거하는 단계;
    (b) 상기 기판을 수소 분위기에서 베이킹하여 남아 있는 상기 임플란트 희생 산화막을 제거하는 단계; 및
    (c) 상기 기판 위에 게이트 산화막을 열산화 공정에 의해 성장시키는 단계;를 포함하는 것을 특징으로 하는 반도체 소자의 게이트 산화막 형성 방법.
  2. 제1항에 있어서, 상기 (b) 단계는, 열처리 장치의 노(furnace) 내부를 질소 가스를 이용하여 퍼징하여 산소를 제거하는 (b1) 단계와, 상기 노 내부에 수소 가스를 인입하고 소정의 온도에서 베이킹하는 (b2) 단계를 포함하는 것을 특징으로 하는 반도체 소자의 게이트 산화막 형성 방법.
  3. 제2항에 있어서, 상기 소정의 온도는 수소 가스가 임플란트 희생 산화막에 포함된 산소와 반응하여 H2O를 형성하는 온도인 것을 특징으로 하는 반도체 소자의 게이트 산화막 형성 방법.
  4. 제3항에 있어서, 상기 H2O의 형성 온도는 약 900℃인 것을 특징으로 하는 반도체 소자의 게이트 산화막 형성 방법.
  5. 제1항 내지 제4항 중 어느 한 항에 따른 방법에 의해 형성된 게이트 산화막을 포함하는 것을 특징으로 하는 반도체 소자.
KR1020040117846A 2004-12-31 2004-12-31 반도체 소자의 게이트 산화막 형성 방법 KR100588217B1 (ko)

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