KR100559062B1 - 반도체소자및그제조방법 - Google Patents

반도체소자및그제조방법 Download PDF

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Publication number
KR100559062B1
KR100559062B1 KR1019980019618A KR19980019618A KR100559062B1 KR 100559062 B1 KR100559062 B1 KR 100559062B1 KR 1019980019618 A KR1019980019618 A KR 1019980019618A KR 19980019618 A KR19980019618 A KR 19980019618A KR 100559062 B1 KR100559062 B1 KR 100559062B1
Authority
KR
South Korea
Prior art keywords
chip
inner lead
leadframe
electronic
outer leads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
KR1019980019618A
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English (en)
Korean (ko)
Other versions
KR19990013381A (ko
Inventor
마헤시 케이. 사
쥬니어. 하트 죤 더블유.
Original Assignee
프리스케일 세미컨덕터, 인크.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
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Application filed by 프리스케일 세미컨덕터, 인크. filed Critical 프리스케일 세미컨덕터, 인크.
Publication of KR19990013381A publication Critical patent/KR19990013381A/ko
Application granted granted Critical
Publication of KR100559062B1 publication Critical patent/KR100559062B1/ko
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01PMEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P1/00Details of instruments
    • G01P1/02Housings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • H10W72/932Plan-view shape, i.e. in top view
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measuring Fluid Pressure (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Pressure Sensors (AREA)
KR1019980019618A 1997-07-24 1998-05-29 반도체소자및그제조방법 Expired - Lifetime KR100559062B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/899,672 US5918112A (en) 1997-07-24 1997-07-24 Semiconductor component and method of fabrication
US8/899,672 1997-07-24
US08/899,672 1997-07-24

Publications (2)

Publication Number Publication Date
KR19990013381A KR19990013381A (ko) 1999-02-25
KR100559062B1 true KR100559062B1 (ko) 2006-06-19

Family

ID=25411375

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019980019618A Expired - Lifetime KR100559062B1 (ko) 1997-07-24 1998-05-29 반도체소자및그제조방법

Country Status (4)

Country Link
US (1) US5918112A (https=)
JP (1) JPH1154692A (https=)
KR (1) KR100559062B1 (https=)
DE (1) DE19830475A1 (https=)

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* Cited by examiner, † Cited by third party
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US6777785B1 (en) * 1999-08-25 2004-08-17 Winbond Electronics Corp. Lead frame containing a master and a slave IC chips and a testing circuit embedded within the master IC chip
DE10010461A1 (de) * 2000-03-03 2001-09-13 Infineon Technologies Ag Vorrichtung zum Verpacken elektronischer Bauteile mittels Spritzgußtechnik
AT410727B (de) * 2000-03-14 2003-07-25 Austria Mikrosysteme Int Verfahren zum unterbringen von sensoren in einem gehäuse
DE10012883A1 (de) * 2000-03-16 2001-09-27 Infineon Technologies Ag Verfahren zum Herstellen eines Packages mit mindestens zwei Speicherchips
JP4614586B2 (ja) * 2001-06-28 2011-01-19 三洋電機株式会社 混成集積回路装置の製造方法
US6856007B2 (en) * 2001-08-28 2005-02-15 Tessera, Inc. High-frequency chip packages
US7176506B2 (en) * 2001-08-28 2007-02-13 Tessera, Inc. High frequency chip packages with connecting elements
JP3744828B2 (ja) * 2001-09-14 2006-02-15 ユーディナデバイス株式会社 半導体装置
US7754537B2 (en) * 2003-02-25 2010-07-13 Tessera, Inc. Manufacture of mountable capped chips
US6683370B1 (en) 2003-04-15 2004-01-27 Motorola, Inc. Semiconductor component and method of manufacturing same
US6972480B2 (en) 2003-06-16 2005-12-06 Shellcase Ltd. Methods and apparatus for packaging integrated circuit devices
JP2007528120A (ja) 2003-07-03 2007-10-04 テッセラ テクノロジーズ ハンガリー コルラートルト フェレロェセーギュー タールシャシャーグ 集積回路装置をパッケージングする方法及び装置
US20050095835A1 (en) 2003-09-26 2005-05-05 Tessera, Inc. Structure and method of making capped chips having vertical interconnects
US8143095B2 (en) 2005-03-22 2012-03-27 Tessera, Inc. Sequential fabrication of vertical conductive interconnects in capped chips
US20070096269A1 (en) * 2005-10-31 2007-05-03 Mediatek Inc. Leadframe for semiconductor packages
US7622684B2 (en) * 2005-11-02 2009-11-24 Panasonic Corporation Electronic component package
US7936062B2 (en) 2006-01-23 2011-05-03 Tessera Technologies Ireland Limited Wafer level chip packaging
US20080067641A1 (en) * 2006-09-15 2008-03-20 En-Min Jow Package semiconductor and fabrication method thereof
US8604605B2 (en) 2007-01-05 2013-12-10 Invensas Corp. Microelectronic assembly with multi-layer support structure
SG148054A1 (en) * 2007-05-17 2008-12-31 Micron Technology Inc Semiconductor packages and method for fabricating semiconductor packages with discrete components
US8395247B1 (en) * 2009-06-29 2013-03-12 Integrated Device Technology, Inc. Method and apparatus for placing quartz SAW devices together with clock/oscillator
US8359927B2 (en) * 2009-08-12 2013-01-29 Freescale Semiconductor, Inc. Molded differential PRT pressure sensor
JP5796956B2 (ja) 2010-12-24 2015-10-21 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー 回路装置およびその製造方法
US9236331B2 (en) 2014-02-25 2016-01-12 Freescale Semiconductor, Inc. Multiple die lead frame
DE102014016565B3 (de) 2014-11-11 2015-11-12 Micronas Gmbh Schaltkreisgehäuse
US11088055B2 (en) * 2018-12-14 2021-08-10 Texas Instruments Incorporated Package with dies mounted on opposing surfaces of a leadframe

Citations (2)

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US5096852A (en) * 1988-06-02 1992-03-17 Burr-Brown Corporation Method of making plastic encapsulated multichip hybrid integrated circuits
US5523608A (en) * 1992-09-01 1996-06-04 Sharp Kabushiki Kaisha Solid state imaging device having a solid state image sensor and its peripheral IC mounted on one package

Family Cites Families (11)

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Publication number Priority date Publication date Assignee Title
JP2582013B2 (ja) * 1991-02-08 1997-02-19 株式会社東芝 樹脂封止型半導体装置及びその製造方法
EP0408779B1 (en) * 1989-07-18 1993-03-17 International Business Machines Corporation High density semiconductor memory module
JPH05206365A (ja) * 1992-01-30 1993-08-13 Fuji Electric Co Ltd 半導体装置およびその組立用リードフレーム
JPH06244231A (ja) * 1993-02-01 1994-09-02 Motorola Inc 気密半導体デバイスおよびその製造方法
US5796164A (en) * 1993-05-11 1998-08-18 Micromodule Systems, Inc. Packaging and interconnect system for integrated circuits
US5661336A (en) * 1994-05-03 1997-08-26 Phelps, Jr.; Douglas Wallace Tape application platform and processes therefor
JPH0846098A (ja) * 1994-07-22 1996-02-16 Internatl Business Mach Corp <Ibm> 直接的熱伝導路を形成する装置および方法
US5504370A (en) * 1994-09-15 1996-04-02 National Semiconductor Corporation Electronic system circuit package directly supporting components on isolated subsegments
US5523617A (en) * 1994-12-27 1996-06-04 National Semiconductor Corporation Fuse frames, programmable fuse frames, and methods for programming by fusing
US5608261A (en) * 1994-12-28 1997-03-04 Intel Corporation High performance and high capacitance package with improved thermal dissipation
US5796165A (en) * 1996-03-19 1998-08-18 Matsushita Electronics Corporation High-frequency integrated circuit device having a multilayer structure

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5096852A (en) * 1988-06-02 1992-03-17 Burr-Brown Corporation Method of making plastic encapsulated multichip hybrid integrated circuits
US5523608A (en) * 1992-09-01 1996-06-04 Sharp Kabushiki Kaisha Solid state imaging device having a solid state image sensor and its peripheral IC mounted on one package

Also Published As

Publication number Publication date
KR19990013381A (ko) 1999-02-25
DE19830475A1 (de) 1999-01-28
JPH1154692A (ja) 1999-02-26
US5918112A (en) 1999-06-29

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