KR100488150B1 - Apparatus and Method for Driving Plasma Display Panel - Google Patents

Abstract

The present invention relates to a method of driving a plasma display panel that can improve contrast.

According to an exemplary embodiment of the present invention, a method of driving a plasma display panel includes calculating a load by using data input from an external source, and driving the plasma display panel by one of a selective writing method and a selective erasing method corresponding to the calculated load. Steps. When the calculated load is 30% or less, it is driven by the selective erase method, otherwise it is driven by the selective write method.

Description

Apparatus and Method for Driving Plasma Display Panel

The present invention relates to a driving apparatus and a driving method of a plasma display panel, and more particularly, to a driving apparatus and a driving method of a plasma display panel to improve contrast.

Plasma Display Panel (hereinafter referred to as "PDP") displays an image including text or graphics by emitting phosphors by 147 nm ultraviolet rays generated during discharge of He + Xe or Ne + Xe inert mixed gas. . Such a PDP is not only thin and easy to enlarge, but also greatly improved in quality due to recent technology development. In particular, the three-electrode AC surface discharge type PDP has advantages of low voltage driving and long life because wall charges are accumulated on the surface during discharge and protect the electrodes from sputtering caused by the discharge.

Referring to FIG. 1, a discharge cell of a three-electrode AC surface discharge type PDP includes a scan electrode Y and a sustain electrode Z formed on the upper substrate 10, and an address electrode formed on the lower substrate 18. X). Each of the scan electrode Y and the sustain electrode Z has a line width smaller than the line widths of the transparent electrodes 12Y and 12Z and the transparent electrodes 12Y and 12Z and is formed at one edge of the transparent electrode 13Y, 13Z).

The transparent electrodes 12Y and 12Y are usually formed on the upper substrate 10 by indium tin oxide (ITO). The metal bus electrodes 13Y and 13Z are usually formed of metals such as chromium (Cr) and formed on the transparent electrodes 12Y and 12Z to reduce voltage drop caused by the transparent electrodes 12Y and 12Z having high resistance. The upper dielectric layer 14 and the passivation layer 16 are stacked on the upper substrate 10 having the scan electrode Y and the sustain electrode Z side by side. In the upper dielectric layer 14, wall charges generated during plasma discharge are accumulated. The protective layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used.

The lower dielectric layer 22 and the partition wall 24 are formed on the lower substrate 18 on which the address electrode X is formed, and the phosphor layer 26 is coated on the surfaces of the lower dielectric layer 22 and the partition wall 24. The address electrode X is formed in the direction crossing the scan electrode Y and the sustain electrode Z. The partition wall 24 is formed in a stripe or lattice shape to prevent the ultraviolet rays and the visible light generated by the discharge from leaking to the adjacent discharge cells. The phosphor layer 26 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert mixed gas is injected into the discharge space provided between the upper and lower substrates 10 and 18 and the partition wall 24.

The PDP is time-divisionally driven by dividing one frame into several subfields having different number of emission times in order to implement grayscale of an image. Each subfield is divided into an initialization period for initializing the full screen, an address period for selecting a scan line and selecting a cell in the selected scan line, and a sustain period for implementing gray levels according to the number of discharges.

Here, the initialization period is divided into a setup period in which the rising ramp waveform is supplied and a set down period in which the falling lamp waveform is supplied. For example, when the image is to be displayed with 256 gray levels, as shown in FIG. 2, the frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8. As described above, each of the eight subfields SF1 to SF8 is divided into an initialization period, an address period, and a sustain period. The initialization period and the address period of each subfield are the same for each subfield, while the sustain period is increased at a rate of 2 ⁿ (n = 0,1,2,3,4,5,6,7) in each subfield. .

Such a driving method of the PDP is roughly classified into a selective erasing method and a selective writing method according to whether or not the discharge cells are selected by the address discharge during the address period.

In the selective erasing driving method, the full screen is turned on and turned on during the reset period of the first subfield, and then the selected discharge cells are turned off during the address period. Subsequently, in the sustain period, an image is displayed by sustaining discharge cells not selected by the address discharge.

In this selective erasing method, the front lighting is performed only once per frame (resetting period of the first subfield) and the discharge cells unnecessary for every subfield are turned off. However, this method has a disadvantage in that the next subfield can be driven only when the previous subfield is turned on, so that the number of gradations is only +1 of the subfields. That is, if one frame includes 10 subfields, the number of gray levels is 11 as shown in Table 1 below.

Gradation SF1 (1) SF2 (2) SF3 (4) SF4 (8) SF5 (16) SF6 (32) SF7 (48) SF8 (48) SF9 (48) SF10 (48) 0 × × × × × × × × × × One ○ × × × × × × × × × 3 ○ ○ × × × × × × × × 7 ○ ○ ○ × × × × × × × 15 ○ ○ ○ ○ × × × × × × 31 ○ ○ ○ ○ ○ × × × × × 63 ○ ○ ○ ○ ○ ○ × × × × 111 ○ ○ ○ ○ ○ ○ ○ × × × 159 ○ ○ ○ ○ ○ ○ ○ ○ × × 207 ○ ○ ○ ○ ○ ○ ○ ○ ○ × 255 ○ ○ ○ ○ ○ ○ ○ ○ ○ ○

Here, 'SFx (y)' means the x-th subfield and its weight y. "0" represents a state in which the corresponding subfield is turned on and "X" represents a state in which the corresponding subfield is turned off.

As shown in Table 1, since only 1331 colors are represented by all combinations of red, green, and blue in the selective erasing method, the color expressing ability is remarkably insufficient in comparison with True Color of 16.7 million colors.

On the other hand, in the selective write driving method, the full screen is turned off in the reset period of all subfields, and then the discharge cells selected in the address period are turned on. Subsequently, in the sustain period, an image is displayed by sustaining discharge cells selected by the address discharge.

In this selective write driving method, since the turn-on and turn-off states of the discharge cells can be adjusted regardless of the state of the previous subfield, the color expressing ability is significantly increased compared to the selective erasing driving method. . However, the selective write driving method has a disadvantage in that the contrast is reduced because the full screen is turned off during the reset period of all subfields, that is, because all the subfields include the reset period.

In detail, the reset discharge occurs in all the discharge cells by the reset pulse supplied to the scan electrode Y in the reset period of the selective writing method. Undesired light is emitted from the discharge cells by the reset discharge, and contrast is reduced by the emission of the unwanted light. For example, in the selective writing method, even if black is expressed for one frame, the reset period included in all subfields causes the predetermined light to be emitted to the outside of the PDP by the reset discharge.

Accordingly, it is an object of the present invention to provide a driving apparatus and a driving method of a PDP capable of improving contrast.

In order to achieve the above object, the driving method of the PDP according to the present invention includes calculating a load using data input from the outside, and selecting one of a selective writing method and a selective erasing method for the plasma display panel in response to the calculated load. Driving in one manner.

When the calculated load is 30% or less, it is driven by the selective erase method, otherwise it is driven by the selective write method.

delete

When driven by the selective write method, the initialization period includes a setup period in which the rising ramp waveform is supplied and a set down period in which the falling ramp waveform is supplied.

When driven in the selective erasing scheme, the initialization period includes only a set down period in which the falling ramp waveform is supplied.

When the n (n is natural number) subfield is driven in the selective erasing manner, the erase pulse is not supplied after the sustain period of the n-1 subfield.

The first subfield included in one frame is driven by selective writing regardless of the calculated load.

According to another aspect of the present invention, there is provided a driving apparatus of a PDP, comprising: a data load calculator for receiving data from an external device and calculating a load of the input data; In response to the data load calculated by the data load calculator, a waveform generator for driving the plasma display panel in any one of a selective writing method and a selective erasing method is provided.

The data load calculator generates a control signal and supplies the control signal to the waveform generator when the data load is 30% or less, and the waveform generator drives the plasma display panel in the selective erasing manner when the control signal is input.

The waveform generator drives the plasma display panel in a selective erasing manner when a control signal is input.

When driven by the selective write method, the initialization period includes a setup period in which the rising ramp waveform is supplied and a set down period in which the falling ramp waveform is supplied.

When driven in the selective erasing scheme, the initialization period includes only a set down period in which the falling ramp waveform is supplied.

When the n (n is natural number) subfield is driven in the selective erasing manner, the erase pulse is not supplied after the sustain period of the n-1 subfield.

The first subfield included in one frame is driven by selective writing regardless of data load.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 3 to 5.

3 is a view showing a driving apparatus of a plasma display panel according to an embodiment of the present invention.

Referring to FIG. 3, the driving apparatus of the PDP of the present invention includes a first reverse gamma correction unit 32A, a gain control unit 34, and an error diffusion unit 36 connected between the input line 1 and the panel 46. A subfield mapping unit 38 and a data arranging unit 40; Frame memory 30 connected between input line 1 and panel 46, second inverse gamma correction unit 32B, average picture level (APL) 42 and waveform generator 44 )Wow; A data load calculator 50 is provided between the input line 1 and the waveform generator 44.

The first and second inverse gamma correction units 32A and 32B linearly convert the luminance value according to the gray value of the image signal by performing inverse gamma correction on the gamma corrected video signal. The frame memory 30 stores one frame of data R, G, and B, and supplies the stored data to the second inverse gamma correction unit 32B.

The APL unit 42 receives the video data corrected by the second inverse gamma correction unit 32B and generates an N (N is a natural number) signal for adjusting the number of sustain pulses. The gain controller 34 amplifies the video data corrected by the first inverse gamma correction unit 32A by the effective gain.

The error diffusion unit 36 finely adjusts the luminance value by diffusing an error component of a cell into adjacent cells. The subfield mapping unit 38 reallocates the video data corrected by the error diffusion unit 36 for each subfield.

The data alignment unit 40 converts the video data input from the subfield mapping unit 38 in accordance with the resolution format of the panel 46 to convert the address data into an integrated circuit (IC) of the panel 46. Supply).

The data load calculation unit 50 calculates a load of data supplied from the input line 1. At this time, the data load calculation unit 50 calculates the load of the PDP as 100 when data is supplied to all the discharge cells in the PDP (for example, full white). In addition, the data load calculator 50 calculates the load of the PDP as 50 when data is supplied to half of the discharge cells in the PDP. The data load calculator 50 calculates the load of the PDP and supplies a control signal to the waveform generator 44 when the PDP has a low load. For example, the data load calculator 50 supplies the control signal to the waveform generator 44 when the load of the PDP has a load of 30% or less, preferably 20% or less.

The waveform generator 44 generates a timing control signal based on the N-stage signal input from the APL unit 42, and converts the generated timing control signal into an address driving IC, a scan driving IC, and a sustain driving IC of the panel 46. Supply. On the other hand, the waveform generator 44 drives the panel 46 in a selective erasure manner when the control signal is supplied from the data load calculator 50, and when the control signal is not supplied from the data load calculator 50. The panel 46 is driven by selective writing.

In other words, in the present invention, the panel 46 is driven by either the selective erasing method or the selective writing method in response to the load of the PDP. Meanwhile, in the present invention, the first subfield included in one frame is driven by selective writing regardless of data load. In other words, the first subfield so that the subfields after the first subfield can be driven in the selective write method or the selective erase method in response to the load of the data (that is, the first subfield must include a reset period). The field is driven by a selective write method. Therefore, the data load calculator 50 does not supply the control signal to the waveform generator 44 regardless of the load of the first subfield.

4 is a diagram illustrating a driving waveform when two subfields are successively driven in a selective write method. That is, FIG. 4 shows a driving waveform when the load of the PDP calculated by the data load calculation unit 50 exceeds 30%.

Referring to FIG. 4, the PDP is driven by being divided into an initialization period for initializing the full screen, an address period for selecting a cell, and a sustain period for maintaining discharge of the selected cell.

In the initialization period, a rising ramp waveform Ramp-up that rises to the peak voltage Vp is simultaneously applied to all the scan electrodes Y. This rising ramp waveform (Ramp-up) causes a slight discharge in the cells of the full screen to generate wall charges in the cells. During the set down period, the rising ramp waveform Ramp-up is supplied, and then the falling ramp waveform Ramp-down falling at a positive voltage lower than the peak voltage Vp of the rising ramp waveform Ramp-up is applied to the scan electrodes ( Is simultaneously applied to Y). Ramp-down generates weak erase discharges in the cells, thereby eliminating unnecessary charges during wall charges and space charges generated by setup discharges, and uniformly distributing the wall charges required for address discharges in the cells of the full screen. Will remain.

In the address period, a negative scan pulse scan is sequentially applied to the scan electrodes Y, and a positive data pulse data is applied to the address electrodes X. As the voltage difference between the scan pulse and the data pulse and the wall voltage generated in the initialization period are added, an address discharge is generated in the cell to which the data pulse is applied. Wall charges are generated in the cells selected by the address discharge.

On the other hand, the sustain voltage level Vs is supplied with the positive DC voltage to the sustain electrodes Z during the set down period and the address period.

In the sustain period, sustain pulses sus are alternately applied to the scan electrodes Y and the sustain electrodes Z. FIG. Then, the cell selected by the address discharge is sustained in the form of surface discharge between the scan electrode Y and the sustain electrode Z each time the sustain pulse sus is applied while the wall voltage and the sustain pulse sus in the cell are added. Discharge occurs. Finally, after the sustain discharge is completed, an erase lamp waveform having a small pulse width (earse) is supplied to the sustain electrode Z in the erase period to erase the wall charges in the cell.

5 is a diagram illustrating a driving waveform when the selective writing method and the selective erasing method are continuously driven according to the load of data. That is, FIG. 5 shows a driving waveform when the load of the second subfield after the first subfield is 30% or less.

Referring to FIG. 5, first, a subfield driven by a selective write method is driven by being divided into an initialization period for initializing a full screen, an address period for selecting a cell, and a sustain period for maintaining discharge of the selected cell.

In the initialization period, a rising ramp waveform Ramp-up that rises to the peak voltage Vp is simultaneously applied to all the scan electrodes Y. This rising ramp waveform (Ramp-up) causes a slight discharge in the cells of the full screen to generate wall charges in the cells. In the set-down period, after the rising ramp waveform Ramp-up is supplied, the falling ramp waveform Ramp-down falling at the positive voltage lower than the peak voltage Vp of the rising ramp waveform Ramp-up is applied to the scan electrodes. Is simultaneously applied to Y). Ramp-down generates weak erase discharges in the cells, thereby eliminating unnecessary charges during wall charges and space charges generated by setup discharges, and uniformly distributing the wall charges required for address discharges in the cells of the full screen. Will remain.

In the address period, a negative scan pulse scan is sequentially applied to the scan electrodes Y, and a positive data pulse data is applied to the address electrodes X. As the voltage difference between the scan pulse and the data pulse and the wall voltage generated in the initialization period are added, an address discharge is generated in the cell to which the data pulse is applied. Wall charges are generated in the cells selected by the address discharge.

In the sustain period, sustain pulses sus are alternately applied to the scan electrodes Y and the sustain electrodes Z. FIG. Then, the cell selected by the address discharge is sustained in the form of surface discharge between the scan electrode Y and the sustain electrode Z every time the sustain pulse sus is applied while the wall voltage and the sustain pulse sus are added to the cell. Discharge occurs. On the other hand, when the n (n is a natural number) subfield is driven by the selective erasure method, that is, when the load of the n subfield calculated by the data load calculator 50 is 30% or less, the waveform generator 44 performs n-1. The erase pulse is not supplied after the sustain period of the subfield. In other words, it does not erase the wall charges generated by the sustain discharge (ie, the discharge cells remain turned on).

The subfields driven by the selective erasing method are driven by being divided into an initialization period, an address period, and a sustain period.

Here, the initialization period includes only the set down period. That is, the setup period is not included in the initialization period when the PDP is driven in the selective erasing scheme. In the set-down period, a falling ramp waveform Ramp-down falling at a positive voltage lower than the peak voltage Vp is applied to all the scan electrodes Y simultaneously. The ramp ramp down forms uniform wall charges in the discharge cells so that sustain discharge can occur in the sustain period.

In the address period, a negative scan pulse scan is sequentially applied to the scan electrodes Y, and a positive data pulse data is applied to the address electrodes X. As the voltage difference between the scan pulse and the data pulse and the wall voltage generated in the initialization period are added, address discharge is generated in the cell to which the data pulse is applied. In the cells in which the address discharge is generated, the wall charges generated in the initialization period are recombined. To this end, the width of the scan pulse supplied while being driven by the selective erase method is set to be narrower than the width of the scan pulse supplied while being driven by the selective write method.

In the sustain period, a sustain pulse su is applied to the scan electrodes Y and the sustain electrodes Z alternately. Then, the sustain voltage is sustained in the form of surface discharge between the scan electrode Y and the sustain electrode Z every time the sustain pulse sus is applied while the wall voltage and the sustain pulse sus are added in the cell where the address discharge has not occurred. Get up. On the other hand, if the next subfield is driven by the selective write method, the erase lamp waveform is supplied to the sustain electrodes Z to erase the wall charges in the cell. However, if the next subfield is driven by the selective erasing method, the erase lamp waveform is not supplied to the sustain electrodes Z.

In the present invention as described above, the PDP is driven by either the selective write method or the selective erase method according to the load of the PDP. Here, the initialization period includes only the set-down period when the PDP is driven by the selective erase method. Therefore, no setup discharge occurs during the initialization period of the selective erasing scheme (i.e., no light is generated by the setup discharge), and therefore, the contrast of the PDP can be improved.

As described above, according to the driving apparatus and driving method of the plasma display panel according to the present invention, the contrast of the plasma display panel can be improved by driving the plasma display panel by selective erasing when the data load is small.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a perspective view showing a discharge cell structure of a typical three-electrode AC surface discharge type plasma display panel.

2 illustrates a frame of a plasma display panel including a plurality of subfields.

3 is a block diagram showing a driving apparatus of a plasma display panel according to an embodiment of the present invention;

Fig. 4 is a waveform diagram showing a drive waveform when successive subfields are driven in a selective writing manner according to an embodiment of the present invention.

FIG. 5 is a waveform diagram showing when a subfield driven by a selective erasing method is located after a subfield driven by a selective writing method according to an embodiment of the present invention; FIG.

<Description of Symbols for Main Parts of Drawings>

1: input line 10: upper substrate

12Y, 12Z: transparent electrode 13Y, 13Z: metal bus electrode

14,22 dielectric layer 16: protective film

18: lower substrate 24: bulkhead

26 phosphor layer 30 frame memory

32A, 32B: reverse gamma correction unit 34: gain control unit

36: error diffusion unit 38: subfield mapping unit

40: data alignment unit 42: APL unit

44: waveform generator 46: panel

50: data load calculation unit

Claims (14)

delete Calculating a load using data input from the outside; Driving the plasma display panel in any one of a selective writing method and a selective erasing method in response to the calculated load; And when the calculated load is 30% or less, is driven by the selective erasing method, otherwise it is driven by the selective writing method. delete The method of claim 2, And the initialization period includes a setup period for supplying a rising ramp waveform and a setdown period for supplying a falling ramp waveform when the selective writing method is driven. The method of claim 2, And the initialization period includes only a set-down period for supplying a falling ramp waveform when the selective erasing method is driven. The method of claim 2, and an erase pulse is not supplied after a sustain period of the n-1 subfield when the n (n is a natural number) subfield is driven in the selective erasure method. The method of claim 2, The first subfield included in one frame is driven by the selective writing method irrespective of the calculated load. delete A data load calculator configured to receive data from an external source and calculate a load of the input data; A waveform generator for driving the plasma display panel in any one of a selective write method and a selective erase method in response to the data load calculated by the data load calculator; The data load calculator generates a control signal and supplies the control signal to the waveform generator when the load of the data is 30% or less, and the waveform generator drives the plasma display panel in the selective erasing manner when the control signal is input. A drive device for a plasma display panel. delete The method of claim 9, And the initialization period includes a setup period for supplying a rising ramp waveform and a setdown period for supplying a falling ramp waveform when the selective writing method is driven. The method of claim 9, And an initializing period includes only a set-down period for supplying a falling ramp waveform when the selective erasing method is driven. The method of claim 9, and an erase pulse is not supplied after the sustain period of the n-1 subfield when the n subfield is driven by the selective erasure method. The method of claim 9, The first subfield included in one frame is driven by the selective write method irrespective of the data load.